2 /include/ "skeleton.dtsi"
5 model = "ARM Versatile AB";
6 compatible = "arm,versatile-ab";
9 interrupt-parent = <&vic>;
23 reg = <0x0 0x08000000>;
26 xtal24mhz: xtal24mhz@24M {
28 compatible = "fixed-clock";
29 clock-frequency = <24000000>;
32 core-module@10000000 {
33 compatible = "arm,core-module-versatile", "syscon", "simple-mfd";
34 reg = <0x10000000 0x200>;
37 compatible = "register-bit-led";
40 label = "versatile:0";
41 linux,default-trigger = "heartbeat";
45 compatible = "register-bit-led";
48 label = "versatile:1";
49 linux,default-trigger = "mmc0";
50 default-state = "off";
53 compatible = "register-bit-led";
56 label = "versatile:2";
57 linux,default-trigger = "cpu0";
58 default-state = "off";
61 compatible = "register-bit-led";
64 label = "versatile:3";
65 default-state = "off";
68 compatible = "register-bit-led";
71 label = "versatile:4";
72 default-state = "off";
75 compatible = "register-bit-led";
78 label = "versatile:5";
79 default-state = "off";
82 compatible = "register-bit-led";
85 label = "versatile:6";
86 default-state = "off";
89 compatible = "register-bit-led";
92 label = "versatile:7";
93 default-state = "off";
96 /* OSC1 on AB, OSC4 on PB */
97 osc1: cm_aux_osc@24M {
99 compatible = "arm,versatile-cm-auxosc";
100 clocks = <&xtal24mhz>;
103 /* The timer clock is the 24 MHz oscillator divided to 1MHz */
106 compatible = "fixed-factor-clock";
109 clocks = <&xtal24mhz>;
114 compatible = "fixed-factor-clock";
117 clocks = <&xtal24mhz>;
122 compatible = "arm,versatile-flash";
123 reg = <0x34000000 0x4000000>;
128 #address-cells = <1>;
130 compatible = "arm,versatile-i2c";
131 reg = <0x10002000 0x1000>;
134 compatible = "dallas,ds1338";
140 compatible = "smsc,lan91c111";
141 reg = <0x10010000 0x10000>;
146 compatible = "arm,versatile-lcd";
147 reg = <0x10008000 0x1000>;
151 compatible = "arm,amba-bus";
152 #address-cells = <1>;
157 compatible = "arm,versatile-vic";
158 interrupt-controller;
159 #interrupt-cells = <1>;
160 reg = <0x10140000 0x1000>;
161 clear-mask = <0xffffffff>;
162 valid-mask = <0xffffffff>;
166 compatible = "arm,versatile-sic";
167 interrupt-controller;
168 #interrupt-cells = <1>;
169 reg = <0x10003000 0x1000>;
170 interrupt-parent = <&vic>;
171 interrupts = <31>; /* Cascaded to vic */
172 clear-mask = <0xffffffff>;
174 * Valid interrupt lines mask according to
175 * table 4-36 page 4-50 of ARM DUI 0225D
177 valid-mask = <0x0760031b>;
181 compatible = "arm,pl081", "arm,primecell";
182 reg = <0x10130000 0x1000>;
185 clock-names = "apb_pclk";
188 uart0: uart@101f1000 {
189 compatible = "arm,pl011", "arm,primecell";
190 reg = <0x101f1000 0x1000>;
192 clocks = <&xtal24mhz>, <&pclk>;
193 clock-names = "uartclk", "apb_pclk";
196 uart1: uart@101f2000 {
197 compatible = "arm,pl011", "arm,primecell";
198 reg = <0x101f2000 0x1000>;
200 clocks = <&xtal24mhz>, <&pclk>;
201 clock-names = "uartclk", "apb_pclk";
204 uart2: uart@101f3000 {
205 compatible = "arm,pl011", "arm,primecell";
206 reg = <0x101f3000 0x1000>;
208 clocks = <&xtal24mhz>, <&pclk>;
209 clock-names = "uartclk", "apb_pclk";
213 compatible = "arm,primecell";
214 reg = <0x10100000 0x1000>;
216 clock-names = "apb_pclk";
220 compatible = "arm,primecell";
221 reg = <0x10110000 0x1000>;
223 clock-names = "apb_pclk";
227 compatible = "arm,pl110", "arm,primecell";
228 reg = <0x10120000 0x1000>;
230 clocks = <&osc1>, <&pclk>;
231 clock-names = "clcd", "apb_pclk";
235 compatible = "arm,primecell";
236 reg = <0x101e0000 0x1000>;
238 clock-names = "apb_pclk";
242 compatible = "arm,primecell";
243 reg = <0x101e1000 0x1000>;
246 clock-names = "apb_pclk";
250 compatible = "arm,sp804", "arm,primecell";
251 reg = <0x101e2000 0x1000>;
253 clocks = <&timclk>, <&timclk>, <&pclk>;
254 clock-names = "timer0", "timer1", "apb_pclk";
258 compatible = "arm,sp804", "arm,primecell";
259 reg = <0x101e3000 0x1000>;
261 clocks = <&timclk>, <&timclk>, <&pclk>;
262 clock-names = "timer0", "timer1", "apb_pclk";
265 gpio0: gpio@101e4000 {
266 compatible = "arm,pl061", "arm,primecell";
267 reg = <0x101e4000 0x1000>;
271 interrupt-controller;
272 #interrupt-cells = <2>;
274 clock-names = "apb_pclk";
277 gpio1: gpio@101e5000 {
278 compatible = "arm,pl061", "arm,primecell";
279 reg = <0x101e5000 0x1000>;
283 interrupt-controller;
284 #interrupt-cells = <2>;
286 clock-names = "apb_pclk";
290 compatible = "arm,pl030", "arm,primecell";
291 reg = <0x101e8000 0x1000>;
294 clock-names = "apb_pclk";
298 compatible = "arm,primecell";
299 reg = <0x101f0000 0x1000>;
302 clock-names = "apb_pclk";
306 compatible = "arm,pl022", "arm,primecell";
307 reg = <0x101f4000 0x1000>;
309 clocks = <&xtal24mhz>, <&pclk>;
310 clock-names = "SSPCLK", "apb_pclk";
314 compatible = "arm,versatile-fpga", "simple-bus";
315 #address-cells = <1>;
317 ranges = <0 0x10000000 0x10000>;
320 compatible = "arm,versatile-sysreg", "syscon";
321 reg = <0x00000 0x1000>;
325 compatible = "arm,primecell";
326 reg = <0x4000 0x1000>;
329 clock-names = "apb_pclk";
332 compatible = "arm,pl180", "arm,primecell";
333 reg = <0x5000 0x1000>;
334 interrupts-extended = <&vic 22 &sic 1>;
335 clocks = <&xtal24mhz>, <&pclk>;
336 clock-names = "mclk", "apb_pclk";
339 compatible = "arm,pl050", "arm,primecell";
340 reg = <0x6000 0x1000>;
341 interrupt-parent = <&sic>;
343 clocks = <&xtal24mhz>, <&pclk>;
344 clock-names = "KMIREFCLK", "apb_pclk";
347 compatible = "arm,pl050", "arm,primecell";
348 reg = <0x7000 0x1000>;
349 interrupt-parent = <&sic>;
351 clocks = <&xtal24mhz>, <&pclk>;
352 clock-names = "KMIREFCLK", "apb_pclk";