2 * Copyright (C) 2011 - 2014 Xilinx
3 * Copyright (C) 2012 National Instruments Corp.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 /include/ "zynq-7000.dtsi"
18 model = "Zynq ZC702 Development Board";
19 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
28 device_type = "memory";
29 reg = <0x0 0x40000000>;
33 bootargs = "console=ttyPS0,115200 earlyprintk";
37 compatible = "gpio-leds";
41 gpios = <&gpio0 10 0>;
42 linux,default-trigger = "heartbeat";
47 compatible = "usb-nop-xceiv";
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_can0_default>;
59 ps-clk-frequency = <33333333>;
64 phy-mode = "rgmii-id";
65 phy-handle = <ðernet_phy>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_gem0_default>;
69 ethernet_phy: ethernet-phy@7 {
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_gpio0_default>;
81 clock-frequency = <400000>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_i2c0_default>;
86 compatible = "nxp,pca9548";
95 si570: clock-generator@5d {
97 compatible = "silabs,si570";
98 temperature-stability = <50>;
100 factory-fout = <156250000>;
101 clock-frequency = <148500000>;
106 #address-cells = <1>;
110 compatible = "at,24c08";
116 #address-cells = <1>;
120 compatible = "ti,tca6416";
128 #address-cells = <1>;
132 compatible = "nxp,pcf8563";
138 #address-cells = <1>;
142 compatible = "ti,ucd9248";
146 compatible = "ti,ucd9248";
150 compatible = "ti,ucd9248";
158 pinctrl_can0_default: can0-default {
161 groups = "can0_9_grp";
165 groups = "can0_9_grp";
181 pinctrl_gem0_default: gem0-default {
183 function = "ethernet0";
184 groups = "ethernet0_0_grp";
188 groups = "ethernet0_0_grp";
194 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
200 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
207 groups = "mdio0_0_grp";
211 groups = "mdio0_0_grp";
218 pinctrl_gpio0_default: gpio0-default {
221 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
222 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
223 "gpio0_13_grp", "gpio0_14_grp";
227 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
228 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
229 "gpio0_13_grp", "gpio0_14_grp";
235 pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
240 pins = "MIO7", "MIO8";
245 pinctrl_i2c0_default: i2c0-default {
247 groups = "i2c0_10_grp";
252 groups = "i2c0_10_grp";
259 pinctrl_sdhci0_default: sdhci0-default {
261 groups = "sdio0_2_grp";
266 groups = "sdio0_2_grp";
273 groups = "gpio0_0_grp";
274 function = "sdio0_cd";
278 groups = "gpio0_0_grp";
286 groups = "gpio0_15_grp";
287 function = "sdio0_wp";
291 groups = "gpio0_15_grp";
299 pinctrl_uart1_default: uart1-default {
301 groups = "uart1_10_grp";
306 groups = "uart1_10_grp";
322 pinctrl_usb0_default: usb0-default {
324 groups = "usb0_0_grp";
329 groups = "usb0_0_grp";
335 pins = "MIO29", "MIO31", "MIO36";
340 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
341 "MIO35", "MIO37", "MIO38", "MIO39";
349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_sdhci0_default>;
355 pinctrl-names = "default";
356 pinctrl-0 = <&pinctrl_uart1_default>;
362 usb-phy = <&usb_phy0>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&pinctrl_usb0_default>;