3 * Sascha Hauer, Pengutronix
5 * (C) Copyright 2009 Freescale Semiconductor, Inc.
7 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/imx-regs.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/sys_proto.h>
15 #include <asm/errno.h>
17 #include <asm/imx-common/boot_mode.h>
19 #if !(defined(CONFIG_MX51) || defined(CONFIG_MX53))
20 #error "CPU_TYPE not defined"
23 #ifdef CONFIG_HW_WATCHDOG
24 #define wdog_base ((void *)WDOG1_BASE_ADDR)
26 #define WCR_WDE (1 << 2)
29 void hw_watchdog_reset(void)
31 if (readw(wdog_base + WDOG_WCR) & WCR_WDE) {
32 static u16 toggle = 0xaaaa;
34 writew(toggle, wdog_base + WDOG_WSR);
43 int system_rev = 0x51000;
45 int system_rev = 0x53000;
47 int reg = __raw_readl(ROM_SI_REV);
49 #if defined(CONFIG_MX51)
52 system_rev |= CHIP_REV_1_1;
55 if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0)
56 system_rev |= CHIP_REV_2_5;
58 system_rev |= CHIP_REV_2_0;
61 system_rev |= CHIP_REV_3_0;
64 system_rev |= CHIP_REV_1_0;
69 system_rev |= CHIP_REV_1_0;
76 #ifdef CONFIG_REVISION_TAG
77 u32 __weak get_board_rev(void)
83 #ifndef CONFIG_SYS_DCACHE_OFF
84 void enable_caches(void)
86 /* Enable D-cache. I-cache is already enabled in start.S */
91 #if defined(CONFIG_FEC_MXC)
92 static void __imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
95 struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
96 struct fuse_bank *bank = &iim->bank[1];
97 struct fuse_bank1_regs *fuse =
98 (struct fuse_bank1_regs *)bank->fuse_regs;
100 for (i = 0; i < 6; i++)
101 mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
104 void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
105 __attribute__((weak, alias("__imx_get_mac_from_fuse")));
110 void boot_mode_apply(unsigned cfg_val)
112 writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr);
115 * cfg_val will be used for
116 * Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
118 * If bit 28 of LPGR is set upon watchdog reset,
119 * bits[25:0] of LPGR will move to SBMR.
121 const struct boot_mode soc_boot_modes[] = {
122 {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)},
123 /* usb or serial download */
124 {"usb", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x13)},
125 {"sata", MAKE_CFGVAL(0x28, 0x00, 0x00, 0x12)},
126 {"escpi1:0", MAKE_CFGVAL(0x38, 0x20, 0x00, 0x12)},
127 {"escpi1:1", MAKE_CFGVAL(0x38, 0x20, 0x04, 0x12)},
128 {"escpi1:2", MAKE_CFGVAL(0x38, 0x20, 0x08, 0x12)},
129 {"escpi1:3", MAKE_CFGVAL(0x38, 0x20, 0x0c, 0x12)},
130 /* 4 bit bus width */
131 {"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)},
132 {"esdhc2", MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)},
133 {"esdhc3", MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)},
134 {"esdhc4", MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)},