2 * Copyright (C) 2014 Panasonic Corporation
3 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
5 * SPDX-License-Identifier: GPL-2.0+
12 #include <../drivers/mtd/nand/denali.h>
14 static void nand_denali_wp_disable(void)
16 #ifdef CONFIG_NAND_DENALI
18 * Since the boot rom enables the write protection for NAND boot mode,
19 * it must be disabled somewhere for "nand write", "nand erase", etc.
20 * The workaround is here to not disturb the Denali NAND controller
21 * driver just for a really SoC-specific thing.
23 void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;
25 writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT);
29 static void nand_denali_fixup(void)
31 #if defined(CONFIG_NAND_DENALI) && \
32 (defined(CONFIG_MACH_PH1_SLD8) || defined(CONFIG_MACH_PH1_PRO4))
34 * The Denali NAND controller on some of UniPhier SoCs does not
35 * automatically query the device parameters. For those SoCs,
36 * some registers must be set after the device is probed.
38 void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;
40 struct nand_chip *chip;
42 if (nand_curr_device < 0 ||
43 nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE) {
44 /* NAND was not detected. Just return. */
48 mtd = &nand_info[nand_curr_device];
51 writel(mtd->erasesize / mtd->writesize, denali_reg + PAGES_PER_BLOCK);
52 writel(0, denali_reg + DEVICE_WIDTH);
53 writel(mtd->writesize, denali_reg + DEVICE_MAIN_AREA_SIZE);
54 writel(mtd->oobsize, denali_reg + DEVICE_SPARE_AREA_SIZE);
55 writel(1, denali_reg + DEVICES_CONNECTED);
58 * chip->scan_bbt in nand_scan_tail() has been skipped.
59 * It should be done in here.
65 int board_late_init(void)
69 switch (spl_boot_device()) {
70 case BOOT_DEVICE_MMC1:
71 printf("eMMC Boot\n");
72 setenv("bootmode", "emmcboot");
75 case BOOT_DEVICE_NAND:
76 printf("NAND Boot\n");
77 setenv("bootmode", "nandboot");
78 nand_denali_wp_disable();
82 setenv("bootmode", "norboot");
86 printf("Unsupported Boot Mode\n");