2 * Copyright (C) 2014 Panasonic Corporation
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <linux/types.h>
10 #include <asm/arch/ddrphy-regs.h>
12 void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size)
16 writel(0x0300c473, &phy->pgcr[1]);
18 writel(0x0a806844, &phy->ptr[0]);
19 writel(0x208e0124, &phy->ptr[1]);
21 writel(0x0c807d04, &phy->ptr[0]);
22 writel(0x2710015E, &phy->ptr[1]);
24 writel(0x00083DEF, &phy->ptr[2]);
26 writel(0x0f051616, &phy->ptr[3]);
27 writel(0x06ae08d6, &phy->ptr[4]);
29 writel(0x12061A80, &phy->ptr[3]);
30 writel(0x08027100, &phy->ptr[4]);
32 writel(0xF004001A, &phy->dsgcr);
34 /* change the value of the on-die pull-up/pull-down registors */
35 tmp = readl(&phy->dxccr);
37 tmp |= DXCCR_DQSNRES_688_OHM | DXCCR_DQSRES_688_OHM;
38 writel(tmp, &phy->dxccr);
40 writel(0x0000040B, &phy->dcr);
42 writel(0x85589955, &phy->dtpr[0]);
44 writel(0x1a8363c0, &phy->dtpr[1]);
46 writel(0x1a8363c0, &phy->dtpr[1]);
47 writel(0x5002c200, &phy->dtpr[2]);
48 writel(0x00000b51, &phy->mr0);
50 writel(0x999cbb66, &phy->dtpr[0]);
52 writel(0x1a878400, &phy->dtpr[1]);
54 writel(0x1a878400, &phy->dtpr[1]);
55 writel(0xa00214f8, &phy->dtpr[2]);
56 writel(0x00000d71, &phy->mr0);
58 writel(0x00000006, &phy->mr1);
60 writel(0x00000290, &phy->mr2);
62 writel(0x00000298, &phy->mr2);
64 #ifdef CONFIG_DDR_STANDARD
65 writel(0x00000000, &phy->mr3);
67 writel(0x00000800, &phy->mr3);
70 while (!(readl(&phy->pgsr[0]) & PGSR0_IDONE))
73 writel(0x0300C473, &phy->pgcr[1]);
74 writel(0x0000005D, &phy->zq[0].cr[1]);