3 bool "ARM Accelerated Cryptographic Algorithms"
6 Say Y here to choose from a selection of cryptographic algorithms
7 implemented using ARM specific CPU features or instructions.
11 config CRYPTO_SHA1_ARM
12 tristate "SHA1 digest algorithm (ARM-asm)"
16 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
17 using optimized ARM assembler.
19 config CRYPTO_SHA1_ARM_NEON
20 tristate "SHA1 digest algorithm (ARM NEON)"
21 depends on KERNEL_MODE_NEON
22 select CRYPTO_SHA1_ARM
26 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
27 using optimized ARM NEON assembly, when NEON instructions are
30 config CRYPTO_SHA1_ARM_CE
31 tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)"
32 depends on KERNEL_MODE_NEON
33 select CRYPTO_SHA1_ARM
36 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
37 using special ARMv8 Crypto Extensions.
39 config CRYPTO_SHA2_ARM_CE
40 tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)"
41 depends on KERNEL_MODE_NEON
42 select CRYPTO_SHA256_ARM
45 SHA-256 secure hash standard (DFIPS 180-2) implemented
46 using special ARMv8 Crypto Extensions.
48 config CRYPTO_SHA256_ARM
49 tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)"
53 SHA-256 secure hash standard (DFIPS 180-2) implemented
54 using optimized ARM assembler and NEON, when available.
56 config CRYPTO_SHA512_ARM
57 tristate "SHA-384/512 digest algorithm (ARM-asm and NEON)"
61 SHA-512 secure hash standard (DFIPS 180-2) implemented
62 using optimized ARM assembler and NEON, when available.
65 tristate "Scalar AES cipher for ARM"
69 Use optimized AES assembler routines for ARM platforms.
71 config CRYPTO_AES_ARM_BS
72 tristate "Bit sliced AES using NEON instructions"
73 depends on KERNEL_MODE_NEON
74 select CRYPTO_BLKCIPHER
78 Use a faster and more secure NEON based implementation of AES in CBC,
81 Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
82 and for XTS mode encryption, CBC and XTS mode decryption speedup is
83 around 25%. (CBC encryption speed is not affected by this driver.)
84 This implementation does not rely on any lookup tables so it is
85 believed to be invulnerable to cache timing attacks.
87 config CRYPTO_AES_ARM_CE
88 tristate "Accelerated AES using ARMv8 Crypto Extensions"
89 depends on KERNEL_MODE_NEON
90 select CRYPTO_BLKCIPHER
93 Use an implementation of AES in CBC, CTR and XTS modes that uses
94 ARMv8 Crypto Extensions
96 config CRYPTO_GHASH_ARM_CE
97 tristate "PMULL-accelerated GHASH using ARMv8 Crypto Extensions"
98 depends on KERNEL_MODE_NEON
102 Use an implementation of GHASH (used by the GCM AEAD chaining mode)
103 that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64)
104 that is part of the ARMv8 Crypto Extensions
106 config CRYPTO_CRCT10DIF_ARM_CE
107 tristate "CRCT10DIF digest algorithm using PMULL instructions"
108 depends on KERNEL_MODE_NEON && CRC_T10DIF
111 config CRYPTO_CRC32_ARM_CE
112 tristate "CRC32(C) digest algorithm using CRC and/or PMULL instructions"
113 depends on KERNEL_MODE_NEON && CRC32
116 config CRYPTO_CHACHA20_NEON
117 tristate "NEON accelerated ChaCha20 symmetric cipher"
118 depends on KERNEL_MODE_NEON
119 select CRYPTO_BLKCIPHER
120 select CRYPTO_CHACHA20