arch/arm/dts/zynq-zc702.dts

   1 /*
   2  * Xilinx ZC702 board DTS
   3  *
   4  *  Copyright (C) 2011 - 2015 Xilinx
   5  *  Copyright (C) 2012 National Instruments Corp.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 /dts-v1/;
  10 #include "zynq-7000.dtsi"
  11
  12 / {
  13         model = "Zynq ZC702 Development Board";
  14         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
  15
  16         aliases {
  17                 ethernet0 = &gem0;
  18                 i2c0 = &i2c0;
  19                 serial0 = &uart1;
  20         };
  21
  22         memory {
  23                 device_type = "memory";
  24                 reg = <0x0 0x40000000>;
  25         };
  26
  27         chosen {
  28                 bootargs = "earlyprintk";
  29                 stdout-path = "serial0:115200n8";
  30         };
  31
  32         leds {
  33                 compatible = "gpio-leds";
  34
  35                 ds23 {
  36                         label = "ds23";
  37                         gpios = <&gpio0 10 0>;
  38                         linux,default-trigger = "heartbeat";
  39                 };
  40         };
  41
  42         usb_phy0: phy0 {
  43                 compatible = "usb-nop-xceiv";
  44                 #phy-cells = <0>;
  45         };
  46 };
  47
  48 &amba {
  49         ocm: sram@fffc0000 {
  50                 compatible = "mmio-sram";
  51                 reg = <0xfffc0000 0x10000>;
  52         };
  53 };
  54
  55 &can0 {
  56         status = "okay";
  57         pinctrl-names = "default";
  58         pinctrl-0 = <&pinctrl_can0_default>;
  59 };
  60
  61 &clkc {
  62         ps-clk-frequency = <33333333>;
  63 };
  64
  65 &gem0 {
  66         status = "okay";
  67         phy-mode = "rgmii-id";
  68         phy-handle = <&ethernet_phy>;
  69         pinctrl-names = "default";
  70         pinctrl-0 = <&pinctrl_gem0_default>;
  71
  72         ethernet_phy: ethernet-phy@7 {
  73                 reg = <7>;
  74         };
  75 };
  76
  77 &gpio0 {
  78         pinctrl-names = "default";
  79         pinctrl-0 = <&pinctrl_gpio0_default>;
  80 };
  81
  82 &i2c0 {
  83         status = "okay";
  84         clock-frequency = <400000>;
  85         pinctrl-names = "default";
  86         pinctrl-0 = <&pinctrl_i2c0_default>;
  87
  88         i2cswitch@74 {
  89                 compatible = "nxp,pca9548";
  90                 #address-cells = <1>;
  91                 #size-cells = <0>;
  92                 reg = <0x74>;
  93
  94                 i2c@0 {
  95                         #address-cells = <1>;
  96                         #size-cells = <0>;
  97                         reg = <0>;
  98                         si570: clock-generator@5d {
  99                                 #clock-cells = <0>;
 100                                 compatible = "silabs,si570";
 101                                 temperature-stability = <50>;
 102                                 reg = <0x5d>;
 103                                 factory-fout = <156250000>;
 104                                 clock-frequency = <148500000>;
 105                         };
 106                 };
 107
 108                 i2c@2 {
 109                         #address-cells = <1>;
 110                         #size-cells = <0>;
 111                         reg = <2>;
 112                         eeprom@54 {
 113                                 compatible = "at,24c08";
 114                                 reg = <0x54>;
 115                         };
 116                 };
 117
 118                 i2c@3 {
 119                         #address-cells = <1>;
 120                         #size-cells = <0>;
 121                         reg = <3>;
 122                         gpio@21 {
 123                                 compatible = "ti,tca6416";
 124                                 reg = <0x21>;
 125                                 gpio-controller;
 126                                 #gpio-cells = <2>;
 127                         };
 128                 };
 129
 130                 i2c@4 {
 131                         #address-cells = <1>;
 132                         #size-cells = <0>;
 133                         reg = <4>;
 134                         rtc@51 {
 135                                 compatible = "nxp,pcf8563";
 136                                 reg = <0x51>;
 137                         };
 138                 };
 139
 140                 i2c@7 {
 141                         #address-cells = <1>;
 142                         #size-cells = <0>;
 143                         reg = <7>;
 144                         hwmon@52 {
 145                                 compatible = "ti,ucd9248";
 146                                 reg = <52>;
 147                         };
 148                         hwmon@53 {
 149                                 compatible = "ti,ucd9248";
 150                                 reg = <53>;
 151                         };
 152                         hwmon@54 {
 153                                 compatible = "ti,ucd9248";
 154                                 reg = <54>;
 155                         };
 156                 };
 157         };
 158 };
 159
 160 &pinctrl0 {
 161         pinctrl_can0_default: can0-default {
 162                 mux {
 163                         function = "can0";
 164                         groups = "can0_9_grp";
 165                 };
 166
 167                 conf {
 168                         groups = "can0_9_grp";
 169                         slew-rate = <0>;
 170                         io-standard = <1>;
 171                 };
 172
 173                 conf-rx {
 174                         pins = "MIO46";
 175                         bias-high-impedance;
 176                 };
 177
 178                 conf-tx {
 179                         pins = "MIO47";
 180                         bias-disable;
 181                 };
 182         };
 183
 184         pinctrl_gem0_default: gem0-default {
 185                 mux {
 186                         function = "ethernet0";
 187                         groups = "ethernet0_0_grp";
 188                 };
 189
 190                 conf {
 191                         groups = "ethernet0_0_grp";
 192                         slew-rate = <0>;
 193                         io-standard = <4>;
 194                 };
 195
 196                 conf-rx {
 197                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 198                         bias-high-impedance;
 199                         low-power-disable;
 200                 };
 201
 202                 conf-tx {
 203                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 204                         bias-disable;
 205                         low-power-enable;
 206                 };
 207
 208                 mux-mdio {
 209                         function = "mdio0";
 210                         groups = "mdio0_0_grp";
 211                 };
 212
 213                 conf-mdio {
 214                         groups = "mdio0_0_grp";
 215                         slew-rate = <0>;
 216                         io-standard = <1>;
 217                         bias-disable;
 218                 };
 219         };
 220
 221         pinctrl_gpio0_default: gpio0-default {
 222                 mux {
 223                         function = "gpio0";
 224                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 225                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 226                                  "gpio0_13_grp", "gpio0_14_grp";
 227                 };
 228
 229                 conf {
 230                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 231                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 232                                  "gpio0_13_grp", "gpio0_14_grp";
 233                         slew-rate = <0>;
 234                         io-standard = <1>;
 235                 };
 236
 237                 conf-pull-up {
 238                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
 239                         bias-pull-up;
 240                 };
 241
 242                 conf-pull-none {
 243                         pins = "MIO7", "MIO8";
 244                         bias-disable;
 245                 };
 246         };
 247
 248         pinctrl_i2c0_default: i2c0-default {
 249                 mux {
 250                         groups = "i2c0_10_grp";
 251                         function = "i2c0";
 252                 };
 253
 254                 conf {
 255                         groups = "i2c0_10_grp";
 256                         bias-pull-up;
 257                         slew-rate = <0>;
 258                         io-standard = <1>;
 259                 };
 260         };
 261
 262         pinctrl_sdhci0_default: sdhci0-default {
 263                 mux {
 264                         groups = "sdio0_2_grp";
 265                         function = "sdio0";
 266                 };
 267
 268                 conf {
 269                         groups = "sdio0_2_grp";
 270                         slew-rate = <0>;
 271                         io-standard = <1>;
 272                         bias-disable;
 273                 };
 274
 275                 mux-cd {
 276                         groups = "gpio0_0_grp";
 277                         function = "sdio0_cd";
 278                 };
 279
 280                 conf-cd {
 281                         groups = "gpio0_0_grp";
 282                         bias-high-impedance;
 283                         bias-pull-up;
 284                         slew-rate = <0>;
 285                         io-standard = <1>;
 286                 };
 287
 288                 mux-wp {
 289                         groups = "gpio0_15_grp";
 290                         function = "sdio0_wp";
 291                 };
 292
 293                 conf-wp {
 294                         groups = "gpio0_15_grp";
 295                         bias-high-impedance;
 296                         bias-pull-up;
 297                         slew-rate = <0>;
 298                         io-standard = <1>;
 299                 };
 300         };
 301
 302         pinctrl_uart1_default: uart1-default {
 303                 mux {
 304                         groups = "uart1_10_grp";
 305                         function = "uart1";
 306                 };
 307
 308                 conf {
 309                         groups = "uart1_10_grp";
 310                         slew-rate = <0>;
 311                         io-standard = <1>;
 312                 };
 313
 314                 conf-rx {
 315                         pins = "MIO49";
 316                         bias-high-impedance;
 317                 };
 318
 319                 conf-tx {
 320                         pins = "MIO48";
 321                         bias-disable;
 322                 };
 323         };
 324
 325         pinctrl_usb0_default: usb0-default {
 326                 mux {
 327                         groups = "usb0_0_grp";
 328                         function = "usb0";
 329                 };
 330
 331                 conf {
 332                         groups = "usb0_0_grp";
 333                         slew-rate = <0>;
 334                         io-standard = <1>;
 335                 };
 336
 337                 conf-rx {
 338                         pins = "MIO29", "MIO31", "MIO36";
 339                         bias-high-impedance;
 340                 };
 341
 342                 conf-tx {
 343                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 344                                "MIO35", "MIO37", "MIO38", "MIO39";
 345                         bias-disable;
 346                 };
 347         };
 348 };
 349
 350 &sdhci0 {
 351         status = "okay";
 352         pinctrl-names = "default";
 353         pinctrl-0 = <&pinctrl_sdhci0_default>;
 354 };
 355
 356 &uart1 {
 357         status = "okay";
 358         pinctrl-names = "default";
 359         pinctrl-0 = <&pinctrl_uart1_default>;
 360 };
 361
 362 &usb0 {
 363         status = "okay";
 364         dr_mode = "host";
 365         usb-phy = <&usb_phy0>;
 366         pinctrl-names = "default";
 367         pinctrl-0 = <&pinctrl_usb0_default>;
 368 };