3 * Sascha Hauer, Pengutronix
5 * (C) Copyright 2009 Freescale Semiconductor, Inc.
7 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/errno.h>
13 #include <asm/arch/imx-regs.h>
14 #include <asm/arch/clock.h>
15 #include <asm/arch/sys_proto.h>
16 #include <asm/arch/crm_regs.h>
18 #ifdef CONFIG_FSL_ESDHC
19 #include <fsl_esdhc.h>
22 char *get_reset_cause(void)
25 struct src *src_regs = (struct src *)SRC_BASE_ADDR;
27 cause = readl(&src_regs->srsr);
28 writel(cause, &src_regs->srsr);
47 return "unknown reset";
51 #if defined(CONFIG_MX53) || defined(CONFIG_MX6)
52 #if defined(CONFIG_MX53)
53 #define MEMCTL_BASE ESDCTL_BASE_ADDR;
55 #define MEMCTL_BASE MMDC_P0_BASE_ADDR;
57 static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9};
58 static const unsigned char bank_lookup[] = {3, 2};
60 struct esd_mmdc_regs {
79 #define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl >> 24) & 7)
80 #define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((ctl >> 20) & 7)
81 #define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((ctl >> 16) & 3)
82 #define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl >> 30) & 1)
83 #define ESD_MMDC_MISC_GET_BANK(mdmisc) ((misc >> 5) & 1)
85 unsigned imx_ddr_size(void)
87 struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE;
88 unsigned ctl = readl(&mem->ctl);
89 unsigned misc = readl(&mem->misc);
90 int bits = 11 + 0 + 0 + 1; /* row + col + bank + width */
92 bits += ESD_MMDC_CTL_GET_ROW(ctl);
93 bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)];
94 bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)];
95 bits += ESD_MMDC_CTL_GET_WIDTH(ctl);
96 bits += ESD_MMDC_CTL_GET_CS1(ctl);
101 #if defined(CONFIG_DISPLAY_CPUINFO)
103 const char *get_imx_type(u32 imxtype)
107 return "6Q"; /* Quad-core version of the mx6 */
109 return "6DL"; /* Dual Lite version of the mx6 */
110 case MXC_CPU_MX6SOLO:
111 return "6SOLO"; /* Solo version of the mx6 */
113 return "6SL"; /* Solo-Lite version of the mx6 */
123 int print_cpuinfo(void)
127 cpurev = get_cpu_rev();
129 printf("CPU: Freescale i.MX%s rev%d.%d at %d MHz\n",
130 get_imx_type((cpurev & 0xFF000) >> 12),
131 (cpurev & 0x000F0) >> 4,
132 (cpurev & 0x0000F) >> 0,
133 mxc_get_clock(MXC_ARM_CLK) / 1000000);
134 printf("Reset cause: %s\n", get_reset_cause());
139 int cpu_eth_init(bd_t *bis)
143 #if defined(CONFIG_FEC_MXC)
144 rc = fecmxc_initialize(bis);
150 #ifdef CONFIG_FSL_ESDHC
152 * Initializes on-chip MMC controllers.
153 * to override, implement board_mmc_init()
155 int cpu_mmc_init(bd_t *bis)
157 return fsl_esdhc_mmc_init(bis);
161 u32 get_ahb_clk(void)
163 struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
166 reg = __raw_readl(&imx_ccm->cbcdr);
167 reg &= MXC_CCM_CBCDR_AHB_PODF_MASK;
168 ahb_podf = reg >> MXC_CCM_CBCDR_AHB_PODF_OFFSET;
170 return get_periph_clk() / (ahb_podf + 1);