1 #ifndef __ASM_ARM_CPUTYPE_H
2 #define __ASM_ARM_CPUTYPE_H
4 #include <linux/stringify.h>
7 #define CPUID_CACHETYPE 1
9 #define CPUID_TLBTYPE 3
11 #define CPUID_EXT_PFR0 "c1, 0"
12 #define CPUID_EXT_PFR1 "c1, 1"
13 #define CPUID_EXT_DFR0 "c1, 2"
14 #define CPUID_EXT_AFR0 "c1, 3"
15 #define CPUID_EXT_MMFR0 "c1, 4"
16 #define CPUID_EXT_MMFR1 "c1, 5"
17 #define CPUID_EXT_MMFR2 "c1, 6"
18 #define CPUID_EXT_MMFR3 "c1, 7"
19 #define CPUID_EXT_ISAR0 "c2, 0"
20 #define CPUID_EXT_ISAR1 "c2, 1"
21 #define CPUID_EXT_ISAR2 "c2, 2"
22 #define CPUID_EXT_ISAR3 "c2, 3"
23 #define CPUID_EXT_ISAR4 "c2, 4"
24 #define CPUID_EXT_ISAR5 "c2, 5"
26 #ifdef CONFIG_CPU_CP15
27 #define read_cpuid(reg) \
30 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
36 #define read_cpuid_ext(ext_reg) \
39 asm("mrc p15, 0, %0, c0, " ext_reg \
46 extern unsigned int processor_id;
47 #define read_cpuid(reg) (processor_id)
48 #define read_cpuid_ext(reg) 0
52 * The CPU ID never changes at run time, so we might as well tell the
53 * compiler that it's constant. Use this function to read the CPU ID
54 * rather than directly reading processor_id or read_cpuid() directly.
56 static inline unsigned int __attribute_const__ read_cpuid_id(void)
58 return read_cpuid(CPUID_ID);
61 static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
63 return read_cpuid(CPUID_CACHETYPE);
67 * Intel's XScale3 core supports some v6 features (supersections, L2)
68 * but advertises itself as v5 as it does not support the v6 ISA. For
69 * this reason, we need a way to explicitly test for this type of CPU.
71 #ifndef CONFIG_CPU_XSC3
72 #define cpu_is_xsc3() 0
74 static inline int cpu_is_xsc3(void)
77 id = read_cpuid_id() & 0xffffe000;
78 /* It covers both Intel ID and Marvell ID */
79 if ((id == 0x69056000) || (id == 0x56056000))
86 #if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
87 #define cpu_is_xscale() 0
89 #define cpu_is_xscale() 1