2 * Copyright (C) 2003-2005 SAN People
4 * Debugging macro include header
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
12 #define SAMA5D4_UART_BASE(p) ((p) == 0 ? 0xf8004000 /* UART0 */ : \
13 ((p) == 1 ? 0cfc004000 /* UART1 */ : \
15 #define SAMA5D4_USART_BASE(p) ((p) == 0 ? 0xf802c000 /* USART0 */ : \
16 (p) == 1 ? 0xf8030000 /* USART1 */ : \
17 (p) == 2 ? 0xfc008000 /* USART2 */ : \
18 (p) == 3 ? 0xfc00c000 /* USART3 */ : \
19 (p) == 4 ? 0xfc010000 /* USART4 */ : \
22 #if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
23 #define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */
24 #elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
25 #define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */
26 #elif defined(CONFIG_DEBUG_SAMA5D4_USART)
27 #if CONFIG_DEBUG_SAMA5D4_UART_PORT == 0
28 #define AT91_DBGU 0xf802c000 /* USART0 */
29 #elif CONFIG_DEBUG_SAMA5D4_UART_PORT == 1
30 #define AT91_DBGU 0xf8030000 /* USART1 */
31 #elif CONFIG_DEBUG_SAMA5D4_UART_PORT == 2
32 #define AT91_DBGU 0xfc008000 /* USART2 */
33 #elif CONFIG_DEBUG_SAMA5D4_UART_PORT == 3
34 #define AT91_DBGU 0xfc00c000 /* USART3 */
35 #elif CONFIG_DEBUG_SAMA5D4_UART_PORT == 4
36 #define AT91_DBGU 0xfc010000 /* USART4 */
38 #error Invalid SAMA5D4 Debug USART port selection
40 #elif defined(CONFIG_DEBUG_SAMA5D4_UART)
41 #if CONFIG_DEBUG_SAMA5D4_UART_PORT == 0
42 #define AT91_DBGU 0xf8004000 /* UART0 */
43 #elif CONFIG_DEBUG_SAMA5D4_UART_PORT == 1
44 #define AT91_DBGU 0cfc004000 /* UART1 */
46 #error Invalid SAMA5D4 Debug UART port selection
49 #error Unsupported AT91 Debug UART selection
53 #define AT91_IO_P2V(x) ((x) - 0x01000000)
55 #define AT91_IO_P2V(x) (x)
58 #define AT91_DBGU_SR (0x14) /* Status Register */
59 #define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
60 #define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */
61 #define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */
63 .macro addruart, rp, rv, tmp
64 ldr \rp, =AT91_DBGU @ System peripherals (phys address)
65 ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address)
69 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
73 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
74 tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
79 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
80 tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete