2 * arch/arm/mach-at91/at91cap9_devices.c
4 * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
5 * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
6 * Copyright (C) 2007 Atmel Corporation.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <asm/mach/arch.h>
15 #include <asm/mach/map.h>
16 #include <asm/mach/irq.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/gpio.h>
20 #include <linux/platform_device.h>
21 #include <linux/i2c-gpio.h>
23 #include <video/atmel_lcdc.h>
25 #include <mach/board.h>
27 #include <mach/at91cap9.h>
28 #include <mach/at91cap9_matrix.h>
29 #include <mach/at91sam9_smc.h>
34 /* --------------------------------------------------------------------
36 * -------------------------------------------------------------------- */
38 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
39 static u64 ohci_dmamask = DMA_BIT_MASK(32);
40 static struct at91_usbh_data usbh_data;
42 static struct resource usbh_resources[] = {
44 .start = AT91CAP9_UHP_BASE,
45 .end = AT91CAP9_UHP_BASE + SZ_1M - 1,
46 .flags = IORESOURCE_MEM,
49 .start = AT91CAP9_ID_UHP,
50 .end = AT91CAP9_ID_UHP,
51 .flags = IORESOURCE_IRQ,
55 static struct platform_device at91_usbh_device = {
59 .dma_mask = &ohci_dmamask,
60 .coherent_dma_mask = DMA_BIT_MASK(32),
61 .platform_data = &usbh_data,
63 .resource = usbh_resources,
64 .num_resources = ARRAY_SIZE(usbh_resources),
67 void __init at91_add_device_usbh(struct at91_usbh_data *data)
74 if (cpu_is_at91cap9_revB())
75 irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
77 /* Enable VBus control for UHP ports */
78 for (i = 0; i < data->ports; i++) {
79 if (data->vbus_pin[i])
80 at91_set_gpio_output(data->vbus_pin[i], 0);
83 /* Enable overcurrent notification */
84 for (i = 0; i < data->ports; i++) {
85 if (data->overcurrent_pin[i])
86 at91_set_gpio_input(data->overcurrent_pin[i], 1);
90 platform_device_register(&at91_usbh_device);
93 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
97 /* --------------------------------------------------------------------
98 * USB HS Device (Gadget)
99 * -------------------------------------------------------------------- */
101 #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
103 static struct resource usba_udc_resources[] = {
105 .start = AT91CAP9_UDPHS_FIFO,
106 .end = AT91CAP9_UDPHS_FIFO + SZ_512K - 1,
107 .flags = IORESOURCE_MEM,
110 .start = AT91CAP9_BASE_UDPHS,
111 .end = AT91CAP9_BASE_UDPHS + SZ_1K - 1,
112 .flags = IORESOURCE_MEM,
115 .start = AT91CAP9_ID_UDPHS,
116 .end = AT91CAP9_ID_UDPHS,
117 .flags = IORESOURCE_IRQ,
121 #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
125 .fifo_size = maxpkt, \
131 static struct usba_ep_data usba_udc_ep[] = {
132 EP("ep0", 0, 64, 1, 0, 0),
133 EP("ep1", 1, 1024, 3, 1, 1),
134 EP("ep2", 2, 1024, 3, 1, 1),
135 EP("ep3", 3, 1024, 2, 1, 1),
136 EP("ep4", 4, 1024, 2, 1, 1),
137 EP("ep5", 5, 1024, 2, 1, 0),
138 EP("ep6", 6, 1024, 2, 1, 0),
139 EP("ep7", 7, 1024, 2, 0, 0),
145 * pdata doesn't have room for any endpoints, so we need to
146 * append room for the ones we need right after it.
149 struct usba_platform_data pdata;
150 struct usba_ep_data ep[8];
153 static struct platform_device at91_usba_udc_device = {
154 .name = "atmel_usba_udc",
157 .platform_data = &usba_udc_data.pdata,
159 .resource = usba_udc_resources,
160 .num_resources = ARRAY_SIZE(usba_udc_resources),
163 void __init at91_add_device_usba(struct usba_platform_data *data)
165 if (cpu_is_at91cap9_revB()) {
166 irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
167 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
168 AT91_MATRIX_UDPHS_BYPASS_LOCK);
171 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
174 * Invalid pins are 0 on AT91, but the usba driver is shared
175 * with AVR32, which use negative values instead. Once/if
176 * gpio_is_valid() is ported to AT91, revisit this code.
178 usba_udc_data.pdata.vbus_pin = -EINVAL;
179 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
180 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
182 if (data && data->vbus_pin > 0) {
183 at91_set_gpio_input(data->vbus_pin, 0);
184 at91_set_deglitch(data->vbus_pin, 1);
185 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
188 /* Pullup pin is handled internally by USB device peripheral */
190 platform_device_register(&at91_usba_udc_device);
193 void __init at91_add_device_usba(struct usba_platform_data *data) {}
197 /* --------------------------------------------------------------------
199 * -------------------------------------------------------------------- */
201 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
202 static u64 eth_dmamask = DMA_BIT_MASK(32);
203 static struct at91_eth_data eth_data;
205 static struct resource eth_resources[] = {
207 .start = AT91CAP9_BASE_EMAC,
208 .end = AT91CAP9_BASE_EMAC + SZ_16K - 1,
209 .flags = IORESOURCE_MEM,
212 .start = AT91CAP9_ID_EMAC,
213 .end = AT91CAP9_ID_EMAC,
214 .flags = IORESOURCE_IRQ,
218 static struct platform_device at91cap9_eth_device = {
222 .dma_mask = ð_dmamask,
223 .coherent_dma_mask = DMA_BIT_MASK(32),
224 .platform_data = ð_data,
226 .resource = eth_resources,
227 .num_resources = ARRAY_SIZE(eth_resources),
230 void __init at91_add_device_eth(struct at91_eth_data *data)
235 if (data->phy_irq_pin) {
236 at91_set_gpio_input(data->phy_irq_pin, 0);
237 at91_set_deglitch(data->phy_irq_pin, 1);
240 /* Pins used for MII and RMII */
241 at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */
242 at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */
243 at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */
244 at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */
245 at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */
246 at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */
247 at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */
248 at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */
249 at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */
250 at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */
252 if (!data->is_rmii) {
253 at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */
254 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
255 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
256 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
257 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
258 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
259 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
260 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
264 platform_device_register(&at91cap9_eth_device);
267 void __init at91_add_device_eth(struct at91_eth_data *data) {}
271 /* --------------------------------------------------------------------
273 * -------------------------------------------------------------------- */
275 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
276 static u64 mmc_dmamask = DMA_BIT_MASK(32);
277 static struct at91_mmc_data mmc0_data, mmc1_data;
279 static struct resource mmc0_resources[] = {
281 .start = AT91CAP9_BASE_MCI0,
282 .end = AT91CAP9_BASE_MCI0 + SZ_16K - 1,
283 .flags = IORESOURCE_MEM,
286 .start = AT91CAP9_ID_MCI0,
287 .end = AT91CAP9_ID_MCI0,
288 .flags = IORESOURCE_IRQ,
292 static struct platform_device at91cap9_mmc0_device = {
296 .dma_mask = &mmc_dmamask,
297 .coherent_dma_mask = DMA_BIT_MASK(32),
298 .platform_data = &mmc0_data,
300 .resource = mmc0_resources,
301 .num_resources = ARRAY_SIZE(mmc0_resources),
304 static struct resource mmc1_resources[] = {
306 .start = AT91CAP9_BASE_MCI1,
307 .end = AT91CAP9_BASE_MCI1 + SZ_16K - 1,
308 .flags = IORESOURCE_MEM,
311 .start = AT91CAP9_ID_MCI1,
312 .end = AT91CAP9_ID_MCI1,
313 .flags = IORESOURCE_IRQ,
317 static struct platform_device at91cap9_mmc1_device = {
321 .dma_mask = &mmc_dmamask,
322 .coherent_dma_mask = DMA_BIT_MASK(32),
323 .platform_data = &mmc1_data,
325 .resource = mmc1_resources,
326 .num_resources = ARRAY_SIZE(mmc1_resources),
329 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
336 at91_set_gpio_input(data->det_pin, 1);
337 at91_set_deglitch(data->det_pin, 1);
340 at91_set_gpio_input(data->wp_pin, 1);
342 at91_set_gpio_output(data->vcc_pin, 0);
344 if (mmc_id == 0) { /* MCI0 */
346 at91_set_A_periph(AT91_PIN_PA2, 0);
349 at91_set_A_periph(AT91_PIN_PA1, 1);
351 /* DAT0, maybe DAT1..DAT3 */
352 at91_set_A_periph(AT91_PIN_PA0, 1);
354 at91_set_A_periph(AT91_PIN_PA3, 1);
355 at91_set_A_periph(AT91_PIN_PA4, 1);
356 at91_set_A_periph(AT91_PIN_PA5, 1);
360 platform_device_register(&at91cap9_mmc0_device);
363 at91_set_A_periph(AT91_PIN_PA16, 0);
366 at91_set_A_periph(AT91_PIN_PA17, 1);
368 /* DAT0, maybe DAT1..DAT3 */
369 at91_set_A_periph(AT91_PIN_PA18, 1);
371 at91_set_A_periph(AT91_PIN_PA19, 1);
372 at91_set_A_periph(AT91_PIN_PA20, 1);
373 at91_set_A_periph(AT91_PIN_PA21, 1);
377 platform_device_register(&at91cap9_mmc1_device);
381 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
385 /* --------------------------------------------------------------------
387 * -------------------------------------------------------------------- */
389 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
390 static struct atmel_nand_data nand_data;
392 #define NAND_BASE AT91_CHIPSELECT_3
394 static struct resource nand_resources[] = {
397 .end = NAND_BASE + SZ_256M - 1,
398 .flags = IORESOURCE_MEM,
401 .start = AT91_BASE_SYS + AT91_ECC,
402 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
403 .flags = IORESOURCE_MEM,
407 static struct platform_device at91cap9_nand_device = {
408 .name = "atmel_nand",
411 .platform_data = &nand_data,
413 .resource = nand_resources,
414 .num_resources = ARRAY_SIZE(nand_resources),
417 void __init at91_add_device_nand(struct atmel_nand_data *data)
424 csa = at91_sys_read(AT91_MATRIX_EBICSA);
425 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
428 if (data->enable_pin)
429 at91_set_gpio_output(data->enable_pin, 1);
433 at91_set_gpio_input(data->rdy_pin, 1);
435 /* card detect pin */
437 at91_set_gpio_input(data->det_pin, 1);
440 platform_device_register(&at91cap9_nand_device);
443 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
447 /* --------------------------------------------------------------------
449 * -------------------------------------------------------------------- */
452 * Prefer the GPIO code since the TWI controller isn't robust
453 * (gets overruns and underruns under load) and can only issue
454 * repeated STARTs in one scenario (the driver doesn't yet handle them).
456 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
458 static struct i2c_gpio_platform_data pdata = {
459 .sda_pin = AT91_PIN_PB4,
460 .sda_is_open_drain = 1,
461 .scl_pin = AT91_PIN_PB5,
462 .scl_is_open_drain = 1,
463 .udelay = 2, /* ~100 kHz */
466 static struct platform_device at91cap9_twi_device = {
469 .dev.platform_data = &pdata,
472 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
474 at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */
475 at91_set_multi_drive(AT91_PIN_PB4, 1);
477 at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */
478 at91_set_multi_drive(AT91_PIN_PB5, 1);
480 i2c_register_board_info(0, devices, nr_devices);
481 platform_device_register(&at91cap9_twi_device);
484 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
486 static struct resource twi_resources[] = {
488 .start = AT91CAP9_BASE_TWI,
489 .end = AT91CAP9_BASE_TWI + SZ_16K - 1,
490 .flags = IORESOURCE_MEM,
493 .start = AT91CAP9_ID_TWI,
494 .end = AT91CAP9_ID_TWI,
495 .flags = IORESOURCE_IRQ,
499 static struct platform_device at91cap9_twi_device = {
502 .resource = twi_resources,
503 .num_resources = ARRAY_SIZE(twi_resources),
506 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
508 /* pins used for TWI interface */
509 at91_set_B_periph(AT91_PIN_PB4, 0); /* TWD */
510 at91_set_multi_drive(AT91_PIN_PB4, 1);
512 at91_set_B_periph(AT91_PIN_PB5, 0); /* TWCK */
513 at91_set_multi_drive(AT91_PIN_PB5, 1);
515 i2c_register_board_info(0, devices, nr_devices);
516 platform_device_register(&at91cap9_twi_device);
519 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
522 /* --------------------------------------------------------------------
524 * -------------------------------------------------------------------- */
526 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
527 static u64 spi_dmamask = DMA_BIT_MASK(32);
529 static struct resource spi0_resources[] = {
531 .start = AT91CAP9_BASE_SPI0,
532 .end = AT91CAP9_BASE_SPI0 + SZ_16K - 1,
533 .flags = IORESOURCE_MEM,
536 .start = AT91CAP9_ID_SPI0,
537 .end = AT91CAP9_ID_SPI0,
538 .flags = IORESOURCE_IRQ,
542 static struct platform_device at91cap9_spi0_device = {
546 .dma_mask = &spi_dmamask,
547 .coherent_dma_mask = DMA_BIT_MASK(32),
549 .resource = spi0_resources,
550 .num_resources = ARRAY_SIZE(spi0_resources),
553 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 };
555 static struct resource spi1_resources[] = {
557 .start = AT91CAP9_BASE_SPI1,
558 .end = AT91CAP9_BASE_SPI1 + SZ_16K - 1,
559 .flags = IORESOURCE_MEM,
562 .start = AT91CAP9_ID_SPI1,
563 .end = AT91CAP9_ID_SPI1,
564 .flags = IORESOURCE_IRQ,
568 static struct platform_device at91cap9_spi1_device = {
572 .dma_mask = &spi_dmamask,
573 .coherent_dma_mask = DMA_BIT_MASK(32),
575 .resource = spi1_resources,
576 .num_resources = ARRAY_SIZE(spi1_resources),
579 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
581 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
584 unsigned long cs_pin;
585 short enable_spi0 = 0;
586 short enable_spi1 = 0;
588 /* Choose SPI chip-selects */
589 for (i = 0; i < nr_devices; i++) {
590 if (devices[i].controller_data)
591 cs_pin = (unsigned long) devices[i].controller_data;
592 else if (devices[i].bus_num == 0)
593 cs_pin = spi0_standard_cs[devices[i].chip_select];
595 cs_pin = spi1_standard_cs[devices[i].chip_select];
597 if (devices[i].bus_num == 0)
602 /* enable chip-select pin */
603 at91_set_gpio_output(cs_pin, 1);
605 /* pass chip-select pin to driver */
606 devices[i].controller_data = (void *) cs_pin;
609 spi_register_board_info(devices, nr_devices);
611 /* Configure SPI bus(es) */
613 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
614 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
615 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
617 platform_device_register(&at91cap9_spi0_device);
620 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
621 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
622 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
624 platform_device_register(&at91cap9_spi1_device);
628 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
632 /* --------------------------------------------------------------------
633 * Timer/Counter block
634 * -------------------------------------------------------------------- */
636 #ifdef CONFIG_ATMEL_TCLIB
638 static struct resource tcb_resources[] = {
640 .start = AT91CAP9_BASE_TCB0,
641 .end = AT91CAP9_BASE_TCB0 + SZ_16K - 1,
642 .flags = IORESOURCE_MEM,
645 .start = AT91CAP9_ID_TCB,
646 .end = AT91CAP9_ID_TCB,
647 .flags = IORESOURCE_IRQ,
651 static struct platform_device at91cap9_tcb_device = {
654 .resource = tcb_resources,
655 .num_resources = ARRAY_SIZE(tcb_resources),
658 static void __init at91_add_device_tc(void)
660 platform_device_register(&at91cap9_tcb_device);
663 static void __init at91_add_device_tc(void) { }
667 /* --------------------------------------------------------------------
669 * -------------------------------------------------------------------- */
671 static struct resource rtt_resources[] = {
673 .start = AT91_BASE_SYS + AT91_RTT,
674 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
675 .flags = IORESOURCE_MEM,
679 static struct platform_device at91cap9_rtt_device = {
682 .resource = rtt_resources,
683 .num_resources = ARRAY_SIZE(rtt_resources),
686 static void __init at91_add_device_rtt(void)
688 platform_device_register(&at91cap9_rtt_device);
692 /* --------------------------------------------------------------------
694 * -------------------------------------------------------------------- */
696 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
697 static struct platform_device at91cap9_wdt_device = {
703 static void __init at91_add_device_watchdog(void)
705 platform_device_register(&at91cap9_wdt_device);
708 static void __init at91_add_device_watchdog(void) {}
712 /* --------------------------------------------------------------------
714 * --------------------------------------------------------------------*/
716 #if defined(CONFIG_ATMEL_PWM)
719 static struct resource pwm_resources[] = {
721 .start = AT91CAP9_BASE_PWMC,
722 .end = AT91CAP9_BASE_PWMC + SZ_16K - 1,
723 .flags = IORESOURCE_MEM,
726 .start = AT91CAP9_ID_PWMC,
727 .end = AT91CAP9_ID_PWMC,
728 .flags = IORESOURCE_IRQ,
732 static struct platform_device at91cap9_pwm0_device = {
736 .platform_data = &pwm_mask,
738 .resource = pwm_resources,
739 .num_resources = ARRAY_SIZE(pwm_resources),
742 void __init at91_add_device_pwm(u32 mask)
744 if (mask & (1 << AT91_PWM0))
745 at91_set_A_periph(AT91_PIN_PB19, 1); /* enable PWM0 */
747 if (mask & (1 << AT91_PWM1))
748 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
750 if (mask & (1 << AT91_PWM2))
751 at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
753 if (mask & (1 << AT91_PWM3))
754 at91_set_B_periph(AT91_PIN_PA11, 1); /* enable PWM3 */
758 platform_device_register(&at91cap9_pwm0_device);
761 void __init at91_add_device_pwm(u32 mask) {}
766 /* --------------------------------------------------------------------
768 * -------------------------------------------------------------------- */
770 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
771 static u64 ac97_dmamask = DMA_BIT_MASK(32);
772 static struct ac97c_platform_data ac97_data;
774 static struct resource ac97_resources[] = {
776 .start = AT91CAP9_BASE_AC97C,
777 .end = AT91CAP9_BASE_AC97C + SZ_16K - 1,
778 .flags = IORESOURCE_MEM,
781 .start = AT91CAP9_ID_AC97C,
782 .end = AT91CAP9_ID_AC97C,
783 .flags = IORESOURCE_IRQ,
787 static struct platform_device at91cap9_ac97_device = {
788 .name = "atmel_ac97c",
791 .dma_mask = &ac97_dmamask,
792 .coherent_dma_mask = DMA_BIT_MASK(32),
793 .platform_data = &ac97_data,
795 .resource = ac97_resources,
796 .num_resources = ARRAY_SIZE(ac97_resources),
799 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
804 at91_set_A_periph(AT91_PIN_PA6, 0); /* AC97FS */
805 at91_set_A_periph(AT91_PIN_PA7, 0); /* AC97CK */
806 at91_set_A_periph(AT91_PIN_PA8, 0); /* AC97TX */
807 at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */
811 at91_set_gpio_output(data->reset_pin, 0);
814 platform_device_register(&at91cap9_ac97_device);
817 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
821 /* --------------------------------------------------------------------
823 * -------------------------------------------------------------------- */
825 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
826 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
827 static struct atmel_lcdfb_info lcdc_data;
829 static struct resource lcdc_resources[] = {
831 .start = AT91CAP9_LCDC_BASE,
832 .end = AT91CAP9_LCDC_BASE + SZ_4K - 1,
833 .flags = IORESOURCE_MEM,
836 .start = AT91CAP9_ID_LCDC,
837 .end = AT91CAP9_ID_LCDC,
838 .flags = IORESOURCE_IRQ,
842 static struct platform_device at91_lcdc_device = {
843 .name = "atmel_lcdfb",
846 .dma_mask = &lcdc_dmamask,
847 .coherent_dma_mask = DMA_BIT_MASK(32),
848 .platform_data = &lcdc_data,
850 .resource = lcdc_resources,
851 .num_resources = ARRAY_SIZE(lcdc_resources),
854 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
859 if (cpu_is_at91cap9_revB())
860 irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
862 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
863 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
864 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
865 at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
866 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
867 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
868 at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
869 at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
870 at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
871 at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
872 at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
873 at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
874 at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
875 at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD13 */
876 at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
877 at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
878 at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
879 at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
880 at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
881 at91_set_A_periph(AT91_PIN_PC25, 0); /* LCDD21 */
882 at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
883 at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
886 platform_device_register(&at91_lcdc_device);
889 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
893 /* --------------------------------------------------------------------
894 * SSC -- Synchronous Serial Controller
895 * -------------------------------------------------------------------- */
897 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
898 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
900 static struct resource ssc0_resources[] = {
902 .start = AT91CAP9_BASE_SSC0,
903 .end = AT91CAP9_BASE_SSC0 + SZ_16K - 1,
904 .flags = IORESOURCE_MEM,
907 .start = AT91CAP9_ID_SSC0,
908 .end = AT91CAP9_ID_SSC0,
909 .flags = IORESOURCE_IRQ,
913 static struct platform_device at91cap9_ssc0_device = {
917 .dma_mask = &ssc0_dmamask,
918 .coherent_dma_mask = DMA_BIT_MASK(32),
920 .resource = ssc0_resources,
921 .num_resources = ARRAY_SIZE(ssc0_resources),
924 static inline void configure_ssc0_pins(unsigned pins)
926 if (pins & ATMEL_SSC_TF)
927 at91_set_A_periph(AT91_PIN_PB0, 1);
928 if (pins & ATMEL_SSC_TK)
929 at91_set_A_periph(AT91_PIN_PB1, 1);
930 if (pins & ATMEL_SSC_TD)
931 at91_set_A_periph(AT91_PIN_PB2, 1);
932 if (pins & ATMEL_SSC_RD)
933 at91_set_A_periph(AT91_PIN_PB3, 1);
934 if (pins & ATMEL_SSC_RK)
935 at91_set_A_periph(AT91_PIN_PB4, 1);
936 if (pins & ATMEL_SSC_RF)
937 at91_set_A_periph(AT91_PIN_PB5, 1);
940 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
942 static struct resource ssc1_resources[] = {
944 .start = AT91CAP9_BASE_SSC1,
945 .end = AT91CAP9_BASE_SSC1 + SZ_16K - 1,
946 .flags = IORESOURCE_MEM,
949 .start = AT91CAP9_ID_SSC1,
950 .end = AT91CAP9_ID_SSC1,
951 .flags = IORESOURCE_IRQ,
955 static struct platform_device at91cap9_ssc1_device = {
959 .dma_mask = &ssc1_dmamask,
960 .coherent_dma_mask = DMA_BIT_MASK(32),
962 .resource = ssc1_resources,
963 .num_resources = ARRAY_SIZE(ssc1_resources),
966 static inline void configure_ssc1_pins(unsigned pins)
968 if (pins & ATMEL_SSC_TF)
969 at91_set_A_periph(AT91_PIN_PB6, 1);
970 if (pins & ATMEL_SSC_TK)
971 at91_set_A_periph(AT91_PIN_PB7, 1);
972 if (pins & ATMEL_SSC_TD)
973 at91_set_A_periph(AT91_PIN_PB8, 1);
974 if (pins & ATMEL_SSC_RD)
975 at91_set_A_periph(AT91_PIN_PB9, 1);
976 if (pins & ATMEL_SSC_RK)
977 at91_set_A_periph(AT91_PIN_PB10, 1);
978 if (pins & ATMEL_SSC_RF)
979 at91_set_A_periph(AT91_PIN_PB11, 1);
983 * SSC controllers are accessed through library code, instead of any
984 * kind of all-singing/all-dancing driver. For example one could be
985 * used by a particular I2S audio codec's driver, while another one
986 * on the same system might be used by a custom data capture driver.
988 void __init at91_add_device_ssc(unsigned id, unsigned pins)
990 struct platform_device *pdev;
993 * NOTE: caller is responsible for passing information matching
994 * "pins" to whatever will be using each particular controller.
997 case AT91CAP9_ID_SSC0:
998 pdev = &at91cap9_ssc0_device;
999 configure_ssc0_pins(pins);
1001 case AT91CAP9_ID_SSC1:
1002 pdev = &at91cap9_ssc1_device;
1003 configure_ssc1_pins(pins);
1009 platform_device_register(pdev);
1013 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1017 /* --------------------------------------------------------------------
1019 * -------------------------------------------------------------------- */
1021 #if defined(CONFIG_SERIAL_ATMEL)
1022 static struct resource dbgu_resources[] = {
1024 .start = AT91_BASE_SYS + AT91_DBGU,
1025 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1026 .flags = IORESOURCE_MEM,
1029 .start = AT91_ID_SYS,
1031 .flags = IORESOURCE_IRQ,
1035 static struct atmel_uart_data dbgu_data = {
1037 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1040 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1042 static struct platform_device at91cap9_dbgu_device = {
1043 .name = "atmel_usart",
1046 .dma_mask = &dbgu_dmamask,
1047 .coherent_dma_mask = DMA_BIT_MASK(32),
1048 .platform_data = &dbgu_data,
1050 .resource = dbgu_resources,
1051 .num_resources = ARRAY_SIZE(dbgu_resources),
1054 static inline void configure_dbgu_pins(void)
1056 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
1057 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
1060 static struct resource uart0_resources[] = {
1062 .start = AT91CAP9_BASE_US0,
1063 .end = AT91CAP9_BASE_US0 + SZ_16K - 1,
1064 .flags = IORESOURCE_MEM,
1067 .start = AT91CAP9_ID_US0,
1068 .end = AT91CAP9_ID_US0,
1069 .flags = IORESOURCE_IRQ,
1073 static struct atmel_uart_data uart0_data = {
1078 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1080 static struct platform_device at91cap9_uart0_device = {
1081 .name = "atmel_usart",
1084 .dma_mask = &uart0_dmamask,
1085 .coherent_dma_mask = DMA_BIT_MASK(32),
1086 .platform_data = &uart0_data,
1088 .resource = uart0_resources,
1089 .num_resources = ARRAY_SIZE(uart0_resources),
1092 static inline void configure_usart0_pins(unsigned pins)
1094 at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */
1095 at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */
1097 if (pins & ATMEL_UART_RTS)
1098 at91_set_A_periph(AT91_PIN_PA24, 0); /* RTS0 */
1099 if (pins & ATMEL_UART_CTS)
1100 at91_set_A_periph(AT91_PIN_PA25, 0); /* CTS0 */
1103 static struct resource uart1_resources[] = {
1105 .start = AT91CAP9_BASE_US1,
1106 .end = AT91CAP9_BASE_US1 + SZ_16K - 1,
1107 .flags = IORESOURCE_MEM,
1110 .start = AT91CAP9_ID_US1,
1111 .end = AT91CAP9_ID_US1,
1112 .flags = IORESOURCE_IRQ,
1116 static struct atmel_uart_data uart1_data = {
1121 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1123 static struct platform_device at91cap9_uart1_device = {
1124 .name = "atmel_usart",
1127 .dma_mask = &uart1_dmamask,
1128 .coherent_dma_mask = DMA_BIT_MASK(32),
1129 .platform_data = &uart1_data,
1131 .resource = uart1_resources,
1132 .num_resources = ARRAY_SIZE(uart1_resources),
1135 static inline void configure_usart1_pins(unsigned pins)
1137 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
1138 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
1140 if (pins & ATMEL_UART_RTS)
1141 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
1142 if (pins & ATMEL_UART_CTS)
1143 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
1146 static struct resource uart2_resources[] = {
1148 .start = AT91CAP9_BASE_US2,
1149 .end = AT91CAP9_BASE_US2 + SZ_16K - 1,
1150 .flags = IORESOURCE_MEM,
1153 .start = AT91CAP9_ID_US2,
1154 .end = AT91CAP9_ID_US2,
1155 .flags = IORESOURCE_IRQ,
1159 static struct atmel_uart_data uart2_data = {
1164 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1166 static struct platform_device at91cap9_uart2_device = {
1167 .name = "atmel_usart",
1170 .dma_mask = &uart2_dmamask,
1171 .coherent_dma_mask = DMA_BIT_MASK(32),
1172 .platform_data = &uart2_data,
1174 .resource = uart2_resources,
1175 .num_resources = ARRAY_SIZE(uart2_resources),
1178 static inline void configure_usart2_pins(unsigned pins)
1180 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
1181 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
1183 if (pins & ATMEL_UART_RTS)
1184 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
1185 if (pins & ATMEL_UART_CTS)
1186 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
1189 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1190 struct platform_device *atmel_default_console_device; /* the serial console device */
1192 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1194 struct platform_device *pdev;
1195 struct atmel_uart_data *pdata;
1199 pdev = &at91cap9_dbgu_device;
1200 configure_dbgu_pins();
1202 case AT91CAP9_ID_US0:
1203 pdev = &at91cap9_uart0_device;
1204 configure_usart0_pins(pins);
1206 case AT91CAP9_ID_US1:
1207 pdev = &at91cap9_uart1_device;
1208 configure_usart1_pins(pins);
1210 case AT91CAP9_ID_US2:
1211 pdev = &at91cap9_uart2_device;
1212 configure_usart2_pins(pins);
1217 pdata = pdev->dev.platform_data;
1218 pdata->num = portnr; /* update to mapped ID */
1220 if (portnr < ATMEL_MAX_UART)
1221 at91_uarts[portnr] = pdev;
1224 void __init at91_set_serial_console(unsigned portnr)
1226 if (portnr < ATMEL_MAX_UART) {
1227 atmel_default_console_device = at91_uarts[portnr];
1228 at91cap9_set_console_clock(at91_uarts[portnr]->id);
1232 void __init at91_add_device_serial(void)
1236 for (i = 0; i < ATMEL_MAX_UART; i++) {
1238 platform_device_register(at91_uarts[i]);
1241 if (!atmel_default_console_device)
1242 printk(KERN_INFO "AT91: No default serial console defined.\n");
1245 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1246 void __init at91_set_serial_console(unsigned portnr) {}
1247 void __init at91_add_device_serial(void) {}
1251 /* -------------------------------------------------------------------- */
1253 * These devices are always present and don't need any board-specific
1256 static int __init at91_add_standard_devices(void)
1258 at91_add_device_rtt();
1259 at91_add_device_watchdog();
1260 at91_add_device_tc();
1264 arch_initcall(at91_add_standard_devices);