arch/arm/mach-at91/at91rm9200_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91rm9200_devices.c
   3  *
   4  *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
   5  *  Copyright (C) 2005 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  */
  13 #include <asm/mach/arch.h>
  14 #include <asm/mach/map.h>
  15
  16 #include <linux/dma-mapping.h>
  17 #include <linux/gpio.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/i2c-gpio.h>
  20
  21 #include <mach/at91rm9200.h>
  22 #include <mach/at91rm9200_mc.h>
  23 #include <mach/at91_ramc.h>
  24 #include <mach/hardware.h>
  25
  26 #include "board.h"
  27 #include "generic.h"
  28 #include "gpio.h"
  29
  30
  31 /* --------------------------------------------------------------------
  32  *  USB Host
  33  * -------------------------------------------------------------------- */
  34
  35 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  36 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  37 static struct at91_usbh_data usbh_data;
  38
  39 static struct resource usbh_resources[] = {
  40         [0] = {
  41                 .start  = AT91RM9200_UHP_BASE,
  42                 .end    = AT91RM9200_UHP_BASE + SZ_1M - 1,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = {
  46                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
  47                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
  48                 .flags  = IORESOURCE_IRQ,
  49         },
  50 };
  51
  52 static struct platform_device at91rm9200_usbh_device = {
  53         .name           = "at91_ohci",
  54         .id             = -1,
  55         .dev            = {
  56                                 .dma_mask               = &ohci_dmamask,
  57                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  58                                 .platform_data          = &usbh_data,
  59         },
  60         .resource       = usbh_resources,
  61         .num_resources  = ARRAY_SIZE(usbh_resources),
  62 };
  63
  64 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  65 {
  66         int i;
  67
  68         if (!data)
  69                 return;
  70
  71         /* Enable overcurrent notification */
  72         for (i = 0; i < data->ports; i++) {
  73                 if (gpio_is_valid(data->overcurrent_pin[i]))
  74                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
  75         }
  76
  77         usbh_data = *data;
  78         platform_device_register(&at91rm9200_usbh_device);
  79 }
  80 #else
  81 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  82 #endif
  83
  84
  85 /* --------------------------------------------------------------------
  86  *  USB Device (Gadget)
  87  * -------------------------------------------------------------------- */
  88
  89 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
  90 static struct at91_udc_data udc_data;
  91
  92 static struct resource udc_resources[] = {
  93         [0] = {
  94                 .start  = AT91RM9200_BASE_UDP,
  95                 .end    = AT91RM9200_BASE_UDP + SZ_16K - 1,
  96                 .flags  = IORESOURCE_MEM,
  97         },
  98         [1] = {
  99                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
 100                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
 101                 .flags  = IORESOURCE_IRQ,
 102         },
 103 };
 104
 105 static struct platform_device at91rm9200_udc_device = {
 106         .name           = "at91_udc",
 107         .id             = -1,
 108         .dev            = {
 109                                 .platform_data          = &udc_data,
 110         },
 111         .resource       = udc_resources,
 112         .num_resources  = ARRAY_SIZE(udc_resources),
 113 };
 114
 115 void __init at91_add_device_udc(struct at91_udc_data *data)
 116 {
 117         if (!data)
 118                 return;
 119
 120         if (gpio_is_valid(data->vbus_pin)) {
 121                 at91_set_gpio_input(data->vbus_pin, 0);
 122                 at91_set_deglitch(data->vbus_pin, 1);
 123         }
 124         if (gpio_is_valid(data->pullup_pin))
 125                 at91_set_gpio_output(data->pullup_pin, 0);
 126
 127         udc_data = *data;
 128         platform_device_register(&at91rm9200_udc_device);
 129 }
 130 #else
 131 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 132 #endif
 133
 134
 135 /* --------------------------------------------------------------------
 136  *  Ethernet
 137  * -------------------------------------------------------------------- */
 138
 139 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
 140 static u64 eth_dmamask = DMA_BIT_MASK(32);
 141 static struct macb_platform_data eth_data;
 142
 143 static struct resource eth_resources[] = {
 144         [0] = {
 145                 .start  = AT91RM9200_BASE_EMAC,
 146                 .end    = AT91RM9200_BASE_EMAC + SZ_16K - 1,
 147                 .flags  = IORESOURCE_MEM,
 148         },
 149         [1] = {
 150                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
 151                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
 152                 .flags  = IORESOURCE_IRQ,
 153         },
 154 };
 155
 156 static struct platform_device at91rm9200_eth_device = {
 157         .name           = "at91_ether",
 158         .id             = -1,
 159         .dev            = {
 160                                 .dma_mask               = &eth_dmamask,
 161                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 162                                 .platform_data          = &eth_data,
 163         },
 164         .resource       = eth_resources,
 165         .num_resources  = ARRAY_SIZE(eth_resources),
 166 };
 167
 168 void __init at91_add_device_eth(struct macb_platform_data *data)
 169 {
 170         if (!data)
 171                 return;
 172
 173         if (gpio_is_valid(data->phy_irq_pin)) {
 174                 at91_set_gpio_input(data->phy_irq_pin, 0);
 175                 at91_set_deglitch(data->phy_irq_pin, 1);
 176         }
 177
 178         /* Pins used for MII and RMII */
 179         at91_set_A_periph(AT91_PIN_PA16, 0);    /* EMDIO */
 180         at91_set_A_periph(AT91_PIN_PA15, 0);    /* EMDC */
 181         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERXER */
 182         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ERX1 */
 183         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ERX0 */
 184         at91_set_A_periph(AT91_PIN_PA11, 0);    /* ECRS_ECRSDV */
 185         at91_set_A_periph(AT91_PIN_PA10, 0);    /* ETX1 */
 186         at91_set_A_periph(AT91_PIN_PA9, 0);     /* ETX0 */
 187         at91_set_A_periph(AT91_PIN_PA8, 0);     /* ETXEN */
 188         at91_set_A_periph(AT91_PIN_PA7, 0);     /* ETXCK_EREFCK */
 189
 190         if (!data->is_rmii) {
 191                 at91_set_B_periph(AT91_PIN_PB19, 0);    /* ERXCK */
 192                 at91_set_B_periph(AT91_PIN_PB18, 0);    /* ECOL */
 193                 at91_set_B_periph(AT91_PIN_PB17, 0);    /* ERXDV */
 194                 at91_set_B_periph(AT91_PIN_PB16, 0);    /* ERX3 */
 195                 at91_set_B_periph(AT91_PIN_PB15, 0);    /* ERX2 */
 196                 at91_set_B_periph(AT91_PIN_PB14, 0);    /* ETXER */
 197                 at91_set_B_periph(AT91_PIN_PB13, 0);    /* ETX3 */
 198                 at91_set_B_periph(AT91_PIN_PB12, 0);    /* ETX2 */
 199         }
 200
 201         eth_data = *data;
 202         platform_device_register(&at91rm9200_eth_device);
 203 }
 204 #else
 205 void __init at91_add_device_eth(struct macb_platform_data *data) {}
 206 #endif
 207
 208
 209 /* --------------------------------------------------------------------
 210  *  Compact Flash / PCMCIA
 211  * -------------------------------------------------------------------- */
 212
 213 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
 214 static struct at91_cf_data cf_data;
 215
 216 #define CF_BASE         AT91_CHIPSELECT_4
 217
 218 static struct resource cf_resources[] = {
 219         [0] = {
 220                 .start  = CF_BASE,
 221                 /* ties up CS4, CS5 and CS6 */
 222                 .end    = CF_BASE + (0x30000000 - 1),
 223                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
 224         },
 225 };
 226
 227 static struct platform_device at91rm9200_cf_device = {
 228         .name           = "at91_cf",
 229         .id             = -1,
 230         .dev            = {
 231                                 .platform_data          = &cf_data,
 232         },
 233         .resource       = cf_resources,
 234         .num_resources  = ARRAY_SIZE(cf_resources),
 235 };
 236
 237 void __init at91_add_device_cf(struct at91_cf_data *data)
 238 {
 239         unsigned int csa;
 240
 241         if (!data)
 242                 return;
 243
 244         data->chipselect = 4;           /* can only use EBI ChipSelect 4 */
 245
 246         /* CF takes over CS4, CS5, CS6 */
 247         csa = at91_ramc_read(0, AT91_EBI_CSA);
 248         at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
 249
 250         /*
 251          * Static memory controller timing adjustments.
 252          * REVISIT:  these timings are in terms of MCK cycles, so
 253          * when MCK changes (cpufreq etc) so must these values...
 254          */
 255         at91_ramc_write(0, AT91_SMC_CSR(4),
 256                                   AT91_SMC_ACSS_STD
 257                                 | AT91_SMC_DBW_16
 258                                 | AT91_SMC_BAT
 259                                 | AT91_SMC_WSEN
 260                                 | AT91_SMC_NWS_(32)     /* wait states */
 261                                 | AT91_SMC_RWSETUP_(6)  /* setup time */
 262                                 | AT91_SMC_RWHOLD_(4)   /* hold time */
 263         );
 264
 265         /* input/irq */
 266         if (gpio_is_valid(data->irq_pin)) {
 267                 at91_set_gpio_input(data->irq_pin, 1);
 268                 at91_set_deglitch(data->irq_pin, 1);
 269         }
 270         at91_set_gpio_input(data->det_pin, 1);
 271         at91_set_deglitch(data->det_pin, 1);
 272
 273         /* outputs, initially off */
 274         if (gpio_is_valid(data->vcc_pin))
 275                 at91_set_gpio_output(data->vcc_pin, 0);
 276         at91_set_gpio_output(data->rst_pin, 0);
 277
 278         /* force poweron defaults for these pins ... */
 279         at91_set_A_periph(AT91_PIN_PC9, 0);     /* A25/CFRNW */
 280         at91_set_A_periph(AT91_PIN_PC10, 0);    /* NCS4/CFCS */
 281         at91_set_A_periph(AT91_PIN_PC11, 0);    /* NCS5/CFCE1 */
 282         at91_set_A_periph(AT91_PIN_PC12, 0);    /* NCS6/CFCE2 */
 283
 284         /* nWAIT is _not_ a default setting */
 285         at91_set_A_periph(AT91_PIN_PC6, 1);     /* nWAIT */
 286
 287         cf_data = *data;
 288         platform_device_register(&at91rm9200_cf_device);
 289 }
 290 #else
 291 void __init at91_add_device_cf(struct at91_cf_data *data) {}
 292 #endif
 293
 294
 295 /* --------------------------------------------------------------------
 296  *  MMC / SD
 297  * -------------------------------------------------------------------- */
 298
 299 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
 300 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 301 static struct mci_platform_data mmc_data;
 302
 303 static struct resource mmc_resources[] = {
 304         [0] = {
 305                 .start  = AT91RM9200_BASE_MCI,
 306                 .end    = AT91RM9200_BASE_MCI + SZ_16K - 1,
 307                 .flags  = IORESOURCE_MEM,
 308         },
 309         [1] = {
 310                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
 311                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
 312                 .flags  = IORESOURCE_IRQ,
 313         },
 314 };
 315
 316 static struct platform_device at91rm9200_mmc_device = {
 317         .name           = "atmel_mci",
 318         .id             = -1,
 319         .dev            = {
 320                                 .dma_mask               = &mmc_dmamask,
 321                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 322                                 .platform_data          = &mmc_data,
 323         },
 324         .resource       = mmc_resources,
 325         .num_resources  = ARRAY_SIZE(mmc_resources),
 326 };
 327
 328 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 329 {
 330         unsigned int i;
 331         unsigned int slot_count = 0;
 332
 333         if (!data)
 334                 return;
 335
 336         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
 337
 338                 if (!data->slot[i].bus_width)
 339                         continue;
 340
 341                 /* input/irq */
 342                 if (gpio_is_valid(data->slot[i].detect_pin)) {
 343                         at91_set_gpio_input(data->slot[i].detect_pin, 1);
 344                         at91_set_deglitch(data->slot[i].detect_pin, 1);
 345                 }
 346                 if (gpio_is_valid(data->slot[i].wp_pin))
 347                         at91_set_gpio_input(data->slot[i].wp_pin, 1);
 348
 349                 switch (i) {
 350                 case 0:                                 /* slot A */
 351                         /* CMD */
 352                         at91_set_A_periph(AT91_PIN_PA28, 1);
 353                         /* DAT0, maybe DAT1..DAT3 */
 354                         at91_set_A_periph(AT91_PIN_PA29, 1);
 355                         if (data->slot[i].bus_width == 4) {
 356                                 at91_set_B_periph(AT91_PIN_PB3, 1);
 357                                 at91_set_B_periph(AT91_PIN_PB4, 1);
 358                                 at91_set_B_periph(AT91_PIN_PB5, 1);
 359                         }
 360                         slot_count++;
 361                         break;
 362                 case 1:                                 /* slot B */
 363                         /* CMD */
 364                         at91_set_B_periph(AT91_PIN_PA8, 1);
 365                         /* DAT0, maybe DAT1..DAT3 */
 366                         at91_set_B_periph(AT91_PIN_PA9, 1);
 367                         if (data->slot[i].bus_width == 4) {
 368                                 at91_set_B_periph(AT91_PIN_PA10, 1);
 369                                 at91_set_B_periph(AT91_PIN_PA11, 1);
 370                                 at91_set_B_periph(AT91_PIN_PA12, 1);
 371                         }
 372                         slot_count++;
 373                         break;
 374                 default:
 375                         printk(KERN_ERR
 376                                "AT91: SD/MMC slot %d not available\n", i);
 377                         break;
 378                 }
 379                 if (slot_count) {
 380                         /* CLK */
 381                         at91_set_A_periph(AT91_PIN_PA27, 0);
 382
 383                         mmc_data = *data;
 384                         platform_device_register(&at91rm9200_mmc_device);
 385                 }
 386         }
 387
 388 }
 389 #else
 390 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
 391 #endif
 392
 393
 394 /* --------------------------------------------------------------------
 395  *  NAND / SmartMedia
 396  * -------------------------------------------------------------------- */
 397
 398 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 399 static struct atmel_nand_data nand_data;
 400
 401 #define NAND_BASE       AT91_CHIPSELECT_3
 402
 403 static struct resource nand_resources[] = {
 404         {
 405                 .start  = NAND_BASE,
 406                 .end    = NAND_BASE + SZ_256M - 1,
 407                 .flags  = IORESOURCE_MEM,
 408         }
 409 };
 410
 411 static struct platform_device at91rm9200_nand_device = {
 412         .name           = "atmel_nand",
 413         .id             = -1,
 414         .dev            = {
 415                                 .platform_data  = &nand_data,
 416         },
 417         .resource       = nand_resources,
 418         .num_resources  = ARRAY_SIZE(nand_resources),
 419 };
 420
 421 void __init at91_add_device_nand(struct atmel_nand_data *data)
 422 {
 423         unsigned int csa;
 424
 425         if (!data)
 426                 return;
 427
 428         /* enable the address range of CS3 */
 429         csa = at91_ramc_read(0, AT91_EBI_CSA);
 430         at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
 431
 432         /* set the bus interface characteristics */
 433         at91_ramc_write(0, AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
 434                 | AT91_SMC_NWS_(5)
 435                 | AT91_SMC_TDF_(1)
 436                 | AT91_SMC_RWSETUP_(0)  /* tDS Data Set up Time 30 - ns */
 437                 | AT91_SMC_RWHOLD_(1)   /* tDH Data Hold Time 20 - ns */
 438         );
 439
 440         /* enable pin */
 441         if (gpio_is_valid(data->enable_pin))
 442                 at91_set_gpio_output(data->enable_pin, 1);
 443
 444         /* ready/busy pin */
 445         if (gpio_is_valid(data->rdy_pin))
 446                 at91_set_gpio_input(data->rdy_pin, 1);
 447
 448         /* card detect pin */
 449         if (gpio_is_valid(data->det_pin))
 450                 at91_set_gpio_input(data->det_pin, 1);
 451
 452         at91_set_A_periph(AT91_PIN_PC1, 0);             /* SMOE */
 453         at91_set_A_periph(AT91_PIN_PC3, 0);             /* SMWE */
 454
 455         nand_data = *data;
 456         platform_device_register(&at91rm9200_nand_device);
 457 }
 458 #else
 459 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 460 #endif
 461
 462
 463 /* --------------------------------------------------------------------
 464  *  TWI (i2c)
 465  * -------------------------------------------------------------------- */
 466
 467 /*
 468  * Prefer the GPIO code since the TWI controller isn't robust
 469  * (gets overruns and underruns under load) and can only issue
 470  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 471  */
 472 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 473
 474 static struct i2c_gpio_platform_data pdata = {
 475         .sda_pin                = AT91_PIN_PA25,
 476         .sda_is_open_drain      = 1,
 477         .scl_pin                = AT91_PIN_PA26,
 478         .scl_is_open_drain      = 1,
 479         .udelay                 = 2,            /* ~100 kHz */
 480 };
 481
 482 static struct platform_device at91rm9200_twi_device = {
 483         .name                   = "i2c-gpio",
 484         .id                     = 0,
 485         .dev.platform_data      = &pdata,
 486 };
 487
 488 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 489 {
 490         at91_set_GPIO_periph(AT91_PIN_PA25, 1);         /* TWD (SDA) */
 491         at91_set_multi_drive(AT91_PIN_PA25, 1);
 492
 493         at91_set_GPIO_periph(AT91_PIN_PA26, 1);         /* TWCK (SCL) */
 494         at91_set_multi_drive(AT91_PIN_PA26, 1);
 495
 496         i2c_register_board_info(0, devices, nr_devices);
 497         platform_device_register(&at91rm9200_twi_device);
 498 }
 499
 500 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 501
 502 static struct resource twi_resources[] = {
 503         [0] = {
 504                 .start  = AT91RM9200_BASE_TWI,
 505                 .end    = AT91RM9200_BASE_TWI + SZ_16K - 1,
 506                 .flags  = IORESOURCE_MEM,
 507         },
 508         [1] = {
 509                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
 510                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
 511                 .flags  = IORESOURCE_IRQ,
 512         },
 513 };
 514
 515 static struct platform_device at91rm9200_twi_device = {
 516         .name           = "i2c-at91rm9200",
 517         .id             = 0,
 518         .resource       = twi_resources,
 519         .num_resources  = ARRAY_SIZE(twi_resources),
 520 };
 521
 522 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 523 {
 524         /* pins used for TWI interface */
 525         at91_set_A_periph(AT91_PIN_PA25, 0);            /* TWD */
 526         at91_set_multi_drive(AT91_PIN_PA25, 1);
 527
 528         at91_set_A_periph(AT91_PIN_PA26, 0);            /* TWCK */
 529         at91_set_multi_drive(AT91_PIN_PA26, 1);
 530
 531         i2c_register_board_info(0, devices, nr_devices);
 532         platform_device_register(&at91rm9200_twi_device);
 533 }
 534 #else
 535 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 536 #endif
 537
 538
 539 /* --------------------------------------------------------------------
 540  *  SPI
 541  * -------------------------------------------------------------------- */
 542
 543 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 544 static u64 spi_dmamask = DMA_BIT_MASK(32);
 545
 546 static struct resource spi_resources[] = {
 547         [0] = {
 548                 .start  = AT91RM9200_BASE_SPI,
 549                 .end    = AT91RM9200_BASE_SPI + SZ_16K - 1,
 550                 .flags  = IORESOURCE_MEM,
 551         },
 552         [1] = {
 553                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
 554                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
 555                 .flags  = IORESOURCE_IRQ,
 556         },
 557 };
 558
 559 static struct platform_device at91rm9200_spi_device = {
 560         .name           = "atmel_spi",
 561         .id             = 0,
 562         .dev            = {
 563                                 .dma_mask               = &spi_dmamask,
 564                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 565         },
 566         .resource       = spi_resources,
 567         .num_resources  = ARRAY_SIZE(spi_resources),
 568 };
 569
 570 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
 571
 572 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 573 {
 574         int i;
 575         unsigned long cs_pin;
 576
 577         at91_set_A_periph(AT91_PIN_PA0, 0);     /* MISO */
 578         at91_set_A_periph(AT91_PIN_PA1, 0);     /* MOSI */
 579         at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPCK */
 580
 581         /* Enable SPI chip-selects */
 582         for (i = 0; i < nr_devices; i++) {
 583                 if (devices[i].controller_data)
 584                         cs_pin = (unsigned long) devices[i].controller_data;
 585                 else
 586                         cs_pin = spi_standard_cs[devices[i].chip_select];
 587
 588                 if (devices[i].chip_select == 0)        /* for CS0 errata */
 589                         at91_set_A_periph(cs_pin, 0);
 590                 else
 591                         at91_set_gpio_output(cs_pin, 1);
 592
 593
 594                 /* pass chip-select pin to driver */
 595                 devices[i].controller_data = (void *) cs_pin;
 596         }
 597
 598         spi_register_board_info(devices, nr_devices);
 599         platform_device_register(&at91rm9200_spi_device);
 600 }
 601 #else
 602 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 603 #endif
 604
 605
 606 /* --------------------------------------------------------------------
 607  *  Timer/Counter blocks
 608  * -------------------------------------------------------------------- */
 609
 610 #ifdef CONFIG_ATMEL_TCLIB
 611
 612 static struct resource tcb0_resources[] = {
 613         [0] = {
 614                 .start  = AT91RM9200_BASE_TCB0,
 615                 .end    = AT91RM9200_BASE_TCB0 + SZ_16K - 1,
 616                 .flags  = IORESOURCE_MEM,
 617         },
 618         [1] = {
 619                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
 620                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
 621                 .flags  = IORESOURCE_IRQ,
 622         },
 623         [2] = {
 624                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
 625                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
 626                 .flags  = IORESOURCE_IRQ,
 627         },
 628         [3] = {
 629                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
 630                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
 631                 .flags  = IORESOURCE_IRQ,
 632         },
 633 };
 634
 635 static struct platform_device at91rm9200_tcb0_device = {
 636         .name           = "atmel_tcb",
 637         .id             = 0,
 638         .resource       = tcb0_resources,
 639         .num_resources  = ARRAY_SIZE(tcb0_resources),
 640 };
 641
 642 static struct resource tcb1_resources[] = {
 643         [0] = {
 644                 .start  = AT91RM9200_BASE_TCB1,
 645                 .end    = AT91RM9200_BASE_TCB1 + SZ_16K - 1,
 646                 .flags  = IORESOURCE_MEM,
 647         },
 648         [1] = {
 649                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
 650                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
 651                 .flags  = IORESOURCE_IRQ,
 652         },
 653         [2] = {
 654                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
 655                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
 656                 .flags  = IORESOURCE_IRQ,
 657         },
 658         [3] = {
 659                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
 660                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
 661                 .flags  = IORESOURCE_IRQ,
 662         },
 663 };
 664
 665 static struct platform_device at91rm9200_tcb1_device = {
 666         .name           = "atmel_tcb",
 667         .id             = 1,
 668         .resource       = tcb1_resources,
 669         .num_resources  = ARRAY_SIZE(tcb1_resources),
 670 };
 671
 672 static void __init at91_add_device_tc(void)
 673 {
 674         platform_device_register(&at91rm9200_tcb0_device);
 675         platform_device_register(&at91rm9200_tcb1_device);
 676 }
 677 #else
 678 static void __init at91_add_device_tc(void) { }
 679 #endif
 680
 681
 682 /* --------------------------------------------------------------------
 683  *  RTC
 684  * -------------------------------------------------------------------- */
 685
 686 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
 687 static struct resource rtc_resources[] = {
 688         [0] = {
 689                 .start  = AT91RM9200_BASE_RTC,
 690                 .end    = AT91RM9200_BASE_RTC + SZ_256 - 1,
 691                 .flags  = IORESOURCE_MEM,
 692         },
 693         [1] = {
 694                 .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
 695                 .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
 696                 .flags  = IORESOURCE_IRQ,
 697         },
 698 };
 699
 700 static struct platform_device at91rm9200_rtc_device = {
 701         .name           = "at91_rtc",
 702         .id             = -1,
 703         .resource       = rtc_resources,
 704         .num_resources  = ARRAY_SIZE(rtc_resources),
 705 };
 706
 707 static void __init at91_add_device_rtc(void)
 708 {
 709         platform_device_register(&at91rm9200_rtc_device);
 710 }
 711 #else
 712 static void __init at91_add_device_rtc(void) {}
 713 #endif
 714
 715
 716 /* --------------------------------------------------------------------
 717  *  Watchdog
 718  * -------------------------------------------------------------------- */
 719
 720 #if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
 721 static struct platform_device at91rm9200_wdt_device = {
 722         .name           = "at91_wdt",
 723         .id             = -1,
 724         .num_resources  = 0,
 725 };
 726
 727 static void __init at91_add_device_watchdog(void)
 728 {
 729         platform_device_register(&at91rm9200_wdt_device);
 730 }
 731 #else
 732 static void __init at91_add_device_watchdog(void) {}
 733 #endif
 734
 735
 736 /* --------------------------------------------------------------------
 737  *  SSC -- Synchronous Serial Controller
 738  * -------------------------------------------------------------------- */
 739
 740 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 741 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 742
 743 static struct resource ssc0_resources[] = {
 744         [0] = {
 745                 .start  = AT91RM9200_BASE_SSC0,
 746                 .end    = AT91RM9200_BASE_SSC0 + SZ_16K - 1,
 747                 .flags  = IORESOURCE_MEM,
 748         },
 749         [1] = {
 750                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
 751                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
 752                 .flags  = IORESOURCE_IRQ,
 753         },
 754 };
 755
 756 static struct platform_device at91rm9200_ssc0_device = {
 757         .name   = "at91rm9200_ssc",
 758         .id     = 0,
 759         .dev    = {
 760                 .dma_mask               = &ssc0_dmamask,
 761                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 762         },
 763         .resource       = ssc0_resources,
 764         .num_resources  = ARRAY_SIZE(ssc0_resources),
 765 };
 766
 767 static inline void configure_ssc0_pins(unsigned pins)
 768 {
 769         if (pins & ATMEL_SSC_TF)
 770                 at91_set_A_periph(AT91_PIN_PB0, 1);
 771         if (pins & ATMEL_SSC_TK)
 772                 at91_set_A_periph(AT91_PIN_PB1, 1);
 773         if (pins & ATMEL_SSC_TD)
 774                 at91_set_A_periph(AT91_PIN_PB2, 1);
 775         if (pins & ATMEL_SSC_RD)
 776                 at91_set_A_periph(AT91_PIN_PB3, 1);
 777         if (pins & ATMEL_SSC_RK)
 778                 at91_set_A_periph(AT91_PIN_PB4, 1);
 779         if (pins & ATMEL_SSC_RF)
 780                 at91_set_A_periph(AT91_PIN_PB5, 1);
 781 }
 782
 783 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 784
 785 static struct resource ssc1_resources[] = {
 786         [0] = {
 787                 .start  = AT91RM9200_BASE_SSC1,
 788                 .end    = AT91RM9200_BASE_SSC1 + SZ_16K - 1,
 789                 .flags  = IORESOURCE_MEM,
 790         },
 791         [1] = {
 792                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
 793                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
 794                 .flags  = IORESOURCE_IRQ,
 795         },
 796 };
 797
 798 static struct platform_device at91rm9200_ssc1_device = {
 799         .name   = "at91rm9200_ssc",
 800         .id     = 1,
 801         .dev    = {
 802                 .dma_mask               = &ssc1_dmamask,
 803                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 804         },
 805         .resource       = ssc1_resources,
 806         .num_resources  = ARRAY_SIZE(ssc1_resources),
 807 };
 808
 809 static inline void configure_ssc1_pins(unsigned pins)
 810 {
 811         if (pins & ATMEL_SSC_TF)
 812                 at91_set_A_periph(AT91_PIN_PB6, 1);
 813         if (pins & ATMEL_SSC_TK)
 814                 at91_set_A_periph(AT91_PIN_PB7, 1);
 815         if (pins & ATMEL_SSC_TD)
 816                 at91_set_A_periph(AT91_PIN_PB8, 1);
 817         if (pins & ATMEL_SSC_RD)
 818                 at91_set_A_periph(AT91_PIN_PB9, 1);
 819         if (pins & ATMEL_SSC_RK)
 820                 at91_set_A_periph(AT91_PIN_PB10, 1);
 821         if (pins & ATMEL_SSC_RF)
 822                 at91_set_A_periph(AT91_PIN_PB11, 1);
 823 }
 824
 825 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
 826
 827 static struct resource ssc2_resources[] = {
 828         [0] = {
 829                 .start  = AT91RM9200_BASE_SSC2,
 830                 .end    = AT91RM9200_BASE_SSC2 + SZ_16K - 1,
 831                 .flags  = IORESOURCE_MEM,
 832         },
 833         [1] = {
 834                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
 835                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
 836                 .flags  = IORESOURCE_IRQ,
 837         },
 838 };
 839
 840 static struct platform_device at91rm9200_ssc2_device = {
 841         .name   = "at91rm9200_ssc",
 842         .id     = 2,
 843         .dev    = {
 844                 .dma_mask               = &ssc2_dmamask,
 845                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 846         },
 847         .resource       = ssc2_resources,
 848         .num_resources  = ARRAY_SIZE(ssc2_resources),
 849 };
 850
 851 static inline void configure_ssc2_pins(unsigned pins)
 852 {
 853         if (pins & ATMEL_SSC_TF)
 854                 at91_set_A_periph(AT91_PIN_PB12, 1);
 855         if (pins & ATMEL_SSC_TK)
 856                 at91_set_A_periph(AT91_PIN_PB13, 1);
 857         if (pins & ATMEL_SSC_TD)
 858                 at91_set_A_periph(AT91_PIN_PB14, 1);
 859         if (pins & ATMEL_SSC_RD)
 860                 at91_set_A_periph(AT91_PIN_PB15, 1);
 861         if (pins & ATMEL_SSC_RK)
 862                 at91_set_A_periph(AT91_PIN_PB16, 1);
 863         if (pins & ATMEL_SSC_RF)
 864                 at91_set_A_periph(AT91_PIN_PB17, 1);
 865 }
 866
 867 /*
 868  * SSC controllers are accessed through library code, instead of any
 869  * kind of all-singing/all-dancing driver.  For example one could be
 870  * used by a particular I2S audio codec's driver, while another one
 871  * on the same system might be used by a custom data capture driver.
 872  */
 873 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 874 {
 875         struct platform_device *pdev;
 876
 877         /*
 878          * NOTE: caller is responsible for passing information matching
 879          * "pins" to whatever will be using each particular controller.
 880          */
 881         switch (id) {
 882         case AT91RM9200_ID_SSC0:
 883                 pdev = &at91rm9200_ssc0_device;
 884                 configure_ssc0_pins(pins);
 885                 break;
 886         case AT91RM9200_ID_SSC1:
 887                 pdev = &at91rm9200_ssc1_device;
 888                 configure_ssc1_pins(pins);
 889                 break;
 890         case AT91RM9200_ID_SSC2:
 891                 pdev = &at91rm9200_ssc2_device;
 892                 configure_ssc2_pins(pins);
 893                 break;
 894         default:
 895                 return;
 896         }
 897
 898         platform_device_register(pdev);
 899 }
 900
 901 #else
 902 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 903 #endif
 904
 905
 906 /* --------------------------------------------------------------------
 907  *  UART
 908  * -------------------------------------------------------------------- */
 909
 910 #if defined(CONFIG_SERIAL_ATMEL)
 911 static struct resource dbgu_resources[] = {
 912         [0] = {
 913                 .start  = AT91RM9200_BASE_DBGU,
 914                 .end    = AT91RM9200_BASE_DBGU + SZ_512 - 1,
 915                 .flags  = IORESOURCE_MEM,
 916         },
 917         [1] = {
 918                 .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
 919                 .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
 920                 .flags  = IORESOURCE_IRQ,
 921         },
 922 };
 923
 924 static struct atmel_uart_data dbgu_data = {
 925         .use_dma_tx     = 0,
 926         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 927         .rts_gpio       = -EINVAL,
 928 };
 929
 930 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 931
 932 static struct platform_device at91rm9200_dbgu_device = {
 933         .name           = "atmel_usart",
 934         .id             = 0,
 935         .dev            = {
 936                                 .dma_mask               = &dbgu_dmamask,
 937                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 938                                 .platform_data          = &dbgu_data,
 939         },
 940         .resource       = dbgu_resources,
 941         .num_resources  = ARRAY_SIZE(dbgu_resources),
 942 };
 943
 944 static inline void configure_dbgu_pins(void)
 945 {
 946         at91_set_A_periph(AT91_PIN_PA30, 0);            /* DRXD */
 947         at91_set_A_periph(AT91_PIN_PA31, 1);            /* DTXD */
 948 }
 949
 950 static struct resource uart0_resources[] = {
 951         [0] = {
 952                 .start  = AT91RM9200_BASE_US0,
 953                 .end    = AT91RM9200_BASE_US0 + SZ_16K - 1,
 954                 .flags  = IORESOURCE_MEM,
 955         },
 956         [1] = {
 957                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
 958                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
 959                 .flags  = IORESOURCE_IRQ,
 960         },
 961 };
 962
 963 static struct atmel_uart_data uart0_data = {
 964         .use_dma_tx     = 1,
 965         .use_dma_rx     = 1,
 966         .rts_gpio       = -EINVAL,
 967 };
 968
 969 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 970
 971 static struct platform_device at91rm9200_uart0_device = {
 972         .name           = "atmel_usart",
 973         .id             = 1,
 974         .dev            = {
 975                                 .dma_mask               = &uart0_dmamask,
 976                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 977                                 .platform_data          = &uart0_data,
 978         },
 979         .resource       = uart0_resources,
 980         .num_resources  = ARRAY_SIZE(uart0_resources),
 981 };
 982
 983 static inline void configure_usart0_pins(unsigned pins)
 984 {
 985         at91_set_A_periph(AT91_PIN_PA17, 1);            /* TXD0 */
 986         at91_set_A_periph(AT91_PIN_PA18, 0);            /* RXD0 */
 987
 988         if (pins & ATMEL_UART_CTS)
 989                 at91_set_A_periph(AT91_PIN_PA20, 0);    /* CTS0 */
 990
 991         if (pins & ATMEL_UART_RTS) {
 992                 /*
 993                  * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
 994                  * We need to drive the pin manually. The serial driver will driver
 995                  * this to high when initializing.
 996                  */
 997                 uart0_data.rts_gpio = AT91_PIN_PA21;
 998         }
 999 }
1000
1001 static struct resource uart1_resources[] = {
1002         [0] = {
1003                 .start  = AT91RM9200_BASE_US1,
1004                 .end    = AT91RM9200_BASE_US1 + SZ_16K - 1,
1005                 .flags  = IORESOURCE_MEM,
1006         },
1007         [1] = {
1008                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
1009                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
1010                 .flags  = IORESOURCE_IRQ,
1011         },
1012 };
1013
1014 static struct atmel_uart_data uart1_data = {
1015         .use_dma_tx     = 1,
1016         .use_dma_rx     = 1,
1017         .rts_gpio       = -EINVAL,
1018 };
1019
1020 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1021
1022 static struct platform_device at91rm9200_uart1_device = {
1023         .name           = "atmel_usart",
1024         .id             = 2,
1025         .dev            = {
1026                                 .dma_mask               = &uart1_dmamask,
1027                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1028                                 .platform_data          = &uart1_data,
1029         },
1030         .resource       = uart1_resources,
1031         .num_resources  = ARRAY_SIZE(uart1_resources),
1032 };
1033
1034 static inline void configure_usart1_pins(unsigned pins)
1035 {
1036         at91_set_A_periph(AT91_PIN_PB20, 1);            /* TXD1 */
1037         at91_set_A_periph(AT91_PIN_PB21, 0);            /* RXD1 */
1038
1039         if (pins & ATMEL_UART_RI)
1040                 at91_set_A_periph(AT91_PIN_PB18, 0);    /* RI1 */
1041         if (pins & ATMEL_UART_DTR)
1042                 at91_set_A_periph(AT91_PIN_PB19, 0);    /* DTR1 */
1043         if (pins & ATMEL_UART_DCD)
1044                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD1 */
1045         if (pins & ATMEL_UART_CTS)
1046                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* CTS1 */
1047         if (pins & ATMEL_UART_DSR)
1048                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* DSR1 */
1049         if (pins & ATMEL_UART_RTS)
1050                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS1 */
1051 }
1052
1053 static struct resource uart2_resources[] = {
1054         [0] = {
1055                 .start  = AT91RM9200_BASE_US2,
1056                 .end    = AT91RM9200_BASE_US2 + SZ_16K - 1,
1057                 .flags  = IORESOURCE_MEM,
1058         },
1059         [1] = {
1060                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1061                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1062                 .flags  = IORESOURCE_IRQ,
1063         },
1064 };
1065
1066 static struct atmel_uart_data uart2_data = {
1067         .use_dma_tx     = 1,
1068         .use_dma_rx     = 1,
1069         .rts_gpio       = -EINVAL,
1070 };
1071
1072 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1073
1074 static struct platform_device at91rm9200_uart2_device = {
1075         .name           = "atmel_usart",
1076         .id             = 3,
1077         .dev            = {
1078                                 .dma_mask               = &uart2_dmamask,
1079                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1080                                 .platform_data          = &uart2_data,
1081         },
1082         .resource       = uart2_resources,
1083         .num_resources  = ARRAY_SIZE(uart2_resources),
1084 };
1085
1086 static inline void configure_usart2_pins(unsigned pins)
1087 {
1088         at91_set_A_periph(AT91_PIN_PA22, 0);            /* RXD2 */
1089         at91_set_A_periph(AT91_PIN_PA23, 1);            /* TXD2 */
1090
1091         if (pins & ATMEL_UART_CTS)
1092                 at91_set_B_periph(AT91_PIN_PA30, 0);    /* CTS2 */
1093         if (pins & ATMEL_UART_RTS)
1094                 at91_set_B_periph(AT91_PIN_PA31, 0);    /* RTS2 */
1095 }
1096
1097 static struct resource uart3_resources[] = {
1098         [0] = {
1099                 .start  = AT91RM9200_BASE_US3,
1100                 .end    = AT91RM9200_BASE_US3 + SZ_16K - 1,
1101                 .flags  = IORESOURCE_MEM,
1102         },
1103         [1] = {
1104                 .start  = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1105                 .end    = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1106                 .flags  = IORESOURCE_IRQ,
1107         },
1108 };
1109
1110 static struct atmel_uart_data uart3_data = {
1111         .use_dma_tx     = 1,
1112         .use_dma_rx     = 1,
1113         .rts_gpio       = -EINVAL,
1114 };
1115
1116 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1117
1118 static struct platform_device at91rm9200_uart3_device = {
1119         .name           = "atmel_usart",
1120         .id             = 4,
1121         .dev            = {
1122                                 .dma_mask               = &uart3_dmamask,
1123                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1124                                 .platform_data          = &uart3_data,
1125         },
1126         .resource       = uart3_resources,
1127         .num_resources  = ARRAY_SIZE(uart3_resources),
1128 };
1129
1130 static inline void configure_usart3_pins(unsigned pins)
1131 {
1132         at91_set_B_periph(AT91_PIN_PA5, 1);             /* TXD3 */
1133         at91_set_B_periph(AT91_PIN_PA6, 0);             /* RXD3 */
1134
1135         if (pins & ATMEL_UART_CTS)
1136                 at91_set_B_periph(AT91_PIN_PB1, 0);     /* CTS3 */
1137         if (pins & ATMEL_UART_RTS)
1138                 at91_set_B_periph(AT91_PIN_PB0, 0);     /* RTS3 */
1139 }
1140
1141 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1142
1143 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1144 {
1145         struct platform_device *pdev;
1146         struct atmel_uart_data *pdata;
1147
1148         switch (id) {
1149                 case 0:         /* DBGU */
1150                         pdev = &at91rm9200_dbgu_device;
1151                         configure_dbgu_pins();
1152                         break;
1153                 case AT91RM9200_ID_US0:
1154                         pdev = &at91rm9200_uart0_device;
1155                         configure_usart0_pins(pins);
1156                         break;
1157                 case AT91RM9200_ID_US1:
1158                         pdev = &at91rm9200_uart1_device;
1159                         configure_usart1_pins(pins);
1160                         break;
1161                 case AT91RM9200_ID_US2:
1162                         pdev = &at91rm9200_uart2_device;
1163                         configure_usart2_pins(pins);
1164                         break;
1165                 case AT91RM9200_ID_US3:
1166                         pdev = &at91rm9200_uart3_device;
1167                         configure_usart3_pins(pins);
1168                         break;
1169                 default:
1170                         return;
1171         }
1172         pdata = pdev->dev.platform_data;
1173         pdata->num = portnr;            /* update to mapped ID */
1174
1175         if (portnr < ATMEL_MAX_UART)
1176                 at91_uarts[portnr] = pdev;
1177 }
1178
1179 void __init at91_add_device_serial(void)
1180 {
1181         int i;
1182
1183         for (i = 0; i < ATMEL_MAX_UART; i++) {
1184                 if (at91_uarts[i])
1185                         platform_device_register(at91_uarts[i]);
1186         }
1187 }
1188 #else
1189 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1190 void __init at91_add_device_serial(void) {}
1191 #endif
1192
1193
1194 /* -------------------------------------------------------------------- */
1195
1196 /*
1197  * These devices are always present and don't need any board-specific
1198  * setup.
1199  */
1200 static int __init at91_add_standard_devices(void)
1201 {
1202         at91_add_device_rtc();
1203         at91_add_device_watchdog();
1204         at91_add_device_tc();
1205         return 0;
1206 }
1207
1208 arch_initcall(at91_add_standard_devices);