2 * arch/arm/mach-at91/at91rm9200_devices.c
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/gpio.h>
18 #include <linux/gpio/machine.h>
19 #include <linux/platform_device.h>
20 #include <linux/i2c-gpio.h>
22 #include <mach/at91rm9200.h>
23 #include <mach/at91rm9200_mc.h>
24 #include <mach/at91_ramc.h>
25 #include <mach/hardware.h>
32 /* --------------------------------------------------------------------
34 * -------------------------------------------------------------------- */
36 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
37 static u64 ohci_dmamask = DMA_BIT_MASK(32);
38 static struct at91_usbh_data usbh_data;
40 static struct resource usbh_resources[] = {
42 .start = AT91RM9200_UHP_BASE,
43 .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
44 .flags = IORESOURCE_MEM,
47 .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
48 .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
49 .flags = IORESOURCE_IRQ,
53 static struct platform_device at91rm9200_usbh_device = {
57 .dma_mask = &ohci_dmamask,
58 .coherent_dma_mask = DMA_BIT_MASK(32),
59 .platform_data = &usbh_data,
61 .resource = usbh_resources,
62 .num_resources = ARRAY_SIZE(usbh_resources),
65 void __init at91_add_device_usbh(struct at91_usbh_data *data)
72 /* Enable overcurrent notification */
73 for (i = 0; i < data->ports; i++) {
74 if (gpio_is_valid(data->overcurrent_pin[i]))
75 at91_set_gpio_input(data->overcurrent_pin[i], 1);
79 platform_device_register(&at91rm9200_usbh_device);
82 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
86 /* --------------------------------------------------------------------
88 * -------------------------------------------------------------------- */
90 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
91 static struct at91_udc_data udc_data;
93 static struct resource udc_resources[] = {
95 .start = AT91RM9200_BASE_UDP,
96 .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
97 .flags = IORESOURCE_MEM,
100 .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
101 .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
102 .flags = IORESOURCE_IRQ,
106 static struct platform_device at91rm9200_udc_device = {
110 .platform_data = &udc_data,
112 .resource = udc_resources,
113 .num_resources = ARRAY_SIZE(udc_resources),
116 void __init at91_add_device_udc(struct at91_udc_data *data)
121 if (gpio_is_valid(data->vbus_pin)) {
122 at91_set_gpio_input(data->vbus_pin, 0);
123 at91_set_deglitch(data->vbus_pin, 1);
125 if (gpio_is_valid(data->pullup_pin))
126 at91_set_gpio_output(data->pullup_pin, 0);
129 platform_device_register(&at91rm9200_udc_device);
132 void __init at91_add_device_udc(struct at91_udc_data *data) {}
136 /* --------------------------------------------------------------------
138 * -------------------------------------------------------------------- */
140 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
141 static u64 eth_dmamask = DMA_BIT_MASK(32);
142 static struct macb_platform_data eth_data;
144 static struct resource eth_resources[] = {
146 .start = AT91RM9200_BASE_EMAC,
147 .end = AT91RM9200_BASE_EMAC + SZ_16K - 1,
148 .flags = IORESOURCE_MEM,
151 .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
152 .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
153 .flags = IORESOURCE_IRQ,
157 static struct platform_device at91rm9200_eth_device = {
158 .name = "at91_ether",
161 .dma_mask = ð_dmamask,
162 .coherent_dma_mask = DMA_BIT_MASK(32),
163 .platform_data = ð_data,
165 .resource = eth_resources,
166 .num_resources = ARRAY_SIZE(eth_resources),
169 void __init at91_add_device_eth(struct macb_platform_data *data)
174 if (gpio_is_valid(data->phy_irq_pin)) {
175 at91_set_gpio_input(data->phy_irq_pin, 0);
176 at91_set_deglitch(data->phy_irq_pin, 1);
179 /* Pins used for MII and RMII */
180 at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
181 at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
182 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
183 at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
184 at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
185 at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
186 at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
187 at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
188 at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
189 at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
191 if (!data->is_rmii) {
192 at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
193 at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
194 at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
195 at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
196 at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
197 at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
198 at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
199 at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
203 platform_device_register(&at91rm9200_eth_device);
206 void __init at91_add_device_eth(struct macb_platform_data *data) {}
210 /* --------------------------------------------------------------------
211 * Compact Flash / PCMCIA
212 * -------------------------------------------------------------------- */
214 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
215 static struct at91_cf_data cf_data;
217 #define CF_BASE AT91_CHIPSELECT_4
219 static struct resource cf_resources[] = {
222 /* ties up CS4, CS5 and CS6 */
223 .end = CF_BASE + (0x30000000 - 1),
224 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
228 static struct platform_device at91rm9200_cf_device = {
232 .platform_data = &cf_data,
234 .resource = cf_resources,
235 .num_resources = ARRAY_SIZE(cf_resources),
238 void __init at91_add_device_cf(struct at91_cf_data *data)
245 data->chipselect = 4; /* can only use EBI ChipSelect 4 */
247 /* CF takes over CS4, CS5, CS6 */
248 csa = at91_ramc_read(0, AT91_EBI_CSA);
249 at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
252 * Static memory controller timing adjustments.
253 * REVISIT: these timings are in terms of MCK cycles, so
254 * when MCK changes (cpufreq etc) so must these values...
256 at91_ramc_write(0, AT91_SMC_CSR(4),
261 | AT91_SMC_NWS_(32) /* wait states */
262 | AT91_SMC_RWSETUP_(6) /* setup time */
263 | AT91_SMC_RWHOLD_(4) /* hold time */
267 if (gpio_is_valid(data->irq_pin)) {
268 at91_set_gpio_input(data->irq_pin, 1);
269 at91_set_deglitch(data->irq_pin, 1);
271 at91_set_gpio_input(data->det_pin, 1);
272 at91_set_deglitch(data->det_pin, 1);
274 /* outputs, initially off */
275 if (gpio_is_valid(data->vcc_pin))
276 at91_set_gpio_output(data->vcc_pin, 0);
277 at91_set_gpio_output(data->rst_pin, 0);
279 /* force poweron defaults for these pins ... */
280 at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
281 at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
282 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
283 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
285 /* nWAIT is _not_ a default setting */
286 at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
289 platform_device_register(&at91rm9200_cf_device);
292 void __init at91_add_device_cf(struct at91_cf_data *data) {}
296 /* --------------------------------------------------------------------
298 * -------------------------------------------------------------------- */
300 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
301 static u64 mmc_dmamask = DMA_BIT_MASK(32);
302 static struct mci_platform_data mmc_data;
304 static struct resource mmc_resources[] = {
306 .start = AT91RM9200_BASE_MCI,
307 .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
308 .flags = IORESOURCE_MEM,
311 .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
312 .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
313 .flags = IORESOURCE_IRQ,
317 static struct platform_device at91rm9200_mmc_device = {
321 .dma_mask = &mmc_dmamask,
322 .coherent_dma_mask = DMA_BIT_MASK(32),
323 .platform_data = &mmc_data,
325 .resource = mmc_resources,
326 .num_resources = ARRAY_SIZE(mmc_resources),
329 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
332 unsigned int slot_count = 0;
337 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
339 if (!data->slot[i].bus_width)
343 if (gpio_is_valid(data->slot[i].detect_pin)) {
344 at91_set_gpio_input(data->slot[i].detect_pin, 1);
345 at91_set_deglitch(data->slot[i].detect_pin, 1);
347 if (gpio_is_valid(data->slot[i].wp_pin))
348 at91_set_gpio_input(data->slot[i].wp_pin, 1);
353 at91_set_A_periph(AT91_PIN_PA28, 1);
354 /* DAT0, maybe DAT1..DAT3 */
355 at91_set_A_periph(AT91_PIN_PA29, 1);
356 if (data->slot[i].bus_width == 4) {
357 at91_set_B_periph(AT91_PIN_PB3, 1);
358 at91_set_B_periph(AT91_PIN_PB4, 1);
359 at91_set_B_periph(AT91_PIN_PB5, 1);
365 at91_set_B_periph(AT91_PIN_PA8, 1);
366 /* DAT0, maybe DAT1..DAT3 */
367 at91_set_B_periph(AT91_PIN_PA9, 1);
368 if (data->slot[i].bus_width == 4) {
369 at91_set_B_periph(AT91_PIN_PA10, 1);
370 at91_set_B_periph(AT91_PIN_PA11, 1);
371 at91_set_B_periph(AT91_PIN_PA12, 1);
377 "AT91: SD/MMC slot %d not available\n", i);
382 at91_set_A_periph(AT91_PIN_PA27, 0);
385 platform_device_register(&at91rm9200_mmc_device);
391 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
395 /* --------------------------------------------------------------------
397 * -------------------------------------------------------------------- */
399 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
400 static struct atmel_nand_data nand_data;
402 #define NAND_BASE AT91_CHIPSELECT_3
404 static struct resource nand_resources[] = {
407 .end = NAND_BASE + SZ_256M - 1,
408 .flags = IORESOURCE_MEM,
412 static struct platform_device at91rm9200_nand_device = {
413 .name = "atmel_nand",
416 .platform_data = &nand_data,
418 .resource = nand_resources,
419 .num_resources = ARRAY_SIZE(nand_resources),
422 void __init at91_add_device_nand(struct atmel_nand_data *data)
429 /* enable the address range of CS3 */
430 csa = at91_ramc_read(0, AT91_EBI_CSA);
431 at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
433 /* set the bus interface characteristics */
434 at91_ramc_write(0, AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
437 | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
438 | AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */
442 if (gpio_is_valid(data->enable_pin))
443 at91_set_gpio_output(data->enable_pin, 1);
446 if (gpio_is_valid(data->rdy_pin))
447 at91_set_gpio_input(data->rdy_pin, 1);
449 /* card detect pin */
450 if (gpio_is_valid(data->det_pin))
451 at91_set_gpio_input(data->det_pin, 1);
453 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
454 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
457 platform_device_register(&at91rm9200_nand_device);
460 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
464 /* --------------------------------------------------------------------
466 * -------------------------------------------------------------------- */
469 * Prefer the GPIO code since the TWI controller isn't robust
470 * (gets overruns and underruns under load) and can only issue
471 * repeated STARTs in one scenario (the driver doesn't yet handle them).
473 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
475 static struct i2c_gpio_platform_data pdata = {
476 .sda_pin = AT91_PIN_PA25,
477 .sda_is_open_drain = 1,
478 .scl_pin = AT91_PIN_PA26,
479 .scl_is_open_drain = 1,
480 .udelay = 2, /* ~100 kHz */
483 static struct platform_device at91rm9200_twi_device = {
486 .dev.platform_data = &pdata,
489 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
491 at91_set_GPIO_periph(AT91_PIN_PA25, 1); /* TWD (SDA) */
492 at91_set_multi_drive(AT91_PIN_PA25, 1);
494 at91_set_GPIO_periph(AT91_PIN_PA26, 1); /* TWCK (SCL) */
495 at91_set_multi_drive(AT91_PIN_PA26, 1);
497 i2c_register_board_info(0, devices, nr_devices);
498 platform_device_register(&at91rm9200_twi_device);
501 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
503 static struct resource twi_resources[] = {
505 .start = AT91RM9200_BASE_TWI,
506 .end = AT91RM9200_BASE_TWI + SZ_16K - 1,
507 .flags = IORESOURCE_MEM,
510 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
511 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
512 .flags = IORESOURCE_IRQ,
516 static struct platform_device at91rm9200_twi_device = {
517 .name = "i2c-at91rm9200",
519 .resource = twi_resources,
520 .num_resources = ARRAY_SIZE(twi_resources),
523 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
525 /* pins used for TWI interface */
526 at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
527 at91_set_multi_drive(AT91_PIN_PA25, 1);
529 at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
530 at91_set_multi_drive(AT91_PIN_PA26, 1);
532 i2c_register_board_info(0, devices, nr_devices);
533 platform_device_register(&at91rm9200_twi_device);
536 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
540 /* --------------------------------------------------------------------
542 * -------------------------------------------------------------------- */
544 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
545 static u64 spi_dmamask = DMA_BIT_MASK(32);
547 static struct resource spi_resources[] = {
549 .start = AT91RM9200_BASE_SPI,
550 .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
551 .flags = IORESOURCE_MEM,
554 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
555 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
556 .flags = IORESOURCE_IRQ,
560 static struct platform_device at91rm9200_spi_device = {
564 .dma_mask = &spi_dmamask,
565 .coherent_dma_mask = DMA_BIT_MASK(32),
567 .resource = spi_resources,
568 .num_resources = ARRAY_SIZE(spi_resources),
571 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
573 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
576 unsigned long cs_pin;
578 at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */
579 at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */
580 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */
582 /* Enable SPI chip-selects */
583 for (i = 0; i < nr_devices; i++) {
584 if (devices[i].controller_data)
585 cs_pin = (unsigned long) devices[i].controller_data;
587 cs_pin = spi_standard_cs[devices[i].chip_select];
589 if (devices[i].chip_select == 0) /* for CS0 errata */
590 at91_set_A_periph(cs_pin, 0);
592 at91_set_gpio_output(cs_pin, 1);
595 /* pass chip-select pin to driver */
596 devices[i].controller_data = (void *) cs_pin;
599 spi_register_board_info(devices, nr_devices);
600 platform_device_register(&at91rm9200_spi_device);
603 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
607 /* --------------------------------------------------------------------
608 * Timer/Counter blocks
609 * -------------------------------------------------------------------- */
611 #ifdef CONFIG_ATMEL_TCLIB
613 static struct resource tcb0_resources[] = {
615 .start = AT91RM9200_BASE_TCB0,
616 .end = AT91RM9200_BASE_TCB0 + SZ_16K - 1,
617 .flags = IORESOURCE_MEM,
620 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
621 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
622 .flags = IORESOURCE_IRQ,
625 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
626 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
627 .flags = IORESOURCE_IRQ,
630 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
631 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
632 .flags = IORESOURCE_IRQ,
636 static struct platform_device at91rm9200_tcb0_device = {
639 .resource = tcb0_resources,
640 .num_resources = ARRAY_SIZE(tcb0_resources),
643 static struct resource tcb1_resources[] = {
645 .start = AT91RM9200_BASE_TCB1,
646 .end = AT91RM9200_BASE_TCB1 + SZ_16K - 1,
647 .flags = IORESOURCE_MEM,
650 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
651 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
652 .flags = IORESOURCE_IRQ,
655 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
656 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
657 .flags = IORESOURCE_IRQ,
660 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
661 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
662 .flags = IORESOURCE_IRQ,
666 static struct platform_device at91rm9200_tcb1_device = {
669 .resource = tcb1_resources,
670 .num_resources = ARRAY_SIZE(tcb1_resources),
673 static void __init at91_add_device_tc(void)
675 platform_device_register(&at91rm9200_tcb0_device);
676 platform_device_register(&at91rm9200_tcb1_device);
679 static void __init at91_add_device_tc(void) { }
683 /* --------------------------------------------------------------------
685 * -------------------------------------------------------------------- */
687 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
688 static struct resource rtc_resources[] = {
690 .start = AT91RM9200_BASE_RTC,
691 .end = AT91RM9200_BASE_RTC + SZ_256 - 1,
692 .flags = IORESOURCE_MEM,
695 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
696 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
697 .flags = IORESOURCE_IRQ,
701 static struct platform_device at91rm9200_rtc_device = {
704 .resource = rtc_resources,
705 .num_resources = ARRAY_SIZE(rtc_resources),
708 static void __init at91_add_device_rtc(void)
710 platform_device_register(&at91rm9200_rtc_device);
713 static void __init at91_add_device_rtc(void) {}
717 /* --------------------------------------------------------------------
719 * -------------------------------------------------------------------- */
721 #if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
722 static struct platform_device at91rm9200_wdt_device = {
728 static void __init at91_add_device_watchdog(void)
730 platform_device_register(&at91rm9200_wdt_device);
733 static void __init at91_add_device_watchdog(void) {}
737 /* --------------------------------------------------------------------
738 * SSC -- Synchronous Serial Controller
739 * -------------------------------------------------------------------- */
741 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
742 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
744 static struct resource ssc0_resources[] = {
746 .start = AT91RM9200_BASE_SSC0,
747 .end = AT91RM9200_BASE_SSC0 + SZ_16K - 1,
748 .flags = IORESOURCE_MEM,
751 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
752 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
753 .flags = IORESOURCE_IRQ,
757 static struct platform_device at91rm9200_ssc0_device = {
758 .name = "at91rm9200_ssc",
761 .dma_mask = &ssc0_dmamask,
762 .coherent_dma_mask = DMA_BIT_MASK(32),
764 .resource = ssc0_resources,
765 .num_resources = ARRAY_SIZE(ssc0_resources),
768 static inline void configure_ssc0_pins(unsigned pins)
770 if (pins & ATMEL_SSC_TF)
771 at91_set_A_periph(AT91_PIN_PB0, 1);
772 if (pins & ATMEL_SSC_TK)
773 at91_set_A_periph(AT91_PIN_PB1, 1);
774 if (pins & ATMEL_SSC_TD)
775 at91_set_A_periph(AT91_PIN_PB2, 1);
776 if (pins & ATMEL_SSC_RD)
777 at91_set_A_periph(AT91_PIN_PB3, 1);
778 if (pins & ATMEL_SSC_RK)
779 at91_set_A_periph(AT91_PIN_PB4, 1);
780 if (pins & ATMEL_SSC_RF)
781 at91_set_A_periph(AT91_PIN_PB5, 1);
784 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
786 static struct resource ssc1_resources[] = {
788 .start = AT91RM9200_BASE_SSC1,
789 .end = AT91RM9200_BASE_SSC1 + SZ_16K - 1,
790 .flags = IORESOURCE_MEM,
793 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
794 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
795 .flags = IORESOURCE_IRQ,
799 static struct platform_device at91rm9200_ssc1_device = {
800 .name = "at91rm9200_ssc",
803 .dma_mask = &ssc1_dmamask,
804 .coherent_dma_mask = DMA_BIT_MASK(32),
806 .resource = ssc1_resources,
807 .num_resources = ARRAY_SIZE(ssc1_resources),
810 static inline void configure_ssc1_pins(unsigned pins)
812 if (pins & ATMEL_SSC_TF)
813 at91_set_A_periph(AT91_PIN_PB6, 1);
814 if (pins & ATMEL_SSC_TK)
815 at91_set_A_periph(AT91_PIN_PB7, 1);
816 if (pins & ATMEL_SSC_TD)
817 at91_set_A_periph(AT91_PIN_PB8, 1);
818 if (pins & ATMEL_SSC_RD)
819 at91_set_A_periph(AT91_PIN_PB9, 1);
820 if (pins & ATMEL_SSC_RK)
821 at91_set_A_periph(AT91_PIN_PB10, 1);
822 if (pins & ATMEL_SSC_RF)
823 at91_set_A_periph(AT91_PIN_PB11, 1);
826 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
828 static struct resource ssc2_resources[] = {
830 .start = AT91RM9200_BASE_SSC2,
831 .end = AT91RM9200_BASE_SSC2 + SZ_16K - 1,
832 .flags = IORESOURCE_MEM,
835 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
836 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
837 .flags = IORESOURCE_IRQ,
841 static struct platform_device at91rm9200_ssc2_device = {
842 .name = "at91rm9200_ssc",
845 .dma_mask = &ssc2_dmamask,
846 .coherent_dma_mask = DMA_BIT_MASK(32),
848 .resource = ssc2_resources,
849 .num_resources = ARRAY_SIZE(ssc2_resources),
852 static inline void configure_ssc2_pins(unsigned pins)
854 if (pins & ATMEL_SSC_TF)
855 at91_set_A_periph(AT91_PIN_PB12, 1);
856 if (pins & ATMEL_SSC_TK)
857 at91_set_A_periph(AT91_PIN_PB13, 1);
858 if (pins & ATMEL_SSC_TD)
859 at91_set_A_periph(AT91_PIN_PB14, 1);
860 if (pins & ATMEL_SSC_RD)
861 at91_set_A_periph(AT91_PIN_PB15, 1);
862 if (pins & ATMEL_SSC_RK)
863 at91_set_A_periph(AT91_PIN_PB16, 1);
864 if (pins & ATMEL_SSC_RF)
865 at91_set_A_periph(AT91_PIN_PB17, 1);
869 * SSC controllers are accessed through library code, instead of any
870 * kind of all-singing/all-dancing driver. For example one could be
871 * used by a particular I2S audio codec's driver, while another one
872 * on the same system might be used by a custom data capture driver.
874 void __init at91_add_device_ssc(unsigned id, unsigned pins)
876 struct platform_device *pdev;
879 * NOTE: caller is responsible for passing information matching
880 * "pins" to whatever will be using each particular controller.
883 case AT91RM9200_ID_SSC0:
884 pdev = &at91rm9200_ssc0_device;
885 configure_ssc0_pins(pins);
887 case AT91RM9200_ID_SSC1:
888 pdev = &at91rm9200_ssc1_device;
889 configure_ssc1_pins(pins);
891 case AT91RM9200_ID_SSC2:
892 pdev = &at91rm9200_ssc2_device;
893 configure_ssc2_pins(pins);
899 platform_device_register(pdev);
903 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
907 /* --------------------------------------------------------------------
909 * -------------------------------------------------------------------- */
911 #if defined(CONFIG_SERIAL_ATMEL)
912 static struct resource dbgu_resources[] = {
914 .start = AT91RM9200_BASE_DBGU,
915 .end = AT91RM9200_BASE_DBGU + SZ_512 - 1,
916 .flags = IORESOURCE_MEM,
919 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
920 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
921 .flags = IORESOURCE_IRQ,
925 static struct atmel_uart_data dbgu_data = {
927 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
930 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
932 static struct platform_device at91rm9200_dbgu_device = {
933 .name = "atmel_usart",
936 .dma_mask = &dbgu_dmamask,
937 .coherent_dma_mask = DMA_BIT_MASK(32),
938 .platform_data = &dbgu_data,
940 .resource = dbgu_resources,
941 .num_resources = ARRAY_SIZE(dbgu_resources),
944 static inline void configure_dbgu_pins(void)
946 at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
947 at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
950 static struct resource uart0_resources[] = {
952 .start = AT91RM9200_BASE_US0,
953 .end = AT91RM9200_BASE_US0 + SZ_16K - 1,
954 .flags = IORESOURCE_MEM,
957 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
958 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
959 .flags = IORESOURCE_IRQ,
963 static struct atmel_uart_data uart0_data = {
968 static struct gpiod_lookup_table uart0_gpios_table = {
969 .dev_id = "atmel_usart",
971 GPIO_LOOKUP("pioA", 21, "rts", GPIO_ACTIVE_LOW),
976 static u64 uart0_dmamask = DMA_BIT_MASK(32);
978 static struct platform_device at91rm9200_uart0_device = {
979 .name = "atmel_usart",
982 .dma_mask = &uart0_dmamask,
983 .coherent_dma_mask = DMA_BIT_MASK(32),
984 .platform_data = &uart0_data,
986 .resource = uart0_resources,
987 .num_resources = ARRAY_SIZE(uart0_resources),
990 static inline void configure_usart0_pins(unsigned pins)
992 at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
993 at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
995 if (pins & ATMEL_UART_CTS)
996 at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
998 if (pins & ATMEL_UART_RTS) {
1000 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
1001 * We need to drive the pin manually. The serial driver will driver
1002 * this to high when initializing.
1004 gpiod_add_lookup_table(&uart0_gpios_table);
1008 static struct resource uart1_resources[] = {
1010 .start = AT91RM9200_BASE_US1,
1011 .end = AT91RM9200_BASE_US1 + SZ_16K - 1,
1012 .flags = IORESOURCE_MEM,
1015 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
1016 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
1017 .flags = IORESOURCE_IRQ,
1021 static struct atmel_uart_data uart1_data = {
1026 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1028 static struct platform_device at91rm9200_uart1_device = {
1029 .name = "atmel_usart",
1032 .dma_mask = &uart1_dmamask,
1033 .coherent_dma_mask = DMA_BIT_MASK(32),
1034 .platform_data = &uart1_data,
1036 .resource = uart1_resources,
1037 .num_resources = ARRAY_SIZE(uart1_resources),
1040 static inline void configure_usart1_pins(unsigned pins)
1042 at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
1043 at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
1045 if (pins & ATMEL_UART_RI)
1046 at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
1047 if (pins & ATMEL_UART_DTR)
1048 at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
1049 if (pins & ATMEL_UART_DCD)
1050 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
1051 if (pins & ATMEL_UART_CTS)
1052 at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
1053 if (pins & ATMEL_UART_DSR)
1054 at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
1055 if (pins & ATMEL_UART_RTS)
1056 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
1059 static struct resource uart2_resources[] = {
1061 .start = AT91RM9200_BASE_US2,
1062 .end = AT91RM9200_BASE_US2 + SZ_16K - 1,
1063 .flags = IORESOURCE_MEM,
1066 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1067 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1068 .flags = IORESOURCE_IRQ,
1072 static struct atmel_uart_data uart2_data = {
1077 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1079 static struct platform_device at91rm9200_uart2_device = {
1080 .name = "atmel_usart",
1083 .dma_mask = &uart2_dmamask,
1084 .coherent_dma_mask = DMA_BIT_MASK(32),
1085 .platform_data = &uart2_data,
1087 .resource = uart2_resources,
1088 .num_resources = ARRAY_SIZE(uart2_resources),
1091 static inline void configure_usart2_pins(unsigned pins)
1093 at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
1094 at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
1096 if (pins & ATMEL_UART_CTS)
1097 at91_set_B_periph(AT91_PIN_PA30, 0); /* CTS2 */
1098 if (pins & ATMEL_UART_RTS)
1099 at91_set_B_periph(AT91_PIN_PA31, 0); /* RTS2 */
1102 static struct resource uart3_resources[] = {
1104 .start = AT91RM9200_BASE_US3,
1105 .end = AT91RM9200_BASE_US3 + SZ_16K - 1,
1106 .flags = IORESOURCE_MEM,
1109 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1110 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1111 .flags = IORESOURCE_IRQ,
1115 static struct atmel_uart_data uart3_data = {
1120 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1122 static struct platform_device at91rm9200_uart3_device = {
1123 .name = "atmel_usart",
1126 .dma_mask = &uart3_dmamask,
1127 .coherent_dma_mask = DMA_BIT_MASK(32),
1128 .platform_data = &uart3_data,
1130 .resource = uart3_resources,
1131 .num_resources = ARRAY_SIZE(uart3_resources),
1134 static inline void configure_usart3_pins(unsigned pins)
1136 at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
1137 at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
1139 if (pins & ATMEL_UART_CTS)
1140 at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
1141 if (pins & ATMEL_UART_RTS)
1142 at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
1145 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1147 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1149 struct platform_device *pdev;
1150 struct atmel_uart_data *pdata;
1154 pdev = &at91rm9200_dbgu_device;
1155 configure_dbgu_pins();
1157 case AT91RM9200_ID_US0:
1158 pdev = &at91rm9200_uart0_device;
1159 configure_usart0_pins(pins);
1161 case AT91RM9200_ID_US1:
1162 pdev = &at91rm9200_uart1_device;
1163 configure_usart1_pins(pins);
1165 case AT91RM9200_ID_US2:
1166 pdev = &at91rm9200_uart2_device;
1167 configure_usart2_pins(pins);
1169 case AT91RM9200_ID_US3:
1170 pdev = &at91rm9200_uart3_device;
1171 configure_usart3_pins(pins);
1176 pdata = pdev->dev.platform_data;
1177 pdata->num = portnr; /* update to mapped ID */
1179 if (portnr < ATMEL_MAX_UART)
1180 at91_uarts[portnr] = pdev;
1183 void __init at91_add_device_serial(void)
1187 for (i = 0; i < ATMEL_MAX_UART; i++) {
1189 platform_device_register(at91_uarts[i]);
1193 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1194 void __init at91_add_device_serial(void) {}
1198 /* -------------------------------------------------------------------- */
1201 * These devices are always present and don't need any board-specific
1204 static int __init at91_add_standard_devices(void)
1206 at91_add_device_rtc();
1207 at91_add_device_watchdog();
1208 at91_add_device_tc();
1212 arch_initcall(at91_add_standard_devices);