arch/arm/mach-at91/at91sam9260_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9260_devices.c
   3  *
   4  *  Copyright (C) 2006 Atmel
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include <linux/dma-mapping.h>
  16 #include <linux/gpio.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/i2c-gpio.h>
  19
  20 #include <linux/platform_data/at91_adc.h>
  21
  22 #include <mach/board.h>
  23 #include <mach/cpu.h>
  24 #include <mach/at91sam9260.h>
  25 #include <mach/at91sam9260_matrix.h>
  26 #include <mach/at91_matrix.h>
  27 #include <mach/at91sam9_smc.h>
  28 #include <mach/at91_adc.h>
  29
  30 #include "generic.h"
  31
  32
  33 /* --------------------------------------------------------------------
  34  *  USB Host
  35  * -------------------------------------------------------------------- */
  36
  37 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  38 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  39 static struct at91_usbh_data usbh_data;
  40
  41 static struct resource usbh_resources[] = {
  42         [0] = {
  43                 .start  = AT91SAM9260_UHP_BASE,
  44                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
  45                 .flags  = IORESOURCE_MEM,
  46         },
  47         [1] = {
  48                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
  49                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
  50                 .flags  = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct platform_device at91_usbh_device = {
  55         .name           = "at91_ohci",
  56         .id             = -1,
  57         .dev            = {
  58                                 .dma_mask               = &ohci_dmamask,
  59                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  60                                 .platform_data          = &usbh_data,
  61         },
  62         .resource       = usbh_resources,
  63         .num_resources  = ARRAY_SIZE(usbh_resources),
  64 };
  65
  66 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  67 {
  68         int i;
  69
  70         if (!data)
  71                 return;
  72
  73         /* Enable overcurrent notification */
  74         for (i = 0; i < data->ports; i++) {
  75                 if (data->overcurrent_pin[i])
  76                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
  77         }
  78
  79         usbh_data = *data;
  80         platform_device_register(&at91_usbh_device);
  81 }
  82 #else
  83 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  84 #endif
  85
  86
  87 /* --------------------------------------------------------------------
  88  *  USB Device (Gadget)
  89  * -------------------------------------------------------------------- */
  90
  91 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
  92 static struct at91_udc_data udc_data;
  93
  94 static struct resource udc_resources[] = {
  95         [0] = {
  96                 .start  = AT91SAM9260_BASE_UDP,
  97                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
  98                 .flags  = IORESOURCE_MEM,
  99         },
 100         [1] = {
 101                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
 102                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
 103                 .flags  = IORESOURCE_IRQ,
 104         },
 105 };
 106
 107 static struct platform_device at91_udc_device = {
 108         .name           = "at91_udc",
 109         .id             = -1,
 110         .dev            = {
 111                                 .platform_data          = &udc_data,
 112         },
 113         .resource       = udc_resources,
 114         .num_resources  = ARRAY_SIZE(udc_resources),
 115 };
 116
 117 void __init at91_add_device_udc(struct at91_udc_data *data)
 118 {
 119         if (!data)
 120                 return;
 121
 122         if (gpio_is_valid(data->vbus_pin)) {
 123                 at91_set_gpio_input(data->vbus_pin, 0);
 124                 at91_set_deglitch(data->vbus_pin, 1);
 125         }
 126
 127         /* Pullup pin is handled internally by USB device peripheral */
 128
 129         udc_data = *data;
 130         platform_device_register(&at91_udc_device);
 131 }
 132 #else
 133 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 134 #endif
 135
 136
 137 /* --------------------------------------------------------------------
 138  *  Ethernet
 139  * -------------------------------------------------------------------- */
 140
 141 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 142 static u64 eth_dmamask = DMA_BIT_MASK(32);
 143 static struct macb_platform_data eth_data;
 144
 145 static struct resource eth_resources[] = {
 146         [0] = {
 147                 .start  = AT91SAM9260_BASE_EMAC,
 148                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
 149                 .flags  = IORESOURCE_MEM,
 150         },
 151         [1] = {
 152                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
 153                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
 154                 .flags  = IORESOURCE_IRQ,
 155         },
 156 };
 157
 158 static struct platform_device at91sam9260_eth_device = {
 159         .name           = "macb",
 160         .id             = -1,
 161         .dev            = {
 162                                 .dma_mask               = &eth_dmamask,
 163                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 164                                 .platform_data          = &eth_data,
 165         },
 166         .resource       = eth_resources,
 167         .num_resources  = ARRAY_SIZE(eth_resources),
 168 };
 169
 170 void __init at91_add_device_eth(struct macb_platform_data *data)
 171 {
 172         if (!data)
 173                 return;
 174
 175         if (gpio_is_valid(data->phy_irq_pin)) {
 176                 at91_set_gpio_input(data->phy_irq_pin, 0);
 177                 at91_set_deglitch(data->phy_irq_pin, 1);
 178         }
 179
 180         /* Pins used for MII and RMII */
 181         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
 182         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
 183         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
 184         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
 185         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
 186         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
 187         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
 188         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
 189         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
 190         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
 191
 192         if (!data->is_rmii) {
 193                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
 194                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
 195                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
 196                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
 197                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
 198                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
 199                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
 200                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
 201         }
 202
 203         eth_data = *data;
 204         platform_device_register(&at91sam9260_eth_device);
 205 }
 206 #else
 207 void __init at91_add_device_eth(struct macb_platform_data *data) {}
 208 #endif
 209
 210
 211 /* --------------------------------------------------------------------
 212  *  MMC / SD Slot for Atmel MCI Driver
 213  * -------------------------------------------------------------------- */
 214
 215 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
 216 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 217 static struct mci_platform_data mmc_data;
 218
 219 static struct resource mmc_resources[] = {
 220         [0] = {
 221                 .start  = AT91SAM9260_BASE_MCI,
 222                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
 223                 .flags  = IORESOURCE_MEM,
 224         },
 225         [1] = {
 226                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
 227                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
 228                 .flags  = IORESOURCE_IRQ,
 229         },
 230 };
 231
 232 static struct platform_device at91sam9260_mmc_device = {
 233         .name           = "atmel_mci",
 234         .id             = -1,
 235         .dev            = {
 236                                 .dma_mask               = &mmc_dmamask,
 237                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 238                                 .platform_data          = &mmc_data,
 239         },
 240         .resource       = mmc_resources,
 241         .num_resources  = ARRAY_SIZE(mmc_resources),
 242 };
 243
 244 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 245 {
 246         unsigned int i;
 247         unsigned int slot_count = 0;
 248
 249         if (!data)
 250                 return;
 251
 252         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
 253                 if (data->slot[i].bus_width) {
 254                         /* input/irq */
 255                         if (gpio_is_valid(data->slot[i].detect_pin)) {
 256                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
 257                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
 258                         }
 259                         if (gpio_is_valid(data->slot[i].wp_pin))
 260                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
 261
 262                         switch (i) {
 263                         case 0:
 264                                 /* CMD */
 265                                 at91_set_A_periph(AT91_PIN_PA7, 1);
 266                                 /* DAT0, maybe DAT1..DAT3 */
 267                                 at91_set_A_periph(AT91_PIN_PA6, 1);
 268                                 if (data->slot[i].bus_width == 4) {
 269                                         at91_set_A_periph(AT91_PIN_PA9, 1);
 270                                         at91_set_A_periph(AT91_PIN_PA10, 1);
 271                                         at91_set_A_periph(AT91_PIN_PA11, 1);
 272                                 }
 273                                 slot_count++;
 274                                 break;
 275                         case 1:
 276                                 /* CMD */
 277                                 at91_set_B_periph(AT91_PIN_PA1, 1);
 278                                 /* DAT0, maybe DAT1..DAT3 */
 279                                 at91_set_B_periph(AT91_PIN_PA0, 1);
 280                                 if (data->slot[i].bus_width == 4) {
 281                                         at91_set_B_periph(AT91_PIN_PA5, 1);
 282                                         at91_set_B_periph(AT91_PIN_PA4, 1);
 283                                         at91_set_B_periph(AT91_PIN_PA3, 1);
 284                                 }
 285                                 slot_count++;
 286                                 break;
 287                         default:
 288                                 printk(KERN_ERR
 289                                         "AT91: SD/MMC slot %d not available\n", i);
 290                                 break;
 291                         }
 292                 }
 293         }
 294
 295         if (slot_count) {
 296                 /* CLK */
 297                 at91_set_A_periph(AT91_PIN_PA8, 0);
 298
 299                 mmc_data = *data;
 300                 platform_device_register(&at91sam9260_mmc_device);
 301         }
 302 }
 303 #else
 304 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
 305 #endif
 306
 307
 308 /* --------------------------------------------------------------------
 309  *  NAND / SmartMedia
 310  * -------------------------------------------------------------------- */
 311
 312 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 313 static struct atmel_nand_data nand_data;
 314
 315 #define NAND_BASE       AT91_CHIPSELECT_3
 316
 317 static struct resource nand_resources[] = {
 318         [0] = {
 319                 .start  = NAND_BASE,
 320                 .end    = NAND_BASE + SZ_256M - 1,
 321                 .flags  = IORESOURCE_MEM,
 322         },
 323         [1] = {
 324                 .start  = AT91SAM9260_BASE_ECC,
 325                 .end    = AT91SAM9260_BASE_ECC + SZ_512 - 1,
 326                 .flags  = IORESOURCE_MEM,
 327         }
 328 };
 329
 330 static struct platform_device at91sam9260_nand_device = {
 331         .name           = "atmel_nand",
 332         .id             = -1,
 333         .dev            = {
 334                                 .platform_data  = &nand_data,
 335         },
 336         .resource       = nand_resources,
 337         .num_resources  = ARRAY_SIZE(nand_resources),
 338 };
 339
 340 void __init at91_add_device_nand(struct atmel_nand_data *data)
 341 {
 342         unsigned long csa;
 343
 344         if (!data)
 345                 return;
 346
 347         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
 348         at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 349
 350         /* enable pin */
 351         if (gpio_is_valid(data->enable_pin))
 352                 at91_set_gpio_output(data->enable_pin, 1);
 353
 354         /* ready/busy pin */
 355         if (gpio_is_valid(data->rdy_pin))
 356                 at91_set_gpio_input(data->rdy_pin, 1);
 357
 358         /* card detect pin */
 359         if (gpio_is_valid(data->det_pin))
 360                 at91_set_gpio_input(data->det_pin, 1);
 361
 362         nand_data = *data;
 363         platform_device_register(&at91sam9260_nand_device);
 364 }
 365 #else
 366 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 367 #endif
 368
 369
 370 /* --------------------------------------------------------------------
 371  *  TWI (i2c)
 372  * -------------------------------------------------------------------- */
 373
 374 /*
 375  * Prefer the GPIO code since the TWI controller isn't robust
 376  * (gets overruns and underruns under load) and can only issue
 377  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 378  */
 379
 380 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 381
 382 static struct i2c_gpio_platform_data pdata = {
 383         .sda_pin                = AT91_PIN_PA23,
 384         .sda_is_open_drain      = 1,
 385         .scl_pin                = AT91_PIN_PA24,
 386         .scl_is_open_drain      = 1,
 387         .udelay                 = 2,            /* ~100 kHz */
 388 };
 389
 390 static struct platform_device at91sam9260_twi_device = {
 391         .name                   = "i2c-gpio",
 392         .id                     = -1,
 393         .dev.platform_data      = &pdata,
 394 };
 395
 396 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 397 {
 398         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
 399         at91_set_multi_drive(AT91_PIN_PA23, 1);
 400
 401         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
 402         at91_set_multi_drive(AT91_PIN_PA24, 1);
 403
 404         i2c_register_board_info(0, devices, nr_devices);
 405         platform_device_register(&at91sam9260_twi_device);
 406 }
 407
 408 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 409
 410 static struct resource twi_resources[] = {
 411         [0] = {
 412                 .start  = AT91SAM9260_BASE_TWI,
 413                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
 414                 .flags  = IORESOURCE_MEM,
 415         },
 416         [1] = {
 417                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
 418                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
 419                 .flags  = IORESOURCE_IRQ,
 420         },
 421 };
 422
 423 static struct platform_device at91sam9260_twi_device = {
 424         .name           = "at91_i2c",
 425         .id             = -1,
 426         .resource       = twi_resources,
 427         .num_resources  = ARRAY_SIZE(twi_resources),
 428 };
 429
 430 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 431 {
 432         /* pins used for TWI interface */
 433         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 434         at91_set_multi_drive(AT91_PIN_PA23, 1);
 435
 436         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 437         at91_set_multi_drive(AT91_PIN_PA24, 1);
 438
 439         i2c_register_board_info(0, devices, nr_devices);
 440         platform_device_register(&at91sam9260_twi_device);
 441 }
 442 #else
 443 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 444 #endif
 445
 446
 447 /* --------------------------------------------------------------------
 448  *  SPI
 449  * -------------------------------------------------------------------- */
 450
 451 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 452 static u64 spi_dmamask = DMA_BIT_MASK(32);
 453
 454 static struct resource spi0_resources[] = {
 455         [0] = {
 456                 .start  = AT91SAM9260_BASE_SPI0,
 457                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
 458                 .flags  = IORESOURCE_MEM,
 459         },
 460         [1] = {
 461                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
 462                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
 463                 .flags  = IORESOURCE_IRQ,
 464         },
 465 };
 466
 467 static struct platform_device at91sam9260_spi0_device = {
 468         .name           = "atmel_spi",
 469         .id             = 0,
 470         .dev            = {
 471                                 .dma_mask               = &spi_dmamask,
 472                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 473         },
 474         .resource       = spi0_resources,
 475         .num_resources  = ARRAY_SIZE(spi0_resources),
 476 };
 477
 478 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
 479
 480 static struct resource spi1_resources[] = {
 481         [0] = {
 482                 .start  = AT91SAM9260_BASE_SPI1,
 483                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
 484                 .flags  = IORESOURCE_MEM,
 485         },
 486         [1] = {
 487                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
 488                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
 489                 .flags  = IORESOURCE_IRQ,
 490         },
 491 };
 492
 493 static struct platform_device at91sam9260_spi1_device = {
 494         .name           = "atmel_spi",
 495         .id             = 1,
 496         .dev            = {
 497                                 .dma_mask               = &spi_dmamask,
 498                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 499         },
 500         .resource       = spi1_resources,
 501         .num_resources  = ARRAY_SIZE(spi1_resources),
 502 };
 503
 504 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
 505
 506 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 507 {
 508         int i;
 509         unsigned long cs_pin;
 510         short enable_spi0 = 0;
 511         short enable_spi1 = 0;
 512
 513         /* Choose SPI chip-selects */
 514         for (i = 0; i < nr_devices; i++) {
 515                 if (devices[i].controller_data)
 516                         cs_pin = (unsigned long) devices[i].controller_data;
 517                 else if (devices[i].bus_num == 0)
 518                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 519                 else
 520                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 521
 522                 if (!gpio_is_valid(cs_pin))
 523                         continue;
 524
 525                 if (devices[i].bus_num == 0)
 526                         enable_spi0 = 1;
 527                 else
 528                         enable_spi1 = 1;
 529
 530                 /* enable chip-select pin */
 531                 at91_set_gpio_output(cs_pin, 1);
 532
 533                 /* pass chip-select pin to driver */
 534                 devices[i].controller_data = (void *) cs_pin;
 535         }
 536
 537         spi_register_board_info(devices, nr_devices);
 538
 539         /* Configure SPI bus(es) */
 540         if (enable_spi0) {
 541                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 542                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 543                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
 544
 545                 platform_device_register(&at91sam9260_spi0_device);
 546         }
 547         if (enable_spi1) {
 548                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
 549                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
 550                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
 551
 552                 platform_device_register(&at91sam9260_spi1_device);
 553         }
 554 }
 555 #else
 556 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 557 #endif
 558
 559
 560 /* --------------------------------------------------------------------
 561  *  Timer/Counter blocks
 562  * -------------------------------------------------------------------- */
 563
 564 #ifdef CONFIG_ATMEL_TCLIB
 565
 566 static struct resource tcb0_resources[] = {
 567         [0] = {
 568                 .start  = AT91SAM9260_BASE_TCB0,
 569                 .end    = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
 570                 .flags  = IORESOURCE_MEM,
 571         },
 572         [1] = {
 573                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
 574                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
 575                 .flags  = IORESOURCE_IRQ,
 576         },
 577         [2] = {
 578                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
 579                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
 580                 .flags  = IORESOURCE_IRQ,
 581         },
 582         [3] = {
 583                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
 584                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
 585                 .flags  = IORESOURCE_IRQ,
 586         },
 587 };
 588
 589 static struct platform_device at91sam9260_tcb0_device = {
 590         .name           = "atmel_tcb",
 591         .id             = 0,
 592         .resource       = tcb0_resources,
 593         .num_resources  = ARRAY_SIZE(tcb0_resources),
 594 };
 595
 596 static struct resource tcb1_resources[] = {
 597         [0] = {
 598                 .start  = AT91SAM9260_BASE_TCB1,
 599                 .end    = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
 600                 .flags  = IORESOURCE_MEM,
 601         },
 602         [1] = {
 603                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
 604                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
 605                 .flags  = IORESOURCE_IRQ,
 606         },
 607         [2] = {
 608                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
 609                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
 610                 .flags  = IORESOURCE_IRQ,
 611         },
 612         [3] = {
 613                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
 614                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
 615                 .flags  = IORESOURCE_IRQ,
 616         },
 617 };
 618
 619 static struct platform_device at91sam9260_tcb1_device = {
 620         .name           = "atmel_tcb",
 621         .id             = 1,
 622         .resource       = tcb1_resources,
 623         .num_resources  = ARRAY_SIZE(tcb1_resources),
 624 };
 625
 626 static void __init at91_add_device_tc(void)
 627 {
 628         platform_device_register(&at91sam9260_tcb0_device);
 629         platform_device_register(&at91sam9260_tcb1_device);
 630 }
 631 #else
 632 static void __init at91_add_device_tc(void) { }
 633 #endif
 634
 635
 636 /* --------------------------------------------------------------------
 637  *  RTT
 638  * -------------------------------------------------------------------- */
 639
 640 static struct resource rtt_resources[] = {
 641         {
 642                 .start  = AT91SAM9260_BASE_RTT,
 643                 .end    = AT91SAM9260_BASE_RTT + SZ_16 - 1,
 644                 .flags  = IORESOURCE_MEM,
 645         }, {
 646                 .flags  = IORESOURCE_MEM,
 647         }, {
 648                 .flags  = IORESOURCE_IRQ,
 649         },
 650 };
 651
 652 static struct platform_device at91sam9260_rtt_device = {
 653         .name           = "at91_rtt",
 654         .id             = 0,
 655         .resource       = rtt_resources,
 656 };
 657
 658
 659 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
 660 static void __init at91_add_device_rtt_rtc(void)
 661 {
 662         at91sam9260_rtt_device.name = "rtc-at91sam9";
 663         /*
 664          * The second resource is needed:
 665          * GPBR will serve as the storage for RTC time offset
 666          */
 667         at91sam9260_rtt_device.num_resources = 3;
 668         rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
 669                                  4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 670         rtt_resources[1].end = rtt_resources[1].start + 3;
 671         rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
 672         rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 673 }
 674 #else
 675 static void __init at91_add_device_rtt_rtc(void)
 676 {
 677         /* Only one resource is needed: RTT not used as RTC */
 678         at91sam9260_rtt_device.num_resources = 1;
 679 }
 680 #endif
 681
 682 static void __init at91_add_device_rtt(void)
 683 {
 684         at91_add_device_rtt_rtc();
 685         platform_device_register(&at91sam9260_rtt_device);
 686 }
 687
 688
 689 /* --------------------------------------------------------------------
 690  *  Watchdog
 691  * -------------------------------------------------------------------- */
 692
 693 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
 694 static struct resource wdt_resources[] = {
 695         {
 696                 .start  = AT91SAM9260_BASE_WDT,
 697                 .end    = AT91SAM9260_BASE_WDT + SZ_16 - 1,
 698                 .flags  = IORESOURCE_MEM,
 699         }
 700 };
 701
 702 static struct platform_device at91sam9260_wdt_device = {
 703         .name           = "at91_wdt",
 704         .id             = -1,
 705         .resource       = wdt_resources,
 706         .num_resources  = ARRAY_SIZE(wdt_resources),
 707 };
 708
 709 static void __init at91_add_device_watchdog(void)
 710 {
 711         platform_device_register(&at91sam9260_wdt_device);
 712 }
 713 #else
 714 static void __init at91_add_device_watchdog(void) {}
 715 #endif
 716
 717
 718 /* --------------------------------------------------------------------
 719  *  SSC -- Synchronous Serial Controller
 720  * -------------------------------------------------------------------- */
 721
 722 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 723 static u64 ssc_dmamask = DMA_BIT_MASK(32);
 724
 725 static struct resource ssc_resources[] = {
 726         [0] = {
 727                 .start  = AT91SAM9260_BASE_SSC,
 728                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
 729                 .flags  = IORESOURCE_MEM,
 730         },
 731         [1] = {
 732                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
 733                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
 734                 .flags  = IORESOURCE_IRQ,
 735         },
 736 };
 737
 738 static struct platform_device at91sam9260_ssc_device = {
 739         .name   = "ssc",
 740         .id     = 0,
 741         .dev    = {
 742                 .dma_mask               = &ssc_dmamask,
 743                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 744         },
 745         .resource       = ssc_resources,
 746         .num_resources  = ARRAY_SIZE(ssc_resources),
 747 };
 748
 749 static inline void configure_ssc_pins(unsigned pins)
 750 {
 751         if (pins & ATMEL_SSC_TF)
 752                 at91_set_A_periph(AT91_PIN_PB17, 1);
 753         if (pins & ATMEL_SSC_TK)
 754                 at91_set_A_periph(AT91_PIN_PB16, 1);
 755         if (pins & ATMEL_SSC_TD)
 756                 at91_set_A_periph(AT91_PIN_PB18, 1);
 757         if (pins & ATMEL_SSC_RD)
 758                 at91_set_A_periph(AT91_PIN_PB19, 1);
 759         if (pins & ATMEL_SSC_RK)
 760                 at91_set_A_periph(AT91_PIN_PB20, 1);
 761         if (pins & ATMEL_SSC_RF)
 762                 at91_set_A_periph(AT91_PIN_PB21, 1);
 763 }
 764
 765 /*
 766  * SSC controllers are accessed through library code, instead of any
 767  * kind of all-singing/all-dancing driver.  For example one could be
 768  * used by a particular I2S audio codec's driver, while another one
 769  * on the same system might be used by a custom data capture driver.
 770  */
 771 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 772 {
 773         struct platform_device *pdev;
 774
 775         /*
 776          * NOTE: caller is responsible for passing information matching
 777          * "pins" to whatever will be using each particular controller.
 778          */
 779         switch (id) {
 780         case AT91SAM9260_ID_SSC:
 781                 pdev = &at91sam9260_ssc_device;
 782                 configure_ssc_pins(pins);
 783                 break;
 784         default:
 785                 return;
 786         }
 787
 788         platform_device_register(pdev);
 789 }
 790
 791 #else
 792 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 793 #endif
 794
 795
 796 /* --------------------------------------------------------------------
 797  *  UART
 798  * -------------------------------------------------------------------- */
 799 #if defined(CONFIG_SERIAL_ATMEL)
 800 static struct resource dbgu_resources[] = {
 801         [0] = {
 802                 .start  = AT91SAM9260_BASE_DBGU,
 803                 .end    = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
 804                 .flags  = IORESOURCE_MEM,
 805         },
 806         [1] = {
 807                 .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
 808                 .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
 809                 .flags  = IORESOURCE_IRQ,
 810         },
 811 };
 812
 813 static struct atmel_uart_data dbgu_data = {
 814         .use_dma_tx     = 0,
 815         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 816 };
 817
 818 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 819
 820 static struct platform_device at91sam9260_dbgu_device = {
 821         .name           = "atmel_usart",
 822         .id             = 0,
 823         .dev            = {
 824                                 .dma_mask               = &dbgu_dmamask,
 825                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 826                                 .platform_data          = &dbgu_data,
 827         },
 828         .resource       = dbgu_resources,
 829         .num_resources  = ARRAY_SIZE(dbgu_resources),
 830 };
 831
 832 static inline void configure_dbgu_pins(void)
 833 {
 834         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
 835         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
 836 }
 837
 838 static struct resource uart0_resources[] = {
 839         [0] = {
 840                 .start  = AT91SAM9260_BASE_US0,
 841                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
 842                 .flags  = IORESOURCE_MEM,
 843         },
 844         [1] = {
 845                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
 846                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
 847                 .flags  = IORESOURCE_IRQ,
 848         },
 849 };
 850
 851 static struct atmel_uart_data uart0_data = {
 852         .use_dma_tx     = 1,
 853         .use_dma_rx     = 1,
 854 };
 855
 856 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 857
 858 static struct platform_device at91sam9260_uart0_device = {
 859         .name           = "atmel_usart",
 860         .id             = 1,
 861         .dev            = {
 862                                 .dma_mask               = &uart0_dmamask,
 863                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 864                                 .platform_data          = &uart0_data,
 865         },
 866         .resource       = uart0_resources,
 867         .num_resources  = ARRAY_SIZE(uart0_resources),
 868 };
 869
 870 static inline void configure_usart0_pins(unsigned pins)
 871 {
 872         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
 873         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
 874
 875         if (pins & ATMEL_UART_RTS)
 876                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
 877         if (pins & ATMEL_UART_CTS)
 878                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
 879         if (pins & ATMEL_UART_DTR)
 880                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
 881         if (pins & ATMEL_UART_DSR)
 882                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
 883         if (pins & ATMEL_UART_DCD)
 884                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
 885         if (pins & ATMEL_UART_RI)
 886                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
 887 }
 888
 889 static struct resource uart1_resources[] = {
 890         [0] = {
 891                 .start  = AT91SAM9260_BASE_US1,
 892                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
 893                 .flags  = IORESOURCE_MEM,
 894         },
 895         [1] = {
 896                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
 897                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
 898                 .flags  = IORESOURCE_IRQ,
 899         },
 900 };
 901
 902 static struct atmel_uart_data uart1_data = {
 903         .use_dma_tx     = 1,
 904         .use_dma_rx     = 1,
 905 };
 906
 907 static u64 uart1_dmamask = DMA_BIT_MASK(32);
 908
 909 static struct platform_device at91sam9260_uart1_device = {
 910         .name           = "atmel_usart",
 911         .id             = 2,
 912         .dev            = {
 913                                 .dma_mask               = &uart1_dmamask,
 914                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 915                                 .platform_data          = &uart1_data,
 916         },
 917         .resource       = uart1_resources,
 918         .num_resources  = ARRAY_SIZE(uart1_resources),
 919 };
 920
 921 static inline void configure_usart1_pins(unsigned pins)
 922 {
 923         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
 924         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
 925
 926         if (pins & ATMEL_UART_RTS)
 927                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
 928         if (pins & ATMEL_UART_CTS)
 929                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
 930 }
 931
 932 static struct resource uart2_resources[] = {
 933         [0] = {
 934                 .start  = AT91SAM9260_BASE_US2,
 935                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
 936                 .flags  = IORESOURCE_MEM,
 937         },
 938         [1] = {
 939                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
 940                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
 941                 .flags  = IORESOURCE_IRQ,
 942         },
 943 };
 944
 945 static struct atmel_uart_data uart2_data = {
 946         .use_dma_tx     = 1,
 947         .use_dma_rx     = 1,
 948 };
 949
 950 static u64 uart2_dmamask = DMA_BIT_MASK(32);
 951
 952 static struct platform_device at91sam9260_uart2_device = {
 953         .name           = "atmel_usart",
 954         .id             = 3,
 955         .dev            = {
 956                                 .dma_mask               = &uart2_dmamask,
 957                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 958                                 .platform_data          = &uart2_data,
 959         },
 960         .resource       = uart2_resources,
 961         .num_resources  = ARRAY_SIZE(uart2_resources),
 962 };
 963
 964 static inline void configure_usart2_pins(unsigned pins)
 965 {
 966         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
 967         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
 968
 969         if (pins & ATMEL_UART_RTS)
 970                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
 971         if (pins & ATMEL_UART_CTS)
 972                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
 973 }
 974
 975 static struct resource uart3_resources[] = {
 976         [0] = {
 977                 .start  = AT91SAM9260_BASE_US3,
 978                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
 979                 .flags  = IORESOURCE_MEM,
 980         },
 981         [1] = {
 982                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
 983                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
 984                 .flags  = IORESOURCE_IRQ,
 985         },
 986 };
 987
 988 static struct atmel_uart_data uart3_data = {
 989         .use_dma_tx     = 1,
 990         .use_dma_rx     = 1,
 991 };
 992
 993 static u64 uart3_dmamask = DMA_BIT_MASK(32);
 994
 995 static struct platform_device at91sam9260_uart3_device = {
 996         .name           = "atmel_usart",
 997         .id             = 4,
 998         .dev            = {
 999                                 .dma_mask               = &uart3_dmamask,
1000                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1001                                 .platform_data          = &uart3_data,
1002         },
1003         .resource       = uart3_resources,
1004         .num_resources  = ARRAY_SIZE(uart3_resources),
1005 };
1006
1007 static inline void configure_usart3_pins(unsigned pins)
1008 {
1009         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
1010         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
1011
1012         if (pins & ATMEL_UART_RTS)
1013                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
1014         if (pins & ATMEL_UART_CTS)
1015                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
1016 }
1017
1018 static struct resource uart4_resources[] = {
1019         [0] = {
1020                 .start  = AT91SAM9260_BASE_US4,
1021                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1022                 .flags  = IORESOURCE_MEM,
1023         },
1024         [1] = {
1025                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1026                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1027                 .flags  = IORESOURCE_IRQ,
1028         },
1029 };
1030
1031 static struct atmel_uart_data uart4_data = {
1032         .use_dma_tx     = 1,
1033         .use_dma_rx     = 1,
1034 };
1035
1036 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1037
1038 static struct platform_device at91sam9260_uart4_device = {
1039         .name           = "atmel_usart",
1040         .id             = 5,
1041         .dev            = {
1042                                 .dma_mask               = &uart4_dmamask,
1043                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1044                                 .platform_data          = &uart4_data,
1045         },
1046         .resource       = uart4_resources,
1047         .num_resources  = ARRAY_SIZE(uart4_resources),
1048 };
1049
1050 static inline void configure_usart4_pins(void)
1051 {
1052         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1053         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1054 }
1055
1056 static struct resource uart5_resources[] = {
1057         [0] = {
1058                 .start  = AT91SAM9260_BASE_US5,
1059                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1060                 .flags  = IORESOURCE_MEM,
1061         },
1062         [1] = {
1063                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1064                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1065                 .flags  = IORESOURCE_IRQ,
1066         },
1067 };
1068
1069 static struct atmel_uart_data uart5_data = {
1070         .use_dma_tx     = 1,
1071         .use_dma_rx     = 1,
1072 };
1073
1074 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1075
1076 static struct platform_device at91sam9260_uart5_device = {
1077         .name           = "atmel_usart",
1078         .id             = 6,
1079         .dev            = {
1080                                 .dma_mask               = &uart5_dmamask,
1081                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1082                                 .platform_data          = &uart5_data,
1083         },
1084         .resource       = uart5_resources,
1085         .num_resources  = ARRAY_SIZE(uart5_resources),
1086 };
1087
1088 static inline void configure_usart5_pins(void)
1089 {
1090         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1091         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1092 }
1093
1094 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1095
1096 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1097 {
1098         struct platform_device *pdev;
1099         struct atmel_uart_data *pdata;
1100
1101         switch (id) {
1102                 case 0:         /* DBGU */
1103                         pdev = &at91sam9260_dbgu_device;
1104                         configure_dbgu_pins();
1105                         break;
1106                 case AT91SAM9260_ID_US0:
1107                         pdev = &at91sam9260_uart0_device;
1108                         configure_usart0_pins(pins);
1109                         break;
1110                 case AT91SAM9260_ID_US1:
1111                         pdev = &at91sam9260_uart1_device;
1112                         configure_usart1_pins(pins);
1113                         break;
1114                 case AT91SAM9260_ID_US2:
1115                         pdev = &at91sam9260_uart2_device;
1116                         configure_usart2_pins(pins);
1117                         break;
1118                 case AT91SAM9260_ID_US3:
1119                         pdev = &at91sam9260_uart3_device;
1120                         configure_usart3_pins(pins);
1121                         break;
1122                 case AT91SAM9260_ID_US4:
1123                         pdev = &at91sam9260_uart4_device;
1124                         configure_usart4_pins();
1125                         break;
1126                 case AT91SAM9260_ID_US5:
1127                         pdev = &at91sam9260_uart5_device;
1128                         configure_usart5_pins();
1129                         break;
1130                 default:
1131                         return;
1132         }
1133         pdata = pdev->dev.platform_data;
1134         pdata->num = portnr;            /* update to mapped ID */
1135
1136         if (portnr < ATMEL_MAX_UART)
1137                 at91_uarts[portnr] = pdev;
1138 }
1139
1140 void __init at91_add_device_serial(void)
1141 {
1142         int i;
1143
1144         for (i = 0; i < ATMEL_MAX_UART; i++) {
1145                 if (at91_uarts[i])
1146                         platform_device_register(at91_uarts[i]);
1147         }
1148 }
1149 #else
1150 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1151 void __init at91_add_device_serial(void) {}
1152 #endif
1153
1154 /* --------------------------------------------------------------------
1155  *  CF/IDE
1156  * -------------------------------------------------------------------- */
1157
1158 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1159         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1160
1161 static struct at91_cf_data cf0_data;
1162
1163 static struct resource cf0_resources[] = {
1164         [0] = {
1165                 .start  = AT91_CHIPSELECT_4,
1166                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
1167                 .flags  = IORESOURCE_MEM,
1168         }
1169 };
1170
1171 static struct platform_device cf0_device = {
1172         .id             = 0,
1173         .dev            = {
1174                                 .platform_data  = &cf0_data,
1175         },
1176         .resource       = cf0_resources,
1177         .num_resources  = ARRAY_SIZE(cf0_resources),
1178 };
1179
1180 static struct at91_cf_data cf1_data;
1181
1182 static struct resource cf1_resources[] = {
1183         [0] = {
1184                 .start  = AT91_CHIPSELECT_5,
1185                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
1186                 .flags  = IORESOURCE_MEM,
1187         }
1188 };
1189
1190 static struct platform_device cf1_device = {
1191         .id             = 1,
1192         .dev            = {
1193                                 .platform_data  = &cf1_data,
1194         },
1195         .resource       = cf1_resources,
1196         .num_resources  = ARRAY_SIZE(cf1_resources),
1197 };
1198
1199 void __init at91_add_device_cf(struct at91_cf_data *data)
1200 {
1201         struct platform_device *pdev;
1202         unsigned long csa;
1203
1204         if (!data)
1205                 return;
1206
1207         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1208
1209         switch (data->chipselect) {
1210         case 4:
1211                 at91_set_multi_drive(AT91_PIN_PC8, 0);
1212                 at91_set_A_periph(AT91_PIN_PC8, 0);
1213                 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1214                 cf0_data = *data;
1215                 pdev = &cf0_device;
1216                 break;
1217         case 5:
1218                 at91_set_multi_drive(AT91_PIN_PC9, 0);
1219                 at91_set_A_periph(AT91_PIN_PC9, 0);
1220                 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1221                 cf1_data = *data;
1222                 pdev = &cf1_device;
1223                 break;
1224         default:
1225                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1226                        data->chipselect);
1227                 return;
1228         }
1229
1230         at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1231
1232         if (gpio_is_valid(data->rst_pin)) {
1233                 at91_set_multi_drive(data->rst_pin, 0);
1234                 at91_set_gpio_output(data->rst_pin, 1);
1235         }
1236
1237         if (gpio_is_valid(data->irq_pin)) {
1238                 at91_set_gpio_input(data->irq_pin, 0);
1239                 at91_set_deglitch(data->irq_pin, 1);
1240         }
1241
1242         if (gpio_is_valid(data->det_pin)) {
1243                 at91_set_gpio_input(data->det_pin, 0);
1244                 at91_set_deglitch(data->det_pin, 1);
1245         }
1246
1247         at91_set_B_periph(AT91_PIN_PC6, 0);     /* CFCE1 */
1248         at91_set_B_periph(AT91_PIN_PC7, 0);     /* CFCE2 */
1249         at91_set_A_periph(AT91_PIN_PC10, 0);    /* CFRNW */
1250         at91_set_A_periph(AT91_PIN_PC15, 1);    /* NWAIT */
1251
1252         if (data->flags & AT91_CF_TRUE_IDE)
1253 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1254                 pdev->name = "pata_at91";
1255 #else
1256 #warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
1257 #endif
1258         else
1259                 pdev->name = "at91_cf";
1260
1261         platform_device_register(pdev);
1262 }
1263
1264 #else
1265 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1266 #endif
1267
1268 /* --------------------------------------------------------------------
1269  *  ADCs
1270  * -------------------------------------------------------------------- */
1271
1272 #if IS_ENABLED(CONFIG_AT91_ADC)
1273 static struct at91_adc_data adc_data;
1274
1275 static struct resource adc_resources[] = {
1276         [0] = {
1277                 .start  = AT91SAM9260_BASE_ADC,
1278                 .end    = AT91SAM9260_BASE_ADC + SZ_16K - 1,
1279                 .flags  = IORESOURCE_MEM,
1280         },
1281         [1] = {
1282                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1283                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1284                 .flags  = IORESOURCE_IRQ,
1285         },
1286 };
1287
1288 static struct platform_device at91_adc_device = {
1289         .name           = "at91_adc",
1290         .id             = -1,
1291         .dev            = {
1292                                 .platform_data          = &adc_data,
1293         },
1294         .resource       = adc_resources,
1295         .num_resources  = ARRAY_SIZE(adc_resources),
1296 };
1297
1298 static struct at91_adc_trigger at91_adc_triggers[] = {
1299         [0] = {
1300                 .name = "timer-counter-0",
1301                 .value = AT91_ADC_TRGSEL_TC0 | AT91_ADC_TRGEN,
1302         },
1303         [1] = {
1304                 .name = "timer-counter-1",
1305                 .value = AT91_ADC_TRGSEL_TC1 | AT91_ADC_TRGEN,
1306         },
1307         [2] = {
1308                 .name = "timer-counter-2",
1309                 .value = AT91_ADC_TRGSEL_TC2 | AT91_ADC_TRGEN,
1310         },
1311         [3] = {
1312                 .name = "external",
1313                 .value = AT91_ADC_TRGSEL_EXTERNAL | AT91_ADC_TRGEN,
1314                 .is_external = true,
1315         },
1316 };
1317
1318 static struct at91_adc_reg_desc at91_adc_register_g20 = {
1319         .channel_base = AT91_ADC_CHR(0),
1320         .drdy_mask = AT91_ADC_DRDY,
1321         .status_register = AT91_ADC_SR,
1322         .trigger_register = AT91_ADC_MR,
1323 };
1324
1325 void __init at91_add_device_adc(struct at91_adc_data *data)
1326 {
1327         if (!data)
1328                 return;
1329
1330         if (test_bit(0, &data->channels_used))
1331                 at91_set_A_periph(AT91_PIN_PC0, 0);
1332         if (test_bit(1, &data->channels_used))
1333                 at91_set_A_periph(AT91_PIN_PC1, 0);
1334         if (test_bit(2, &data->channels_used))
1335                 at91_set_A_periph(AT91_PIN_PC2, 0);
1336         if (test_bit(3, &data->channels_used))
1337                 at91_set_A_periph(AT91_PIN_PC3, 0);
1338
1339         if (data->use_external_triggers)
1340                 at91_set_A_periph(AT91_PIN_PA22, 0);
1341
1342         data->num_channels = 4;
1343         data->startup_time = 10;
1344         data->registers = &at91_adc_register_g20;
1345         data->trigger_number = 4;
1346         data->trigger_list = at91_adc_triggers;
1347
1348         adc_data = *data;
1349         platform_device_register(&at91_adc_device);
1350 }
1351 #else
1352 void __init at91_add_device_adc(struct at91_adc_data *data) {}
1353 #endif
1354
1355 /* -------------------------------------------------------------------- */
1356 /*
1357  * These devices are always present and don't need any board-specific
1358  * setup.
1359  */
1360 static int __init at91_add_standard_devices(void)
1361 {
1362         if (of_have_populated_dt())
1363                 return 0;
1364
1365         at91_add_device_rtt();
1366         at91_add_device_watchdog();
1367         at91_add_device_tc();
1368         return 0;
1369 }
1370
1371 arch_initcall(at91_add_standard_devices);