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1 /*
2  * arch/arm/mach-at91/at91sam9260_devices.c
3  *
4  *  Copyright (C) 2006 Atmel
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <mach/board.h>
21 #include <mach/cpu.h>
22 #include <mach/at91sam9260.h>
23 #include <mach/at91sam9260_matrix.h>
24 #include <mach/at91_matrix.h>
25 #include <mach/at91sam9_smc.h>
26
27 #include "generic.h"
28
29
30 /* --------------------------------------------------------------------
31  *  USB Host
32  * -------------------------------------------------------------------- */
33
34 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35 static u64 ohci_dmamask = DMA_BIT_MASK(32);
36 static struct at91_usbh_data usbh_data;
37
38 static struct resource usbh_resources[] = {
39         [0] = {
40                 .start  = AT91SAM9260_UHP_BASE,
41                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
42                 .flags  = IORESOURCE_MEM,
43         },
44         [1] = {
45                 .start  = AT91SAM9260_ID_UHP,
46                 .end    = AT91SAM9260_ID_UHP,
47                 .flags  = IORESOURCE_IRQ,
48         },
49 };
50
51 static struct platform_device at91_usbh_device = {
52         .name           = "at91_ohci",
53         .id             = -1,
54         .dev            = {
55                                 .dma_mask               = &ohci_dmamask,
56                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
57                                 .platform_data          = &usbh_data,
58         },
59         .resource       = usbh_resources,
60         .num_resources  = ARRAY_SIZE(usbh_resources),
61 };
62
63 void __init at91_add_device_usbh(struct at91_usbh_data *data)
64 {
65         int i;
66
67         if (!data)
68                 return;
69
70         /* Enable overcurrent notification */
71         for (i = 0; i < data->ports; i++) {
72                 if (data->overcurrent_pin[i])
73                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
74         }
75
76         usbh_data = *data;
77         platform_device_register(&at91_usbh_device);
78 }
79 #else
80 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
81 #endif
82
83
84 /* --------------------------------------------------------------------
85  *  USB Device (Gadget)
86  * -------------------------------------------------------------------- */
87
88 #ifdef CONFIG_USB_AT91
89 static struct at91_udc_data udc_data;
90
91 static struct resource udc_resources[] = {
92         [0] = {
93                 .start  = AT91SAM9260_BASE_UDP,
94                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
95                 .flags  = IORESOURCE_MEM,
96         },
97         [1] = {
98                 .start  = AT91SAM9260_ID_UDP,
99                 .end    = AT91SAM9260_ID_UDP,
100                 .flags  = IORESOURCE_IRQ,
101         },
102 };
103
104 static struct platform_device at91_udc_device = {
105         .name           = "at91_udc",
106         .id             = -1,
107         .dev            = {
108                                 .platform_data          = &udc_data,
109         },
110         .resource       = udc_resources,
111         .num_resources  = ARRAY_SIZE(udc_resources),
112 };
113
114 void __init at91_add_device_udc(struct at91_udc_data *data)
115 {
116         if (!data)
117                 return;
118
119         if (gpio_is_valid(data->vbus_pin)) {
120                 at91_set_gpio_input(data->vbus_pin, 0);
121                 at91_set_deglitch(data->vbus_pin, 1);
122         }
123
124         /* Pullup pin is handled internally by USB device peripheral */
125
126         udc_data = *data;
127         platform_device_register(&at91_udc_device);
128 }
129 #else
130 void __init at91_add_device_udc(struct at91_udc_data *data) {}
131 #endif
132
133
134 /* --------------------------------------------------------------------
135  *  Ethernet
136  * -------------------------------------------------------------------- */
137
138 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
139 static u64 eth_dmamask = DMA_BIT_MASK(32);
140 static struct macb_platform_data eth_data;
141
142 static struct resource eth_resources[] = {
143         [0] = {
144                 .start  = AT91SAM9260_BASE_EMAC,
145                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
146                 .flags  = IORESOURCE_MEM,
147         },
148         [1] = {
149                 .start  = AT91SAM9260_ID_EMAC,
150                 .end    = AT91SAM9260_ID_EMAC,
151                 .flags  = IORESOURCE_IRQ,
152         },
153 };
154
155 static struct platform_device at91sam9260_eth_device = {
156         .name           = "macb",
157         .id             = -1,
158         .dev            = {
159                                 .dma_mask               = &eth_dmamask,
160                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
161                                 .platform_data          = &eth_data,
162         },
163         .resource       = eth_resources,
164         .num_resources  = ARRAY_SIZE(eth_resources),
165 };
166
167 void __init at91_add_device_eth(struct macb_platform_data *data)
168 {
169         if (!data)
170                 return;
171
172         if (gpio_is_valid(data->phy_irq_pin)) {
173                 at91_set_gpio_input(data->phy_irq_pin, 0);
174                 at91_set_deglitch(data->phy_irq_pin, 1);
175         }
176
177         /* Pins used for MII and RMII */
178         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
179         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
180         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
181         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
182         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
183         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
184         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
185         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
186         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
187         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
188
189         if (!data->is_rmii) {
190                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
191                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
192                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
193                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
194                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
195                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
196                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
197                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
198         }
199
200         eth_data = *data;
201         platform_device_register(&at91sam9260_eth_device);
202 }
203 #else
204 void __init at91_add_device_eth(struct macb_platform_data *data) {}
205 #endif
206
207
208 /* --------------------------------------------------------------------
209  *  MMC / SD
210  * -------------------------------------------------------------------- */
211
212 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
213 static u64 mmc_dmamask = DMA_BIT_MASK(32);
214 static struct at91_mmc_data mmc_data;
215
216 static struct resource mmc_resources[] = {
217         [0] = {
218                 .start  = AT91SAM9260_BASE_MCI,
219                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
220                 .flags  = IORESOURCE_MEM,
221         },
222         [1] = {
223                 .start  = AT91SAM9260_ID_MCI,
224                 .end    = AT91SAM9260_ID_MCI,
225                 .flags  = IORESOURCE_IRQ,
226         },
227 };
228
229 static struct platform_device at91sam9260_mmc_device = {
230         .name           = "at91_mci",
231         .id             = -1,
232         .dev            = {
233                                 .dma_mask               = &mmc_dmamask,
234                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
235                                 .platform_data          = &mmc_data,
236         },
237         .resource       = mmc_resources,
238         .num_resources  = ARRAY_SIZE(mmc_resources),
239 };
240
241 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
242 {
243         if (!data)
244                 return;
245
246         /* input/irq */
247         if (gpio_is_valid(data->det_pin)) {
248                 at91_set_gpio_input(data->det_pin, 1);
249                 at91_set_deglitch(data->det_pin, 1);
250         }
251         if (gpio_is_valid(data->wp_pin))
252                 at91_set_gpio_input(data->wp_pin, 1);
253         if (gpio_is_valid(data->vcc_pin))
254                 at91_set_gpio_output(data->vcc_pin, 0);
255
256         /* CLK */
257         at91_set_A_periph(AT91_PIN_PA8, 0);
258
259         if (data->slot_b) {
260                 /* CMD */
261                 at91_set_B_periph(AT91_PIN_PA1, 1);
262
263                 /* DAT0, maybe DAT1..DAT3 */
264                 at91_set_B_periph(AT91_PIN_PA0, 1);
265                 if (data->wire4) {
266                         at91_set_B_periph(AT91_PIN_PA5, 1);
267                         at91_set_B_periph(AT91_PIN_PA4, 1);
268                         at91_set_B_periph(AT91_PIN_PA3, 1);
269                 }
270         } else {
271                 /* CMD */
272                 at91_set_A_periph(AT91_PIN_PA7, 1);
273
274                 /* DAT0, maybe DAT1..DAT3 */
275                 at91_set_A_periph(AT91_PIN_PA6, 1);
276                 if (data->wire4) {
277                         at91_set_A_periph(AT91_PIN_PA9, 1);
278                         at91_set_A_periph(AT91_PIN_PA10, 1);
279                         at91_set_A_periph(AT91_PIN_PA11, 1);
280                 }
281         }
282
283         mmc_data = *data;
284         platform_device_register(&at91sam9260_mmc_device);
285 }
286 #else
287 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
288 #endif
289
290 /* --------------------------------------------------------------------
291  *  MMC / SD Slot for Atmel MCI Driver
292  * -------------------------------------------------------------------- */
293
294 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
295 static u64 mmc_dmamask = DMA_BIT_MASK(32);
296 static struct mci_platform_data mmc_data;
297
298 static struct resource mmc_resources[] = {
299         [0] = {
300                 .start  = AT91SAM9260_BASE_MCI,
301                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
302                 .flags  = IORESOURCE_MEM,
303         },
304         [1] = {
305                 .start  = AT91SAM9260_ID_MCI,
306                 .end    = AT91SAM9260_ID_MCI,
307                 .flags  = IORESOURCE_IRQ,
308         },
309 };
310
311 static struct platform_device at91sam9260_mmc_device = {
312         .name           = "atmel_mci",
313         .id             = -1,
314         .dev            = {
315                                 .dma_mask               = &mmc_dmamask,
316                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
317                                 .platform_data          = &mmc_data,
318         },
319         .resource       = mmc_resources,
320         .num_resources  = ARRAY_SIZE(mmc_resources),
321 };
322
323 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
324 {
325         unsigned int i;
326         unsigned int slot_count = 0;
327
328         if (!data)
329                 return;
330
331         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
332                 if (data->slot[i].bus_width) {
333                         /* input/irq */
334                         if (gpio_is_valid(data->slot[i].detect_pin)) {
335                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
336                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
337                         }
338                         if (gpio_is_valid(data->slot[i].wp_pin))
339                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
340
341                         switch (i) {
342                         case 0:
343                                 /* CMD */
344                                 at91_set_A_periph(AT91_PIN_PA7, 1);
345                                 /* DAT0, maybe DAT1..DAT3 */
346                                 at91_set_A_periph(AT91_PIN_PA6, 1);
347                                 if (data->slot[i].bus_width == 4) {
348                                         at91_set_A_periph(AT91_PIN_PA9, 1);
349                                         at91_set_A_periph(AT91_PIN_PA10, 1);
350                                         at91_set_A_periph(AT91_PIN_PA11, 1);
351                                 }
352                                 slot_count++;
353                                 break;
354                         case 1:
355                                 /* CMD */
356                                 at91_set_B_periph(AT91_PIN_PA1, 1);
357                                 /* DAT0, maybe DAT1..DAT3 */
358                                 at91_set_B_periph(AT91_PIN_PA0, 1);
359                                 if (data->slot[i].bus_width == 4) {
360                                         at91_set_B_periph(AT91_PIN_PA5, 1);
361                                         at91_set_B_periph(AT91_PIN_PA4, 1);
362                                         at91_set_B_periph(AT91_PIN_PA3, 1);
363                                 }
364                                 slot_count++;
365                                 break;
366                         default:
367                                 printk(KERN_ERR
368                                         "AT91: SD/MMC slot %d not available\n", i);
369                                 break;
370                         }
371                 }
372         }
373
374         if (slot_count) {
375                 /* CLK */
376                 at91_set_A_periph(AT91_PIN_PA8, 0);
377
378                 mmc_data = *data;
379                 platform_device_register(&at91sam9260_mmc_device);
380         }
381 }
382 #else
383 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
384 #endif
385
386
387 /* --------------------------------------------------------------------
388  *  NAND / SmartMedia
389  * -------------------------------------------------------------------- */
390
391 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
392 static struct atmel_nand_data nand_data;
393
394 #define NAND_BASE       AT91_CHIPSELECT_3
395
396 static struct resource nand_resources[] = {
397         [0] = {
398                 .start  = NAND_BASE,
399                 .end    = NAND_BASE + SZ_256M - 1,
400                 .flags  = IORESOURCE_MEM,
401         },
402         [1] = {
403                 .start  = AT91SAM9260_BASE_ECC,
404                 .end    = AT91SAM9260_BASE_ECC + SZ_512 - 1,
405                 .flags  = IORESOURCE_MEM,
406         }
407 };
408
409 static struct platform_device at91sam9260_nand_device = {
410         .name           = "atmel_nand",
411         .id             = -1,
412         .dev            = {
413                                 .platform_data  = &nand_data,
414         },
415         .resource       = nand_resources,
416         .num_resources  = ARRAY_SIZE(nand_resources),
417 };
418
419 void __init at91_add_device_nand(struct atmel_nand_data *data)
420 {
421         unsigned long csa;
422
423         if (!data)
424                 return;
425
426         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
427         at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
428
429         /* enable pin */
430         if (gpio_is_valid(data->enable_pin))
431                 at91_set_gpio_output(data->enable_pin, 1);
432
433         /* ready/busy pin */
434         if (gpio_is_valid(data->rdy_pin))
435                 at91_set_gpio_input(data->rdy_pin, 1);
436
437         /* card detect pin */
438         if (gpio_is_valid(data->det_pin))
439                 at91_set_gpio_input(data->det_pin, 1);
440
441         nand_data = *data;
442         platform_device_register(&at91sam9260_nand_device);
443 }
444 #else
445 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
446 #endif
447
448
449 /* --------------------------------------------------------------------
450  *  TWI (i2c)
451  * -------------------------------------------------------------------- */
452
453 /*
454  * Prefer the GPIO code since the TWI controller isn't robust
455  * (gets overruns and underruns under load) and can only issue
456  * repeated STARTs in one scenario (the driver doesn't yet handle them).
457  */
458
459 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
460
461 static struct i2c_gpio_platform_data pdata = {
462         .sda_pin                = AT91_PIN_PA23,
463         .sda_is_open_drain      = 1,
464         .scl_pin                = AT91_PIN_PA24,
465         .scl_is_open_drain      = 1,
466         .udelay                 = 2,            /* ~100 kHz */
467 };
468
469 static struct platform_device at91sam9260_twi_device = {
470         .name                   = "i2c-gpio",
471         .id                     = -1,
472         .dev.platform_data      = &pdata,
473 };
474
475 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
476 {
477         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
478         at91_set_multi_drive(AT91_PIN_PA23, 1);
479
480         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
481         at91_set_multi_drive(AT91_PIN_PA24, 1);
482
483         i2c_register_board_info(0, devices, nr_devices);
484         platform_device_register(&at91sam9260_twi_device);
485 }
486
487 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
488
489 static struct resource twi_resources[] = {
490         [0] = {
491                 .start  = AT91SAM9260_BASE_TWI,
492                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
493                 .flags  = IORESOURCE_MEM,
494         },
495         [1] = {
496                 .start  = AT91SAM9260_ID_TWI,
497                 .end    = AT91SAM9260_ID_TWI,
498                 .flags  = IORESOURCE_IRQ,
499         },
500 };
501
502 static struct platform_device at91sam9260_twi_device = {
503         .name           = "at91_i2c",
504         .id             = -1,
505         .resource       = twi_resources,
506         .num_resources  = ARRAY_SIZE(twi_resources),
507 };
508
509 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
510 {
511         /* pins used for TWI interface */
512         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
513         at91_set_multi_drive(AT91_PIN_PA23, 1);
514
515         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
516         at91_set_multi_drive(AT91_PIN_PA24, 1);
517
518         i2c_register_board_info(0, devices, nr_devices);
519         platform_device_register(&at91sam9260_twi_device);
520 }
521 #else
522 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
523 #endif
524
525
526 /* --------------------------------------------------------------------
527  *  SPI
528  * -------------------------------------------------------------------- */
529
530 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
531 static u64 spi_dmamask = DMA_BIT_MASK(32);
532
533 static struct resource spi0_resources[] = {
534         [0] = {
535                 .start  = AT91SAM9260_BASE_SPI0,
536                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
537                 .flags  = IORESOURCE_MEM,
538         },
539         [1] = {
540                 .start  = AT91SAM9260_ID_SPI0,
541                 .end    = AT91SAM9260_ID_SPI0,
542                 .flags  = IORESOURCE_IRQ,
543         },
544 };
545
546 static struct platform_device at91sam9260_spi0_device = {
547         .name           = "atmel_spi",
548         .id             = 0,
549         .dev            = {
550                                 .dma_mask               = &spi_dmamask,
551                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
552         },
553         .resource       = spi0_resources,
554         .num_resources  = ARRAY_SIZE(spi0_resources),
555 };
556
557 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
558
559 static struct resource spi1_resources[] = {
560         [0] = {
561                 .start  = AT91SAM9260_BASE_SPI1,
562                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
563                 .flags  = IORESOURCE_MEM,
564         },
565         [1] = {
566                 .start  = AT91SAM9260_ID_SPI1,
567                 .end    = AT91SAM9260_ID_SPI1,
568                 .flags  = IORESOURCE_IRQ,
569         },
570 };
571
572 static struct platform_device at91sam9260_spi1_device = {
573         .name           = "atmel_spi",
574         .id             = 1,
575         .dev            = {
576                                 .dma_mask               = &spi_dmamask,
577                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
578         },
579         .resource       = spi1_resources,
580         .num_resources  = ARRAY_SIZE(spi1_resources),
581 };
582
583 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
584
585 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
586 {
587         int i;
588         unsigned long cs_pin;
589         short enable_spi0 = 0;
590         short enable_spi1 = 0;
591
592         /* Choose SPI chip-selects */
593         for (i = 0; i < nr_devices; i++) {
594                 if (devices[i].controller_data)
595                         cs_pin = (unsigned long) devices[i].controller_data;
596                 else if (devices[i].bus_num == 0)
597                         cs_pin = spi0_standard_cs[devices[i].chip_select];
598                 else
599                         cs_pin = spi1_standard_cs[devices[i].chip_select];
600
601                 if (devices[i].bus_num == 0)
602                         enable_spi0 = 1;
603                 else
604                         enable_spi1 = 1;
605
606                 /* enable chip-select pin */
607                 at91_set_gpio_output(cs_pin, 1);
608
609                 /* pass chip-select pin to driver */
610                 devices[i].controller_data = (void *) cs_pin;
611         }
612
613         spi_register_board_info(devices, nr_devices);
614
615         /* Configure SPI bus(es) */
616         if (enable_spi0) {
617                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
618                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
619                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
620
621                 platform_device_register(&at91sam9260_spi0_device);
622         }
623         if (enable_spi1) {
624                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
625                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
626                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
627
628                 platform_device_register(&at91sam9260_spi1_device);
629         }
630 }
631 #else
632 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
633 #endif
634
635
636 /* --------------------------------------------------------------------
637  *  Timer/Counter blocks
638  * -------------------------------------------------------------------- */
639
640 #ifdef CONFIG_ATMEL_TCLIB
641
642 static struct resource tcb0_resources[] = {
643         [0] = {
644                 .start  = AT91SAM9260_BASE_TCB0,
645                 .end    = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
646                 .flags  = IORESOURCE_MEM,
647         },
648         [1] = {
649                 .start  = AT91SAM9260_ID_TC0,
650                 .end    = AT91SAM9260_ID_TC0,
651                 .flags  = IORESOURCE_IRQ,
652         },
653         [2] = {
654                 .start  = AT91SAM9260_ID_TC1,
655                 .end    = AT91SAM9260_ID_TC1,
656                 .flags  = IORESOURCE_IRQ,
657         },
658         [3] = {
659                 .start  = AT91SAM9260_ID_TC2,
660                 .end    = AT91SAM9260_ID_TC2,
661                 .flags  = IORESOURCE_IRQ,
662         },
663 };
664
665 static struct platform_device at91sam9260_tcb0_device = {
666         .name           = "atmel_tcb",
667         .id             = 0,
668         .resource       = tcb0_resources,
669         .num_resources  = ARRAY_SIZE(tcb0_resources),
670 };
671
672 static struct resource tcb1_resources[] = {
673         [0] = {
674                 .start  = AT91SAM9260_BASE_TCB1,
675                 .end    = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
676                 .flags  = IORESOURCE_MEM,
677         },
678         [1] = {
679                 .start  = AT91SAM9260_ID_TC3,
680                 .end    = AT91SAM9260_ID_TC3,
681                 .flags  = IORESOURCE_IRQ,
682         },
683         [2] = {
684                 .start  = AT91SAM9260_ID_TC4,
685                 .end    = AT91SAM9260_ID_TC4,
686                 .flags  = IORESOURCE_IRQ,
687         },
688         [3] = {
689                 .start  = AT91SAM9260_ID_TC5,
690                 .end    = AT91SAM9260_ID_TC5,
691                 .flags  = IORESOURCE_IRQ,
692         },
693 };
694
695 static struct platform_device at91sam9260_tcb1_device = {
696         .name           = "atmel_tcb",
697         .id             = 1,
698         .resource       = tcb1_resources,
699         .num_resources  = ARRAY_SIZE(tcb1_resources),
700 };
701
702 static void __init at91_add_device_tc(void)
703 {
704         platform_device_register(&at91sam9260_tcb0_device);
705         platform_device_register(&at91sam9260_tcb1_device);
706 }
707 #else
708 static void __init at91_add_device_tc(void) { }
709 #endif
710
711
712 /* --------------------------------------------------------------------
713  *  RTT
714  * -------------------------------------------------------------------- */
715
716 static struct resource rtt_resources[] = {
717         {
718                 .start  = AT91SAM9260_BASE_RTT,
719                 .end    = AT91SAM9260_BASE_RTT + SZ_16 - 1,
720                 .flags  = IORESOURCE_MEM,
721         }, {
722                 .flags  = IORESOURCE_MEM,
723         },
724 };
725
726 static struct platform_device at91sam9260_rtt_device = {
727         .name           = "at91_rtt",
728         .id             = 0,
729         .resource       = rtt_resources,
730 };
731
732
733 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
734 static void __init at91_add_device_rtt_rtc(void)
735 {
736         at91sam9260_rtt_device.name = "rtc-at91sam9";
737         /*
738          * The second resource is needed:
739          * GPBR will serve as the storage for RTC time offset
740          */
741         at91sam9260_rtt_device.num_resources = 2;
742         rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
743                                  4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
744         rtt_resources[1].end = rtt_resources[1].start + 3;
745 }
746 #else
747 static void __init at91_add_device_rtt_rtc(void)
748 {
749         /* Only one resource is needed: RTT not used as RTC */
750         at91sam9260_rtt_device.num_resources = 1;
751 }
752 #endif
753
754 static void __init at91_add_device_rtt(void)
755 {
756         at91_add_device_rtt_rtc();
757         platform_device_register(&at91sam9260_rtt_device);
758 }
759
760
761 /* --------------------------------------------------------------------
762  *  Watchdog
763  * -------------------------------------------------------------------- */
764
765 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
766 static struct resource wdt_resources[] = {
767         {
768                 .start  = AT91SAM9260_BASE_WDT,
769                 .end    = AT91SAM9260_BASE_WDT + SZ_16 - 1,
770                 .flags  = IORESOURCE_MEM,
771         }
772 };
773
774 static struct platform_device at91sam9260_wdt_device = {
775         .name           = "at91_wdt",
776         .id             = -1,
777         .resource       = wdt_resources,
778         .num_resources  = ARRAY_SIZE(wdt_resources),
779 };
780
781 static void __init at91_add_device_watchdog(void)
782 {
783         platform_device_register(&at91sam9260_wdt_device);
784 }
785 #else
786 static void __init at91_add_device_watchdog(void) {}
787 #endif
788
789
790 /* --------------------------------------------------------------------
791  *  SSC -- Synchronous Serial Controller
792  * -------------------------------------------------------------------- */
793
794 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
795 static u64 ssc_dmamask = DMA_BIT_MASK(32);
796
797 static struct resource ssc_resources[] = {
798         [0] = {
799                 .start  = AT91SAM9260_BASE_SSC,
800                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
801                 .flags  = IORESOURCE_MEM,
802         },
803         [1] = {
804                 .start  = AT91SAM9260_ID_SSC,
805                 .end    = AT91SAM9260_ID_SSC,
806                 .flags  = IORESOURCE_IRQ,
807         },
808 };
809
810 static struct platform_device at91sam9260_ssc_device = {
811         .name   = "ssc",
812         .id     = 0,
813         .dev    = {
814                 .dma_mask               = &ssc_dmamask,
815                 .coherent_dma_mask      = DMA_BIT_MASK(32),
816         },
817         .resource       = ssc_resources,
818         .num_resources  = ARRAY_SIZE(ssc_resources),
819 };
820
821 static inline void configure_ssc_pins(unsigned pins)
822 {
823         if (pins & ATMEL_SSC_TF)
824                 at91_set_A_periph(AT91_PIN_PB17, 1);
825         if (pins & ATMEL_SSC_TK)
826                 at91_set_A_periph(AT91_PIN_PB16, 1);
827         if (pins & ATMEL_SSC_TD)
828                 at91_set_A_periph(AT91_PIN_PB18, 1);
829         if (pins & ATMEL_SSC_RD)
830                 at91_set_A_periph(AT91_PIN_PB19, 1);
831         if (pins & ATMEL_SSC_RK)
832                 at91_set_A_periph(AT91_PIN_PB20, 1);
833         if (pins & ATMEL_SSC_RF)
834                 at91_set_A_periph(AT91_PIN_PB21, 1);
835 }
836
837 /*
838  * SSC controllers are accessed through library code, instead of any
839  * kind of all-singing/all-dancing driver.  For example one could be
840  * used by a particular I2S audio codec's driver, while another one
841  * on the same system might be used by a custom data capture driver.
842  */
843 void __init at91_add_device_ssc(unsigned id, unsigned pins)
844 {
845         struct platform_device *pdev;
846
847         /*
848          * NOTE: caller is responsible for passing information matching
849          * "pins" to whatever will be using each particular controller.
850          */
851         switch (id) {
852         case AT91SAM9260_ID_SSC:
853                 pdev = &at91sam9260_ssc_device;
854                 configure_ssc_pins(pins);
855                 break;
856         default:
857                 return;
858         }
859
860         platform_device_register(pdev);
861 }
862
863 #else
864 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
865 #endif
866
867
868 /* --------------------------------------------------------------------
869  *  UART
870  * -------------------------------------------------------------------- */
871 #if defined(CONFIG_SERIAL_ATMEL)
872 static struct resource dbgu_resources[] = {
873         [0] = {
874                 .start  = AT91SAM9260_BASE_DBGU,
875                 .end    = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
876                 .flags  = IORESOURCE_MEM,
877         },
878         [1] = {
879                 .start  = AT91_ID_SYS,
880                 .end    = AT91_ID_SYS,
881                 .flags  = IORESOURCE_IRQ,
882         },
883 };
884
885 static struct atmel_uart_data dbgu_data = {
886         .use_dma_tx     = 0,
887         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
888 };
889
890 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
891
892 static struct platform_device at91sam9260_dbgu_device = {
893         .name           = "atmel_usart",
894         .id             = 0,
895         .dev            = {
896                                 .dma_mask               = &dbgu_dmamask,
897                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
898                                 .platform_data          = &dbgu_data,
899         },
900         .resource       = dbgu_resources,
901         .num_resources  = ARRAY_SIZE(dbgu_resources),
902 };
903
904 static inline void configure_dbgu_pins(void)
905 {
906         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
907         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
908 }
909
910 static struct resource uart0_resources[] = {
911         [0] = {
912                 .start  = AT91SAM9260_BASE_US0,
913                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
914                 .flags  = IORESOURCE_MEM,
915         },
916         [1] = {
917                 .start  = AT91SAM9260_ID_US0,
918                 .end    = AT91SAM9260_ID_US0,
919                 .flags  = IORESOURCE_IRQ,
920         },
921 };
922
923 static struct atmel_uart_data uart0_data = {
924         .use_dma_tx     = 1,
925         .use_dma_rx     = 1,
926 };
927
928 static u64 uart0_dmamask = DMA_BIT_MASK(32);
929
930 static struct platform_device at91sam9260_uart0_device = {
931         .name           = "atmel_usart",
932         .id             = 1,
933         .dev            = {
934                                 .dma_mask               = &uart0_dmamask,
935                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
936                                 .platform_data          = &uart0_data,
937         },
938         .resource       = uart0_resources,
939         .num_resources  = ARRAY_SIZE(uart0_resources),
940 };
941
942 static inline void configure_usart0_pins(unsigned pins)
943 {
944         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
945         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
946
947         if (pins & ATMEL_UART_RTS)
948                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
949         if (pins & ATMEL_UART_CTS)
950                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
951         if (pins & ATMEL_UART_DTR)
952                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
953         if (pins & ATMEL_UART_DSR)
954                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
955         if (pins & ATMEL_UART_DCD)
956                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
957         if (pins & ATMEL_UART_RI)
958                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
959 }
960
961 static struct resource uart1_resources[] = {
962         [0] = {
963                 .start  = AT91SAM9260_BASE_US1,
964                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
965                 .flags  = IORESOURCE_MEM,
966         },
967         [1] = {
968                 .start  = AT91SAM9260_ID_US1,
969                 .end    = AT91SAM9260_ID_US1,
970                 .flags  = IORESOURCE_IRQ,
971         },
972 };
973
974 static struct atmel_uart_data uart1_data = {
975         .use_dma_tx     = 1,
976         .use_dma_rx     = 1,
977 };
978
979 static u64 uart1_dmamask = DMA_BIT_MASK(32);
980
981 static struct platform_device at91sam9260_uart1_device = {
982         .name           = "atmel_usart",
983         .id             = 2,
984         .dev            = {
985                                 .dma_mask               = &uart1_dmamask,
986                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
987                                 .platform_data          = &uart1_data,
988         },
989         .resource       = uart1_resources,
990         .num_resources  = ARRAY_SIZE(uart1_resources),
991 };
992
993 static inline void configure_usart1_pins(unsigned pins)
994 {
995         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
996         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
997
998         if (pins & ATMEL_UART_RTS)
999                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
1000         if (pins & ATMEL_UART_CTS)
1001                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
1002 }
1003
1004 static struct resource uart2_resources[] = {
1005         [0] = {
1006                 .start  = AT91SAM9260_BASE_US2,
1007                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
1008                 .flags  = IORESOURCE_MEM,
1009         },
1010         [1] = {
1011                 .start  = AT91SAM9260_ID_US2,
1012                 .end    = AT91SAM9260_ID_US2,
1013                 .flags  = IORESOURCE_IRQ,
1014         },
1015 };
1016
1017 static struct atmel_uart_data uart2_data = {
1018         .use_dma_tx     = 1,
1019         .use_dma_rx     = 1,
1020 };
1021
1022 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1023
1024 static struct platform_device at91sam9260_uart2_device = {
1025         .name           = "atmel_usart",
1026         .id             = 3,
1027         .dev            = {
1028                                 .dma_mask               = &uart2_dmamask,
1029                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1030                                 .platform_data          = &uart2_data,
1031         },
1032         .resource       = uart2_resources,
1033         .num_resources  = ARRAY_SIZE(uart2_resources),
1034 };
1035
1036 static inline void configure_usart2_pins(unsigned pins)
1037 {
1038         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
1039         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
1040
1041         if (pins & ATMEL_UART_RTS)
1042                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
1043         if (pins & ATMEL_UART_CTS)
1044                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
1045 }
1046
1047 static struct resource uart3_resources[] = {
1048         [0] = {
1049                 .start  = AT91SAM9260_BASE_US3,
1050                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1051                 .flags  = IORESOURCE_MEM,
1052         },
1053         [1] = {
1054                 .start  = AT91SAM9260_ID_US3,
1055                 .end    = AT91SAM9260_ID_US3,
1056                 .flags  = IORESOURCE_IRQ,
1057         },
1058 };
1059
1060 static struct atmel_uart_data uart3_data = {
1061         .use_dma_tx     = 1,
1062         .use_dma_rx     = 1,
1063 };
1064
1065 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1066
1067 static struct platform_device at91sam9260_uart3_device = {
1068         .name           = "atmel_usart",
1069         .id             = 4,
1070         .dev            = {
1071                                 .dma_mask               = &uart3_dmamask,
1072                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1073                                 .platform_data          = &uart3_data,
1074         },
1075         .resource       = uart3_resources,
1076         .num_resources  = ARRAY_SIZE(uart3_resources),
1077 };
1078
1079 static inline void configure_usart3_pins(unsigned pins)
1080 {
1081         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
1082         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
1083
1084         if (pins & ATMEL_UART_RTS)
1085                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
1086         if (pins & ATMEL_UART_CTS)
1087                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
1088 }
1089
1090 static struct resource uart4_resources[] = {
1091         [0] = {
1092                 .start  = AT91SAM9260_BASE_US4,
1093                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1094                 .flags  = IORESOURCE_MEM,
1095         },
1096         [1] = {
1097                 .start  = AT91SAM9260_ID_US4,
1098                 .end    = AT91SAM9260_ID_US4,
1099                 .flags  = IORESOURCE_IRQ,
1100         },
1101 };
1102
1103 static struct atmel_uart_data uart4_data = {
1104         .use_dma_tx     = 1,
1105         .use_dma_rx     = 1,
1106 };
1107
1108 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1109
1110 static struct platform_device at91sam9260_uart4_device = {
1111         .name           = "atmel_usart",
1112         .id             = 5,
1113         .dev            = {
1114                                 .dma_mask               = &uart4_dmamask,
1115                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1116                                 .platform_data          = &uart4_data,
1117         },
1118         .resource       = uart4_resources,
1119         .num_resources  = ARRAY_SIZE(uart4_resources),
1120 };
1121
1122 static inline void configure_usart4_pins(void)
1123 {
1124         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1125         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1126 }
1127
1128 static struct resource uart5_resources[] = {
1129         [0] = {
1130                 .start  = AT91SAM9260_BASE_US5,
1131                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1132                 .flags  = IORESOURCE_MEM,
1133         },
1134         [1] = {
1135                 .start  = AT91SAM9260_ID_US5,
1136                 .end    = AT91SAM9260_ID_US5,
1137                 .flags  = IORESOURCE_IRQ,
1138         },
1139 };
1140
1141 static struct atmel_uart_data uart5_data = {
1142         .use_dma_tx     = 1,
1143         .use_dma_rx     = 1,
1144 };
1145
1146 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1147
1148 static struct platform_device at91sam9260_uart5_device = {
1149         .name           = "atmel_usart",
1150         .id             = 6,
1151         .dev            = {
1152                                 .dma_mask               = &uart5_dmamask,
1153                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1154                                 .platform_data          = &uart5_data,
1155         },
1156         .resource       = uart5_resources,
1157         .num_resources  = ARRAY_SIZE(uart5_resources),
1158 };
1159
1160 static inline void configure_usart5_pins(void)
1161 {
1162         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1163         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1164 }
1165
1166 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1167
1168 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1169 {
1170         struct platform_device *pdev;
1171         struct atmel_uart_data *pdata;
1172
1173         switch (id) {
1174                 case 0:         /* DBGU */
1175                         pdev = &at91sam9260_dbgu_device;
1176                         configure_dbgu_pins();
1177                         break;
1178                 case AT91SAM9260_ID_US0:
1179                         pdev = &at91sam9260_uart0_device;
1180                         configure_usart0_pins(pins);
1181                         break;
1182                 case AT91SAM9260_ID_US1:
1183                         pdev = &at91sam9260_uart1_device;
1184                         configure_usart1_pins(pins);
1185                         break;
1186                 case AT91SAM9260_ID_US2:
1187                         pdev = &at91sam9260_uart2_device;
1188                         configure_usart2_pins(pins);
1189                         break;
1190                 case AT91SAM9260_ID_US3:
1191                         pdev = &at91sam9260_uart3_device;
1192                         configure_usart3_pins(pins);
1193                         break;
1194                 case AT91SAM9260_ID_US4:
1195                         pdev = &at91sam9260_uart4_device;
1196                         configure_usart4_pins();
1197                         break;
1198                 case AT91SAM9260_ID_US5:
1199                         pdev = &at91sam9260_uart5_device;
1200                         configure_usart5_pins();
1201                         break;
1202                 default:
1203                         return;
1204         }
1205         pdata = pdev->dev.platform_data;
1206         pdata->num = portnr;            /* update to mapped ID */
1207
1208         if (portnr < ATMEL_MAX_UART)
1209                 at91_uarts[portnr] = pdev;
1210 }
1211
1212 void __init at91_set_serial_console(unsigned portnr)
1213 {
1214         if (portnr < ATMEL_MAX_UART) {
1215                 atmel_default_console_device = at91_uarts[portnr];
1216                 at91sam9260_set_console_clock(at91_uarts[portnr]->id);
1217         }
1218 }
1219
1220 void __init at91_add_device_serial(void)
1221 {
1222         int i;
1223
1224         for (i = 0; i < ATMEL_MAX_UART; i++) {
1225                 if (at91_uarts[i])
1226                         platform_device_register(at91_uarts[i]);
1227         }
1228
1229         if (!atmel_default_console_device)
1230                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1231 }
1232 #else
1233 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1234 void __init at91_set_serial_console(unsigned portnr) {}
1235 void __init at91_add_device_serial(void) {}
1236 #endif
1237
1238 /* --------------------------------------------------------------------
1239  *  CF/IDE
1240  * -------------------------------------------------------------------- */
1241
1242 #if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
1243         defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1244         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1245
1246 static struct at91_cf_data cf0_data;
1247
1248 static struct resource cf0_resources[] = {
1249         [0] = {
1250                 .start  = AT91_CHIPSELECT_4,
1251                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
1252                 .flags  = IORESOURCE_MEM,
1253         }
1254 };
1255
1256 static struct platform_device cf0_device = {
1257         .id             = 0,
1258         .dev            = {
1259                                 .platform_data  = &cf0_data,
1260         },
1261         .resource       = cf0_resources,
1262         .num_resources  = ARRAY_SIZE(cf0_resources),
1263 };
1264
1265 static struct at91_cf_data cf1_data;
1266
1267 static struct resource cf1_resources[] = {
1268         [0] = {
1269                 .start  = AT91_CHIPSELECT_5,
1270                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
1271                 .flags  = IORESOURCE_MEM,
1272         }
1273 };
1274
1275 static struct platform_device cf1_device = {
1276         .id             = 1,
1277         .dev            = {
1278                                 .platform_data  = &cf1_data,
1279         },
1280         .resource       = cf1_resources,
1281         .num_resources  = ARRAY_SIZE(cf1_resources),
1282 };
1283
1284 void __init at91_add_device_cf(struct at91_cf_data *data)
1285 {
1286         struct platform_device *pdev;
1287         unsigned long csa;
1288
1289         if (!data)
1290                 return;
1291
1292         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1293
1294         switch (data->chipselect) {
1295         case 4:
1296                 at91_set_multi_drive(AT91_PIN_PC8, 0);
1297                 at91_set_A_periph(AT91_PIN_PC8, 0);
1298                 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1299                 cf0_data = *data;
1300                 pdev = &cf0_device;
1301                 break;
1302         case 5:
1303                 at91_set_multi_drive(AT91_PIN_PC9, 0);
1304                 at91_set_A_periph(AT91_PIN_PC9, 0);
1305                 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1306                 cf1_data = *data;
1307                 pdev = &cf1_device;
1308                 break;
1309         default:
1310                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1311                        data->chipselect);
1312                 return;
1313         }
1314
1315         at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1316
1317         if (gpio_is_valid(data->rst_pin)) {
1318                 at91_set_multi_drive(data->rst_pin, 0);
1319                 at91_set_gpio_output(data->rst_pin, 1);
1320         }
1321
1322         if (gpio_is_valid(data->irq_pin)) {
1323                 at91_set_gpio_input(data->irq_pin, 0);
1324                 at91_set_deglitch(data->irq_pin, 1);
1325         }
1326
1327         if (gpio_is_valid(data->det_pin)) {
1328                 at91_set_gpio_input(data->det_pin, 0);
1329                 at91_set_deglitch(data->det_pin, 1);
1330         }
1331
1332         at91_set_B_periph(AT91_PIN_PC6, 0);     /* CFCE1 */
1333         at91_set_B_periph(AT91_PIN_PC7, 0);     /* CFCE2 */
1334         at91_set_A_periph(AT91_PIN_PC10, 0);    /* CFRNW */
1335         at91_set_A_periph(AT91_PIN_PC15, 1);    /* NWAIT */
1336
1337         if (data->flags & AT91_CF_TRUE_IDE)
1338 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1339                 pdev->name = "pata_at91";
1340 #elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
1341                 pdev->name = "at91_ide";
1342 #else
1343 #warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
1344 #endif
1345         else
1346                 pdev->name = "at91_cf";
1347
1348         platform_device_register(pdev);
1349 }
1350
1351 #else
1352 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1353 #endif
1354
1355 /* -------------------------------------------------------------------- */
1356 /*
1357  * These devices are always present and don't need any board-specific
1358  * setup.
1359  */
1360 static int __init at91_add_standard_devices(void)
1361 {
1362         at91_add_device_rtt();
1363         at91_add_device_watchdog();
1364         at91_add_device_tc();
1365         return 0;
1366 }
1367
1368 arch_initcall(at91_add_standard_devices);