2 * arch/arm/mach-at91/at91sam9260_devices.c
4 * Copyright (C) 2006 Atmel
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
20 #include <mach/board.h>
22 #include <mach/at91sam9260.h>
23 #include <mach/at91sam9260_matrix.h>
24 #include <mach/at91_matrix.h>
25 #include <mach/at91sam9_smc.h>
30 /* --------------------------------------------------------------------
32 * -------------------------------------------------------------------- */
34 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35 static u64 ohci_dmamask = DMA_BIT_MASK(32);
36 static struct at91_usbh_data usbh_data;
38 static struct resource usbh_resources[] = {
40 .start = AT91SAM9260_UHP_BASE,
41 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
42 .flags = IORESOURCE_MEM,
45 .start = AT91SAM9260_ID_UHP,
46 .end = AT91SAM9260_ID_UHP,
47 .flags = IORESOURCE_IRQ,
51 static struct platform_device at91_usbh_device = {
55 .dma_mask = &ohci_dmamask,
56 .coherent_dma_mask = DMA_BIT_MASK(32),
57 .platform_data = &usbh_data,
59 .resource = usbh_resources,
60 .num_resources = ARRAY_SIZE(usbh_resources),
63 void __init at91_add_device_usbh(struct at91_usbh_data *data)
70 /* Enable overcurrent notification */
71 for (i = 0; i < data->ports; i++) {
72 if (data->overcurrent_pin[i])
73 at91_set_gpio_input(data->overcurrent_pin[i], 1);
77 platform_device_register(&at91_usbh_device);
80 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
84 /* --------------------------------------------------------------------
86 * -------------------------------------------------------------------- */
88 #ifdef CONFIG_USB_AT91
89 static struct at91_udc_data udc_data;
91 static struct resource udc_resources[] = {
93 .start = AT91SAM9260_BASE_UDP,
94 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
95 .flags = IORESOURCE_MEM,
98 .start = AT91SAM9260_ID_UDP,
99 .end = AT91SAM9260_ID_UDP,
100 .flags = IORESOURCE_IRQ,
104 static struct platform_device at91_udc_device = {
108 .platform_data = &udc_data,
110 .resource = udc_resources,
111 .num_resources = ARRAY_SIZE(udc_resources),
114 void __init at91_add_device_udc(struct at91_udc_data *data)
119 if (gpio_is_valid(data->vbus_pin)) {
120 at91_set_gpio_input(data->vbus_pin, 0);
121 at91_set_deglitch(data->vbus_pin, 1);
124 /* Pullup pin is handled internally by USB device peripheral */
127 platform_device_register(&at91_udc_device);
130 void __init at91_add_device_udc(struct at91_udc_data *data) {}
134 /* --------------------------------------------------------------------
136 * -------------------------------------------------------------------- */
138 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
139 static u64 eth_dmamask = DMA_BIT_MASK(32);
140 static struct macb_platform_data eth_data;
142 static struct resource eth_resources[] = {
144 .start = AT91SAM9260_BASE_EMAC,
145 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
146 .flags = IORESOURCE_MEM,
149 .start = AT91SAM9260_ID_EMAC,
150 .end = AT91SAM9260_ID_EMAC,
151 .flags = IORESOURCE_IRQ,
155 static struct platform_device at91sam9260_eth_device = {
159 .dma_mask = ð_dmamask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
161 .platform_data = ð_data,
163 .resource = eth_resources,
164 .num_resources = ARRAY_SIZE(eth_resources),
167 void __init at91_add_device_eth(struct macb_platform_data *data)
172 if (gpio_is_valid(data->phy_irq_pin)) {
173 at91_set_gpio_input(data->phy_irq_pin, 0);
174 at91_set_deglitch(data->phy_irq_pin, 1);
177 /* Pins used for MII and RMII */
178 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
179 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
180 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
181 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
182 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
183 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
184 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
185 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
186 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
187 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
189 if (!data->is_rmii) {
190 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
191 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
192 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
193 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
194 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
195 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
196 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
197 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
201 platform_device_register(&at91sam9260_eth_device);
204 void __init at91_add_device_eth(struct macb_platform_data *data) {}
208 /* --------------------------------------------------------------------
210 * -------------------------------------------------------------------- */
212 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
213 static u64 mmc_dmamask = DMA_BIT_MASK(32);
214 static struct at91_mmc_data mmc_data;
216 static struct resource mmc_resources[] = {
218 .start = AT91SAM9260_BASE_MCI,
219 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
220 .flags = IORESOURCE_MEM,
223 .start = AT91SAM9260_ID_MCI,
224 .end = AT91SAM9260_ID_MCI,
225 .flags = IORESOURCE_IRQ,
229 static struct platform_device at91sam9260_mmc_device = {
233 .dma_mask = &mmc_dmamask,
234 .coherent_dma_mask = DMA_BIT_MASK(32),
235 .platform_data = &mmc_data,
237 .resource = mmc_resources,
238 .num_resources = ARRAY_SIZE(mmc_resources),
241 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
247 if (gpio_is_valid(data->det_pin)) {
248 at91_set_gpio_input(data->det_pin, 1);
249 at91_set_deglitch(data->det_pin, 1);
251 if (gpio_is_valid(data->wp_pin))
252 at91_set_gpio_input(data->wp_pin, 1);
253 if (gpio_is_valid(data->vcc_pin))
254 at91_set_gpio_output(data->vcc_pin, 0);
257 at91_set_A_periph(AT91_PIN_PA8, 0);
261 at91_set_B_periph(AT91_PIN_PA1, 1);
263 /* DAT0, maybe DAT1..DAT3 */
264 at91_set_B_periph(AT91_PIN_PA0, 1);
266 at91_set_B_periph(AT91_PIN_PA5, 1);
267 at91_set_B_periph(AT91_PIN_PA4, 1);
268 at91_set_B_periph(AT91_PIN_PA3, 1);
272 at91_set_A_periph(AT91_PIN_PA7, 1);
274 /* DAT0, maybe DAT1..DAT3 */
275 at91_set_A_periph(AT91_PIN_PA6, 1);
277 at91_set_A_periph(AT91_PIN_PA9, 1);
278 at91_set_A_periph(AT91_PIN_PA10, 1);
279 at91_set_A_periph(AT91_PIN_PA11, 1);
284 platform_device_register(&at91sam9260_mmc_device);
287 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
290 /* --------------------------------------------------------------------
291 * MMC / SD Slot for Atmel MCI Driver
292 * -------------------------------------------------------------------- */
294 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
295 static u64 mmc_dmamask = DMA_BIT_MASK(32);
296 static struct mci_platform_data mmc_data;
298 static struct resource mmc_resources[] = {
300 .start = AT91SAM9260_BASE_MCI,
301 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
302 .flags = IORESOURCE_MEM,
305 .start = AT91SAM9260_ID_MCI,
306 .end = AT91SAM9260_ID_MCI,
307 .flags = IORESOURCE_IRQ,
311 static struct platform_device at91sam9260_mmc_device = {
315 .dma_mask = &mmc_dmamask,
316 .coherent_dma_mask = DMA_BIT_MASK(32),
317 .platform_data = &mmc_data,
319 .resource = mmc_resources,
320 .num_resources = ARRAY_SIZE(mmc_resources),
323 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
326 unsigned int slot_count = 0;
331 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
332 if (data->slot[i].bus_width) {
334 if (gpio_is_valid(data->slot[i].detect_pin)) {
335 at91_set_gpio_input(data->slot[i].detect_pin, 1);
336 at91_set_deglitch(data->slot[i].detect_pin, 1);
338 if (gpio_is_valid(data->slot[i].wp_pin))
339 at91_set_gpio_input(data->slot[i].wp_pin, 1);
344 at91_set_A_periph(AT91_PIN_PA7, 1);
345 /* DAT0, maybe DAT1..DAT3 */
346 at91_set_A_periph(AT91_PIN_PA6, 1);
347 if (data->slot[i].bus_width == 4) {
348 at91_set_A_periph(AT91_PIN_PA9, 1);
349 at91_set_A_periph(AT91_PIN_PA10, 1);
350 at91_set_A_periph(AT91_PIN_PA11, 1);
356 at91_set_B_periph(AT91_PIN_PA1, 1);
357 /* DAT0, maybe DAT1..DAT3 */
358 at91_set_B_periph(AT91_PIN_PA0, 1);
359 if (data->slot[i].bus_width == 4) {
360 at91_set_B_periph(AT91_PIN_PA5, 1);
361 at91_set_B_periph(AT91_PIN_PA4, 1);
362 at91_set_B_periph(AT91_PIN_PA3, 1);
368 "AT91: SD/MMC slot %d not available\n", i);
376 at91_set_A_periph(AT91_PIN_PA8, 0);
379 platform_device_register(&at91sam9260_mmc_device);
383 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
387 /* --------------------------------------------------------------------
389 * -------------------------------------------------------------------- */
391 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
392 static struct atmel_nand_data nand_data;
394 #define NAND_BASE AT91_CHIPSELECT_3
396 static struct resource nand_resources[] = {
399 .end = NAND_BASE + SZ_256M - 1,
400 .flags = IORESOURCE_MEM,
403 .start = AT91SAM9260_BASE_ECC,
404 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
405 .flags = IORESOURCE_MEM,
409 static struct platform_device at91sam9260_nand_device = {
410 .name = "atmel_nand",
413 .platform_data = &nand_data,
415 .resource = nand_resources,
416 .num_resources = ARRAY_SIZE(nand_resources),
419 void __init at91_add_device_nand(struct atmel_nand_data *data)
426 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
427 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
430 if (gpio_is_valid(data->enable_pin))
431 at91_set_gpio_output(data->enable_pin, 1);
434 if (gpio_is_valid(data->rdy_pin))
435 at91_set_gpio_input(data->rdy_pin, 1);
437 /* card detect pin */
438 if (gpio_is_valid(data->det_pin))
439 at91_set_gpio_input(data->det_pin, 1);
442 platform_device_register(&at91sam9260_nand_device);
445 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
449 /* --------------------------------------------------------------------
451 * -------------------------------------------------------------------- */
454 * Prefer the GPIO code since the TWI controller isn't robust
455 * (gets overruns and underruns under load) and can only issue
456 * repeated STARTs in one scenario (the driver doesn't yet handle them).
459 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
461 static struct i2c_gpio_platform_data pdata = {
462 .sda_pin = AT91_PIN_PA23,
463 .sda_is_open_drain = 1,
464 .scl_pin = AT91_PIN_PA24,
465 .scl_is_open_drain = 1,
466 .udelay = 2, /* ~100 kHz */
469 static struct platform_device at91sam9260_twi_device = {
472 .dev.platform_data = &pdata,
475 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
477 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
478 at91_set_multi_drive(AT91_PIN_PA23, 1);
480 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
481 at91_set_multi_drive(AT91_PIN_PA24, 1);
483 i2c_register_board_info(0, devices, nr_devices);
484 platform_device_register(&at91sam9260_twi_device);
487 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
489 static struct resource twi_resources[] = {
491 .start = AT91SAM9260_BASE_TWI,
492 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
493 .flags = IORESOURCE_MEM,
496 .start = AT91SAM9260_ID_TWI,
497 .end = AT91SAM9260_ID_TWI,
498 .flags = IORESOURCE_IRQ,
502 static struct platform_device at91sam9260_twi_device = {
505 .resource = twi_resources,
506 .num_resources = ARRAY_SIZE(twi_resources),
509 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
511 /* pins used for TWI interface */
512 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
513 at91_set_multi_drive(AT91_PIN_PA23, 1);
515 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
516 at91_set_multi_drive(AT91_PIN_PA24, 1);
518 i2c_register_board_info(0, devices, nr_devices);
519 platform_device_register(&at91sam9260_twi_device);
522 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
526 /* --------------------------------------------------------------------
528 * -------------------------------------------------------------------- */
530 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
531 static u64 spi_dmamask = DMA_BIT_MASK(32);
533 static struct resource spi0_resources[] = {
535 .start = AT91SAM9260_BASE_SPI0,
536 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
537 .flags = IORESOURCE_MEM,
540 .start = AT91SAM9260_ID_SPI0,
541 .end = AT91SAM9260_ID_SPI0,
542 .flags = IORESOURCE_IRQ,
546 static struct platform_device at91sam9260_spi0_device = {
550 .dma_mask = &spi_dmamask,
551 .coherent_dma_mask = DMA_BIT_MASK(32),
553 .resource = spi0_resources,
554 .num_resources = ARRAY_SIZE(spi0_resources),
557 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
559 static struct resource spi1_resources[] = {
561 .start = AT91SAM9260_BASE_SPI1,
562 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
563 .flags = IORESOURCE_MEM,
566 .start = AT91SAM9260_ID_SPI1,
567 .end = AT91SAM9260_ID_SPI1,
568 .flags = IORESOURCE_IRQ,
572 static struct platform_device at91sam9260_spi1_device = {
576 .dma_mask = &spi_dmamask,
577 .coherent_dma_mask = DMA_BIT_MASK(32),
579 .resource = spi1_resources,
580 .num_resources = ARRAY_SIZE(spi1_resources),
583 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
585 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
588 unsigned long cs_pin;
589 short enable_spi0 = 0;
590 short enable_spi1 = 0;
592 /* Choose SPI chip-selects */
593 for (i = 0; i < nr_devices; i++) {
594 if (devices[i].controller_data)
595 cs_pin = (unsigned long) devices[i].controller_data;
596 else if (devices[i].bus_num == 0)
597 cs_pin = spi0_standard_cs[devices[i].chip_select];
599 cs_pin = spi1_standard_cs[devices[i].chip_select];
601 if (devices[i].bus_num == 0)
606 /* enable chip-select pin */
607 at91_set_gpio_output(cs_pin, 1);
609 /* pass chip-select pin to driver */
610 devices[i].controller_data = (void *) cs_pin;
613 spi_register_board_info(devices, nr_devices);
615 /* Configure SPI bus(es) */
617 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
618 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
619 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
621 platform_device_register(&at91sam9260_spi0_device);
624 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
625 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
626 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
628 platform_device_register(&at91sam9260_spi1_device);
632 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
636 /* --------------------------------------------------------------------
637 * Timer/Counter blocks
638 * -------------------------------------------------------------------- */
640 #ifdef CONFIG_ATMEL_TCLIB
642 static struct resource tcb0_resources[] = {
644 .start = AT91SAM9260_BASE_TCB0,
645 .end = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
646 .flags = IORESOURCE_MEM,
649 .start = AT91SAM9260_ID_TC0,
650 .end = AT91SAM9260_ID_TC0,
651 .flags = IORESOURCE_IRQ,
654 .start = AT91SAM9260_ID_TC1,
655 .end = AT91SAM9260_ID_TC1,
656 .flags = IORESOURCE_IRQ,
659 .start = AT91SAM9260_ID_TC2,
660 .end = AT91SAM9260_ID_TC2,
661 .flags = IORESOURCE_IRQ,
665 static struct platform_device at91sam9260_tcb0_device = {
668 .resource = tcb0_resources,
669 .num_resources = ARRAY_SIZE(tcb0_resources),
672 static struct resource tcb1_resources[] = {
674 .start = AT91SAM9260_BASE_TCB1,
675 .end = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
676 .flags = IORESOURCE_MEM,
679 .start = AT91SAM9260_ID_TC3,
680 .end = AT91SAM9260_ID_TC3,
681 .flags = IORESOURCE_IRQ,
684 .start = AT91SAM9260_ID_TC4,
685 .end = AT91SAM9260_ID_TC4,
686 .flags = IORESOURCE_IRQ,
689 .start = AT91SAM9260_ID_TC5,
690 .end = AT91SAM9260_ID_TC5,
691 .flags = IORESOURCE_IRQ,
695 static struct platform_device at91sam9260_tcb1_device = {
698 .resource = tcb1_resources,
699 .num_resources = ARRAY_SIZE(tcb1_resources),
702 static void __init at91_add_device_tc(void)
704 platform_device_register(&at91sam9260_tcb0_device);
705 platform_device_register(&at91sam9260_tcb1_device);
708 static void __init at91_add_device_tc(void) { }
712 /* --------------------------------------------------------------------
714 * -------------------------------------------------------------------- */
716 static struct resource rtt_resources[] = {
718 .start = AT91SAM9260_BASE_RTT,
719 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
720 .flags = IORESOURCE_MEM,
724 static struct platform_device at91sam9260_rtt_device = {
727 .resource = rtt_resources,
728 .num_resources = ARRAY_SIZE(rtt_resources),
732 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
733 static void __init at91_add_device_rtt_rtc(void)
735 at91sam9260_rtt_device.name = "rtc-at91sam9";
738 static void __init at91_add_device_rtt_rtc(void) {}
741 static void __init at91_add_device_rtt(void)
743 at91_add_device_rtt_rtc();
744 platform_device_register(&at91sam9260_rtt_device);
748 /* --------------------------------------------------------------------
750 * -------------------------------------------------------------------- */
752 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
753 static struct resource wdt_resources[] = {
755 .start = AT91SAM9260_BASE_WDT,
756 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
757 .flags = IORESOURCE_MEM,
761 static struct platform_device at91sam9260_wdt_device = {
764 .resource = wdt_resources,
765 .num_resources = ARRAY_SIZE(wdt_resources),
768 static void __init at91_add_device_watchdog(void)
770 platform_device_register(&at91sam9260_wdt_device);
773 static void __init at91_add_device_watchdog(void) {}
777 /* --------------------------------------------------------------------
778 * SSC -- Synchronous Serial Controller
779 * -------------------------------------------------------------------- */
781 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
782 static u64 ssc_dmamask = DMA_BIT_MASK(32);
784 static struct resource ssc_resources[] = {
786 .start = AT91SAM9260_BASE_SSC,
787 .end = AT91SAM9260_BASE_SSC + SZ_16K - 1,
788 .flags = IORESOURCE_MEM,
791 .start = AT91SAM9260_ID_SSC,
792 .end = AT91SAM9260_ID_SSC,
793 .flags = IORESOURCE_IRQ,
797 static struct platform_device at91sam9260_ssc_device = {
801 .dma_mask = &ssc_dmamask,
802 .coherent_dma_mask = DMA_BIT_MASK(32),
804 .resource = ssc_resources,
805 .num_resources = ARRAY_SIZE(ssc_resources),
808 static inline void configure_ssc_pins(unsigned pins)
810 if (pins & ATMEL_SSC_TF)
811 at91_set_A_periph(AT91_PIN_PB17, 1);
812 if (pins & ATMEL_SSC_TK)
813 at91_set_A_periph(AT91_PIN_PB16, 1);
814 if (pins & ATMEL_SSC_TD)
815 at91_set_A_periph(AT91_PIN_PB18, 1);
816 if (pins & ATMEL_SSC_RD)
817 at91_set_A_periph(AT91_PIN_PB19, 1);
818 if (pins & ATMEL_SSC_RK)
819 at91_set_A_periph(AT91_PIN_PB20, 1);
820 if (pins & ATMEL_SSC_RF)
821 at91_set_A_periph(AT91_PIN_PB21, 1);
825 * SSC controllers are accessed through library code, instead of any
826 * kind of all-singing/all-dancing driver. For example one could be
827 * used by a particular I2S audio codec's driver, while another one
828 * on the same system might be used by a custom data capture driver.
830 void __init at91_add_device_ssc(unsigned id, unsigned pins)
832 struct platform_device *pdev;
835 * NOTE: caller is responsible for passing information matching
836 * "pins" to whatever will be using each particular controller.
839 case AT91SAM9260_ID_SSC:
840 pdev = &at91sam9260_ssc_device;
841 configure_ssc_pins(pins);
847 platform_device_register(pdev);
851 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
855 /* --------------------------------------------------------------------
857 * -------------------------------------------------------------------- */
858 #if defined(CONFIG_SERIAL_ATMEL)
859 static struct resource dbgu_resources[] = {
861 .start = AT91SAM9260_BASE_DBGU,
862 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
863 .flags = IORESOURCE_MEM,
866 .start = AT91_ID_SYS,
868 .flags = IORESOURCE_IRQ,
872 static struct atmel_uart_data dbgu_data = {
874 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
877 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
879 static struct platform_device at91sam9260_dbgu_device = {
880 .name = "atmel_usart",
883 .dma_mask = &dbgu_dmamask,
884 .coherent_dma_mask = DMA_BIT_MASK(32),
885 .platform_data = &dbgu_data,
887 .resource = dbgu_resources,
888 .num_resources = ARRAY_SIZE(dbgu_resources),
891 static inline void configure_dbgu_pins(void)
893 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
894 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
897 static struct resource uart0_resources[] = {
899 .start = AT91SAM9260_BASE_US0,
900 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
901 .flags = IORESOURCE_MEM,
904 .start = AT91SAM9260_ID_US0,
905 .end = AT91SAM9260_ID_US0,
906 .flags = IORESOURCE_IRQ,
910 static struct atmel_uart_data uart0_data = {
915 static u64 uart0_dmamask = DMA_BIT_MASK(32);
917 static struct platform_device at91sam9260_uart0_device = {
918 .name = "atmel_usart",
921 .dma_mask = &uart0_dmamask,
922 .coherent_dma_mask = DMA_BIT_MASK(32),
923 .platform_data = &uart0_data,
925 .resource = uart0_resources,
926 .num_resources = ARRAY_SIZE(uart0_resources),
929 static inline void configure_usart0_pins(unsigned pins)
931 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
932 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
934 if (pins & ATMEL_UART_RTS)
935 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
936 if (pins & ATMEL_UART_CTS)
937 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
938 if (pins & ATMEL_UART_DTR)
939 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
940 if (pins & ATMEL_UART_DSR)
941 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
942 if (pins & ATMEL_UART_DCD)
943 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
944 if (pins & ATMEL_UART_RI)
945 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
948 static struct resource uart1_resources[] = {
950 .start = AT91SAM9260_BASE_US1,
951 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
952 .flags = IORESOURCE_MEM,
955 .start = AT91SAM9260_ID_US1,
956 .end = AT91SAM9260_ID_US1,
957 .flags = IORESOURCE_IRQ,
961 static struct atmel_uart_data uart1_data = {
966 static u64 uart1_dmamask = DMA_BIT_MASK(32);
968 static struct platform_device at91sam9260_uart1_device = {
969 .name = "atmel_usart",
972 .dma_mask = &uart1_dmamask,
973 .coherent_dma_mask = DMA_BIT_MASK(32),
974 .platform_data = &uart1_data,
976 .resource = uart1_resources,
977 .num_resources = ARRAY_SIZE(uart1_resources),
980 static inline void configure_usart1_pins(unsigned pins)
982 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
983 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
985 if (pins & ATMEL_UART_RTS)
986 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
987 if (pins & ATMEL_UART_CTS)
988 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
991 static struct resource uart2_resources[] = {
993 .start = AT91SAM9260_BASE_US2,
994 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
995 .flags = IORESOURCE_MEM,
998 .start = AT91SAM9260_ID_US2,
999 .end = AT91SAM9260_ID_US2,
1000 .flags = IORESOURCE_IRQ,
1004 static struct atmel_uart_data uart2_data = {
1009 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1011 static struct platform_device at91sam9260_uart2_device = {
1012 .name = "atmel_usart",
1015 .dma_mask = &uart2_dmamask,
1016 .coherent_dma_mask = DMA_BIT_MASK(32),
1017 .platform_data = &uart2_data,
1019 .resource = uart2_resources,
1020 .num_resources = ARRAY_SIZE(uart2_resources),
1023 static inline void configure_usart2_pins(unsigned pins)
1025 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
1026 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
1028 if (pins & ATMEL_UART_RTS)
1029 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */
1030 if (pins & ATMEL_UART_CTS)
1031 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */
1034 static struct resource uart3_resources[] = {
1036 .start = AT91SAM9260_BASE_US3,
1037 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1038 .flags = IORESOURCE_MEM,
1041 .start = AT91SAM9260_ID_US3,
1042 .end = AT91SAM9260_ID_US3,
1043 .flags = IORESOURCE_IRQ,
1047 static struct atmel_uart_data uart3_data = {
1052 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1054 static struct platform_device at91sam9260_uart3_device = {
1055 .name = "atmel_usart",
1058 .dma_mask = &uart3_dmamask,
1059 .coherent_dma_mask = DMA_BIT_MASK(32),
1060 .platform_data = &uart3_data,
1062 .resource = uart3_resources,
1063 .num_resources = ARRAY_SIZE(uart3_resources),
1066 static inline void configure_usart3_pins(unsigned pins)
1068 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
1069 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
1071 if (pins & ATMEL_UART_RTS)
1072 at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */
1073 if (pins & ATMEL_UART_CTS)
1074 at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */
1077 static struct resource uart4_resources[] = {
1079 .start = AT91SAM9260_BASE_US4,
1080 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1081 .flags = IORESOURCE_MEM,
1084 .start = AT91SAM9260_ID_US4,
1085 .end = AT91SAM9260_ID_US4,
1086 .flags = IORESOURCE_IRQ,
1090 static struct atmel_uart_data uart4_data = {
1095 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1097 static struct platform_device at91sam9260_uart4_device = {
1098 .name = "atmel_usart",
1101 .dma_mask = &uart4_dmamask,
1102 .coherent_dma_mask = DMA_BIT_MASK(32),
1103 .platform_data = &uart4_data,
1105 .resource = uart4_resources,
1106 .num_resources = ARRAY_SIZE(uart4_resources),
1109 static inline void configure_usart4_pins(void)
1111 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
1112 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
1115 static struct resource uart5_resources[] = {
1117 .start = AT91SAM9260_BASE_US5,
1118 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1119 .flags = IORESOURCE_MEM,
1122 .start = AT91SAM9260_ID_US5,
1123 .end = AT91SAM9260_ID_US5,
1124 .flags = IORESOURCE_IRQ,
1128 static struct atmel_uart_data uart5_data = {
1133 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1135 static struct platform_device at91sam9260_uart5_device = {
1136 .name = "atmel_usart",
1139 .dma_mask = &uart5_dmamask,
1140 .coherent_dma_mask = DMA_BIT_MASK(32),
1141 .platform_data = &uart5_data,
1143 .resource = uart5_resources,
1144 .num_resources = ARRAY_SIZE(uart5_resources),
1147 static inline void configure_usart5_pins(void)
1149 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
1150 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
1153 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1154 struct platform_device *atmel_default_console_device; /* the serial console device */
1156 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1158 struct platform_device *pdev;
1159 struct atmel_uart_data *pdata;
1163 pdev = &at91sam9260_dbgu_device;
1164 configure_dbgu_pins();
1166 case AT91SAM9260_ID_US0:
1167 pdev = &at91sam9260_uart0_device;
1168 configure_usart0_pins(pins);
1170 case AT91SAM9260_ID_US1:
1171 pdev = &at91sam9260_uart1_device;
1172 configure_usart1_pins(pins);
1174 case AT91SAM9260_ID_US2:
1175 pdev = &at91sam9260_uart2_device;
1176 configure_usart2_pins(pins);
1178 case AT91SAM9260_ID_US3:
1179 pdev = &at91sam9260_uart3_device;
1180 configure_usart3_pins(pins);
1182 case AT91SAM9260_ID_US4:
1183 pdev = &at91sam9260_uart4_device;
1184 configure_usart4_pins();
1186 case AT91SAM9260_ID_US5:
1187 pdev = &at91sam9260_uart5_device;
1188 configure_usart5_pins();
1193 pdata = pdev->dev.platform_data;
1194 pdata->num = portnr; /* update to mapped ID */
1196 if (portnr < ATMEL_MAX_UART)
1197 at91_uarts[portnr] = pdev;
1200 void __init at91_set_serial_console(unsigned portnr)
1202 if (portnr < ATMEL_MAX_UART) {
1203 atmel_default_console_device = at91_uarts[portnr];
1204 at91sam9260_set_console_clock(at91_uarts[portnr]->id);
1208 void __init at91_add_device_serial(void)
1212 for (i = 0; i < ATMEL_MAX_UART; i++) {
1214 platform_device_register(at91_uarts[i]);
1217 if (!atmel_default_console_device)
1218 printk(KERN_INFO "AT91: No default serial console defined.\n");
1221 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1222 void __init at91_set_serial_console(unsigned portnr) {}
1223 void __init at91_add_device_serial(void) {}
1226 /* --------------------------------------------------------------------
1228 * -------------------------------------------------------------------- */
1230 #if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
1231 defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1232 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1234 static struct at91_cf_data cf0_data;
1236 static struct resource cf0_resources[] = {
1238 .start = AT91_CHIPSELECT_4,
1239 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
1240 .flags = IORESOURCE_MEM,
1244 static struct platform_device cf0_device = {
1247 .platform_data = &cf0_data,
1249 .resource = cf0_resources,
1250 .num_resources = ARRAY_SIZE(cf0_resources),
1253 static struct at91_cf_data cf1_data;
1255 static struct resource cf1_resources[] = {
1257 .start = AT91_CHIPSELECT_5,
1258 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
1259 .flags = IORESOURCE_MEM,
1263 static struct platform_device cf1_device = {
1266 .platform_data = &cf1_data,
1268 .resource = cf1_resources,
1269 .num_resources = ARRAY_SIZE(cf1_resources),
1272 void __init at91_add_device_cf(struct at91_cf_data *data)
1274 struct platform_device *pdev;
1280 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1282 switch (data->chipselect) {
1284 at91_set_multi_drive(AT91_PIN_PC8, 0);
1285 at91_set_A_periph(AT91_PIN_PC8, 0);
1286 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1291 at91_set_multi_drive(AT91_PIN_PC9, 0);
1292 at91_set_A_periph(AT91_PIN_PC9, 0);
1293 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1298 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1303 at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1305 if (gpio_is_valid(data->rst_pin)) {
1306 at91_set_multi_drive(data->rst_pin, 0);
1307 at91_set_gpio_output(data->rst_pin, 1);
1310 if (gpio_is_valid(data->irq_pin)) {
1311 at91_set_gpio_input(data->irq_pin, 0);
1312 at91_set_deglitch(data->irq_pin, 1);
1315 if (gpio_is_valid(data->det_pin)) {
1316 at91_set_gpio_input(data->det_pin, 0);
1317 at91_set_deglitch(data->det_pin, 1);
1320 at91_set_B_periph(AT91_PIN_PC6, 0); /* CFCE1 */
1321 at91_set_B_periph(AT91_PIN_PC7, 0); /* CFCE2 */
1322 at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */
1323 at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */
1325 if (data->flags & AT91_CF_TRUE_IDE)
1326 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1327 pdev->name = "pata_at91";
1328 #elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
1329 pdev->name = "at91_ide";
1331 #warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
1334 pdev->name = "at91_cf";
1336 platform_device_register(pdev);
1340 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1343 /* -------------------------------------------------------------------- */
1345 * These devices are always present and don't need any board-specific
1348 static int __init at91_add_standard_devices(void)
1350 at91_add_device_rtt();
1351 at91_add_device_watchdog();
1352 at91_add_device_tc();
1356 arch_initcall(at91_add_standard_devices);