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1 /*
2  * arch/arm/mach-at91/at91sam9260_devices.c
3  *
4  *  Copyright (C) 2006 Atmel
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <mach/board.h>
21 #include <mach/cpu.h>
22 #include <mach/at91sam9260.h>
23 #include <mach/at91sam9260_matrix.h>
24 #include <mach/at91_matrix.h>
25 #include <mach/at91sam9_smc.h>
26
27 #include "generic.h"
28
29
30 /* --------------------------------------------------------------------
31  *  USB Host
32  * -------------------------------------------------------------------- */
33
34 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35 static u64 ohci_dmamask = DMA_BIT_MASK(32);
36 static struct at91_usbh_data usbh_data;
37
38 static struct resource usbh_resources[] = {
39         [0] = {
40                 .start  = AT91SAM9260_UHP_BASE,
41                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
42                 .flags  = IORESOURCE_MEM,
43         },
44         [1] = {
45                 .start  = AT91SAM9260_ID_UHP,
46                 .end    = AT91SAM9260_ID_UHP,
47                 .flags  = IORESOURCE_IRQ,
48         },
49 };
50
51 static struct platform_device at91_usbh_device = {
52         .name           = "at91_ohci",
53         .id             = -1,
54         .dev            = {
55                                 .dma_mask               = &ohci_dmamask,
56                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
57                                 .platform_data          = &usbh_data,
58         },
59         .resource       = usbh_resources,
60         .num_resources  = ARRAY_SIZE(usbh_resources),
61 };
62
63 void __init at91_add_device_usbh(struct at91_usbh_data *data)
64 {
65         int i;
66
67         if (!data)
68                 return;
69
70         /* Enable overcurrent notification */
71         for (i = 0; i < data->ports; i++) {
72                 if (data->overcurrent_pin[i])
73                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
74         }
75
76         usbh_data = *data;
77         platform_device_register(&at91_usbh_device);
78 }
79 #else
80 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
81 #endif
82
83
84 /* --------------------------------------------------------------------
85  *  USB Device (Gadget)
86  * -------------------------------------------------------------------- */
87
88 #ifdef CONFIG_USB_AT91
89 static struct at91_udc_data udc_data;
90
91 static struct resource udc_resources[] = {
92         [0] = {
93                 .start  = AT91SAM9260_BASE_UDP,
94                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
95                 .flags  = IORESOURCE_MEM,
96         },
97         [1] = {
98                 .start  = AT91SAM9260_ID_UDP,
99                 .end    = AT91SAM9260_ID_UDP,
100                 .flags  = IORESOURCE_IRQ,
101         },
102 };
103
104 static struct platform_device at91_udc_device = {
105         .name           = "at91_udc",
106         .id             = -1,
107         .dev            = {
108                                 .platform_data          = &udc_data,
109         },
110         .resource       = udc_resources,
111         .num_resources  = ARRAY_SIZE(udc_resources),
112 };
113
114 void __init at91_add_device_udc(struct at91_udc_data *data)
115 {
116         if (!data)
117                 return;
118
119         if (gpio_is_valid(data->vbus_pin)) {
120                 at91_set_gpio_input(data->vbus_pin, 0);
121                 at91_set_deglitch(data->vbus_pin, 1);
122         }
123
124         /* Pullup pin is handled internally by USB device peripheral */
125
126         udc_data = *data;
127         platform_device_register(&at91_udc_device);
128 }
129 #else
130 void __init at91_add_device_udc(struct at91_udc_data *data) {}
131 #endif
132
133
134 /* --------------------------------------------------------------------
135  *  Ethernet
136  * -------------------------------------------------------------------- */
137
138 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
139 static u64 eth_dmamask = DMA_BIT_MASK(32);
140 static struct macb_platform_data eth_data;
141
142 static struct resource eth_resources[] = {
143         [0] = {
144                 .start  = AT91SAM9260_BASE_EMAC,
145                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
146                 .flags  = IORESOURCE_MEM,
147         },
148         [1] = {
149                 .start  = AT91SAM9260_ID_EMAC,
150                 .end    = AT91SAM9260_ID_EMAC,
151                 .flags  = IORESOURCE_IRQ,
152         },
153 };
154
155 static struct platform_device at91sam9260_eth_device = {
156         .name           = "macb",
157         .id             = -1,
158         .dev            = {
159                                 .dma_mask               = &eth_dmamask,
160                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
161                                 .platform_data          = &eth_data,
162         },
163         .resource       = eth_resources,
164         .num_resources  = ARRAY_SIZE(eth_resources),
165 };
166
167 void __init at91_add_device_eth(struct macb_platform_data *data)
168 {
169         if (!data)
170                 return;
171
172         if (gpio_is_valid(data->phy_irq_pin)) {
173                 at91_set_gpio_input(data->phy_irq_pin, 0);
174                 at91_set_deglitch(data->phy_irq_pin, 1);
175         }
176
177         /* Pins used for MII and RMII */
178         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
179         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
180         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
181         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
182         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
183         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
184         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
185         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
186         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
187         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
188
189         if (!data->is_rmii) {
190                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
191                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
192                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
193                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
194                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
195                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
196                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
197                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
198         }
199
200         eth_data = *data;
201         platform_device_register(&at91sam9260_eth_device);
202 }
203 #else
204 void __init at91_add_device_eth(struct macb_platform_data *data) {}
205 #endif
206
207
208 /* --------------------------------------------------------------------
209  *  MMC / SD
210  * -------------------------------------------------------------------- */
211
212 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
213 static u64 mmc_dmamask = DMA_BIT_MASK(32);
214 static struct at91_mmc_data mmc_data;
215
216 static struct resource mmc_resources[] = {
217         [0] = {
218                 .start  = AT91SAM9260_BASE_MCI,
219                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
220                 .flags  = IORESOURCE_MEM,
221         },
222         [1] = {
223                 .start  = AT91SAM9260_ID_MCI,
224                 .end    = AT91SAM9260_ID_MCI,
225                 .flags  = IORESOURCE_IRQ,
226         },
227 };
228
229 static struct platform_device at91sam9260_mmc_device = {
230         .name           = "at91_mci",
231         .id             = -1,
232         .dev            = {
233                                 .dma_mask               = &mmc_dmamask,
234                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
235                                 .platform_data          = &mmc_data,
236         },
237         .resource       = mmc_resources,
238         .num_resources  = ARRAY_SIZE(mmc_resources),
239 };
240
241 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
242 {
243         if (!data)
244                 return;
245
246         /* input/irq */
247         if (gpio_is_valid(data->det_pin)) {
248                 at91_set_gpio_input(data->det_pin, 1);
249                 at91_set_deglitch(data->det_pin, 1);
250         }
251         if (gpio_is_valid(data->wp_pin))
252                 at91_set_gpio_input(data->wp_pin, 1);
253         if (gpio_is_valid(data->vcc_pin))
254                 at91_set_gpio_output(data->vcc_pin, 0);
255
256         /* CLK */
257         at91_set_A_periph(AT91_PIN_PA8, 0);
258
259         if (data->slot_b) {
260                 /* CMD */
261                 at91_set_B_periph(AT91_PIN_PA1, 1);
262
263                 /* DAT0, maybe DAT1..DAT3 */
264                 at91_set_B_periph(AT91_PIN_PA0, 1);
265                 if (data->wire4) {
266                         at91_set_B_periph(AT91_PIN_PA5, 1);
267                         at91_set_B_periph(AT91_PIN_PA4, 1);
268                         at91_set_B_periph(AT91_PIN_PA3, 1);
269                 }
270         } else {
271                 /* CMD */
272                 at91_set_A_periph(AT91_PIN_PA7, 1);
273
274                 /* DAT0, maybe DAT1..DAT3 */
275                 at91_set_A_periph(AT91_PIN_PA6, 1);
276                 if (data->wire4) {
277                         at91_set_A_periph(AT91_PIN_PA9, 1);
278                         at91_set_A_periph(AT91_PIN_PA10, 1);
279                         at91_set_A_periph(AT91_PIN_PA11, 1);
280                 }
281         }
282
283         mmc_data = *data;
284         platform_device_register(&at91sam9260_mmc_device);
285 }
286 #else
287 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
288 #endif
289
290 /* --------------------------------------------------------------------
291  *  MMC / SD Slot for Atmel MCI Driver
292  * -------------------------------------------------------------------- */
293
294 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
295 static u64 mmc_dmamask = DMA_BIT_MASK(32);
296 static struct mci_platform_data mmc_data;
297
298 static struct resource mmc_resources[] = {
299         [0] = {
300                 .start  = AT91SAM9260_BASE_MCI,
301                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
302                 .flags  = IORESOURCE_MEM,
303         },
304         [1] = {
305                 .start  = AT91SAM9260_ID_MCI,
306                 .end    = AT91SAM9260_ID_MCI,
307                 .flags  = IORESOURCE_IRQ,
308         },
309 };
310
311 static struct platform_device at91sam9260_mmc_device = {
312         .name           = "atmel_mci",
313         .id             = -1,
314         .dev            = {
315                                 .dma_mask               = &mmc_dmamask,
316                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
317                                 .platform_data          = &mmc_data,
318         },
319         .resource       = mmc_resources,
320         .num_resources  = ARRAY_SIZE(mmc_resources),
321 };
322
323 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
324 {
325         unsigned int i;
326         unsigned int slot_count = 0;
327
328         if (!data)
329                 return;
330
331         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
332                 if (data->slot[i].bus_width) {
333                         /* input/irq */
334                         if (gpio_is_valid(data->slot[i].detect_pin)) {
335                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
336                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
337                         }
338                         if (gpio_is_valid(data->slot[i].wp_pin))
339                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
340
341                         switch (i) {
342                         case 0:
343                                 /* CMD */
344                                 at91_set_A_periph(AT91_PIN_PA7, 1);
345                                 /* DAT0, maybe DAT1..DAT3 */
346                                 at91_set_A_periph(AT91_PIN_PA6, 1);
347                                 if (data->slot[i].bus_width == 4) {
348                                         at91_set_A_periph(AT91_PIN_PA9, 1);
349                                         at91_set_A_periph(AT91_PIN_PA10, 1);
350                                         at91_set_A_periph(AT91_PIN_PA11, 1);
351                                 }
352                                 slot_count++;
353                                 break;
354                         case 1:
355                                 /* CMD */
356                                 at91_set_B_periph(AT91_PIN_PA1, 1);
357                                 /* DAT0, maybe DAT1..DAT3 */
358                                 at91_set_B_periph(AT91_PIN_PA0, 1);
359                                 if (data->slot[i].bus_width == 4) {
360                                         at91_set_B_periph(AT91_PIN_PA5, 1);
361                                         at91_set_B_periph(AT91_PIN_PA4, 1);
362                                         at91_set_B_periph(AT91_PIN_PA3, 1);
363                                 }
364                                 slot_count++;
365                                 break;
366                         default:
367                                 printk(KERN_ERR
368                                         "AT91: SD/MMC slot %d not available\n", i);
369                                 break;
370                         }
371                 }
372         }
373
374         if (slot_count) {
375                 /* CLK */
376                 at91_set_A_periph(AT91_PIN_PA8, 0);
377
378                 mmc_data = *data;
379                 platform_device_register(&at91sam9260_mmc_device);
380         }
381 }
382 #else
383 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
384 #endif
385
386
387 /* --------------------------------------------------------------------
388  *  NAND / SmartMedia
389  * -------------------------------------------------------------------- */
390
391 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
392 static struct atmel_nand_data nand_data;
393
394 #define NAND_BASE       AT91_CHIPSELECT_3
395
396 static struct resource nand_resources[] = {
397         [0] = {
398                 .start  = NAND_BASE,
399                 .end    = NAND_BASE + SZ_256M - 1,
400                 .flags  = IORESOURCE_MEM,
401         },
402         [1] = {
403                 .start  = AT91SAM9260_BASE_ECC,
404                 .end    = AT91SAM9260_BASE_ECC + SZ_512 - 1,
405                 .flags  = IORESOURCE_MEM,
406         }
407 };
408
409 static struct platform_device at91sam9260_nand_device = {
410         .name           = "atmel_nand",
411         .id             = -1,
412         .dev            = {
413                                 .platform_data  = &nand_data,
414         },
415         .resource       = nand_resources,
416         .num_resources  = ARRAY_SIZE(nand_resources),
417 };
418
419 void __init at91_add_device_nand(struct atmel_nand_data *data)
420 {
421         unsigned long csa;
422
423         if (!data)
424                 return;
425
426         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
427         at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
428
429         /* enable pin */
430         if (gpio_is_valid(data->enable_pin))
431                 at91_set_gpio_output(data->enable_pin, 1);
432
433         /* ready/busy pin */
434         if (gpio_is_valid(data->rdy_pin))
435                 at91_set_gpio_input(data->rdy_pin, 1);
436
437         /* card detect pin */
438         if (gpio_is_valid(data->det_pin))
439                 at91_set_gpio_input(data->det_pin, 1);
440
441         nand_data = *data;
442         platform_device_register(&at91sam9260_nand_device);
443 }
444 #else
445 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
446 #endif
447
448
449 /* --------------------------------------------------------------------
450  *  TWI (i2c)
451  * -------------------------------------------------------------------- */
452
453 /*
454  * Prefer the GPIO code since the TWI controller isn't robust
455  * (gets overruns and underruns under load) and can only issue
456  * repeated STARTs in one scenario (the driver doesn't yet handle them).
457  */
458
459 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
460
461 static struct i2c_gpio_platform_data pdata = {
462         .sda_pin                = AT91_PIN_PA23,
463         .sda_is_open_drain      = 1,
464         .scl_pin                = AT91_PIN_PA24,
465         .scl_is_open_drain      = 1,
466         .udelay                 = 2,            /* ~100 kHz */
467 };
468
469 static struct platform_device at91sam9260_twi_device = {
470         .name                   = "i2c-gpio",
471         .id                     = -1,
472         .dev.platform_data      = &pdata,
473 };
474
475 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
476 {
477         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
478         at91_set_multi_drive(AT91_PIN_PA23, 1);
479
480         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
481         at91_set_multi_drive(AT91_PIN_PA24, 1);
482
483         i2c_register_board_info(0, devices, nr_devices);
484         platform_device_register(&at91sam9260_twi_device);
485 }
486
487 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
488
489 static struct resource twi_resources[] = {
490         [0] = {
491                 .start  = AT91SAM9260_BASE_TWI,
492                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
493                 .flags  = IORESOURCE_MEM,
494         },
495         [1] = {
496                 .start  = AT91SAM9260_ID_TWI,
497                 .end    = AT91SAM9260_ID_TWI,
498                 .flags  = IORESOURCE_IRQ,
499         },
500 };
501
502 static struct platform_device at91sam9260_twi_device = {
503         .name           = "at91_i2c",
504         .id             = -1,
505         .resource       = twi_resources,
506         .num_resources  = ARRAY_SIZE(twi_resources),
507 };
508
509 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
510 {
511         /* pins used for TWI interface */
512         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
513         at91_set_multi_drive(AT91_PIN_PA23, 1);
514
515         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
516         at91_set_multi_drive(AT91_PIN_PA24, 1);
517
518         i2c_register_board_info(0, devices, nr_devices);
519         platform_device_register(&at91sam9260_twi_device);
520 }
521 #else
522 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
523 #endif
524
525
526 /* --------------------------------------------------------------------
527  *  SPI
528  * -------------------------------------------------------------------- */
529
530 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
531 static u64 spi_dmamask = DMA_BIT_MASK(32);
532
533 static struct resource spi0_resources[] = {
534         [0] = {
535                 .start  = AT91SAM9260_BASE_SPI0,
536                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
537                 .flags  = IORESOURCE_MEM,
538         },
539         [1] = {
540                 .start  = AT91SAM9260_ID_SPI0,
541                 .end    = AT91SAM9260_ID_SPI0,
542                 .flags  = IORESOURCE_IRQ,
543         },
544 };
545
546 static struct platform_device at91sam9260_spi0_device = {
547         .name           = "atmel_spi",
548         .id             = 0,
549         .dev            = {
550                                 .dma_mask               = &spi_dmamask,
551                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
552         },
553         .resource       = spi0_resources,
554         .num_resources  = ARRAY_SIZE(spi0_resources),
555 };
556
557 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
558
559 static struct resource spi1_resources[] = {
560         [0] = {
561                 .start  = AT91SAM9260_BASE_SPI1,
562                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
563                 .flags  = IORESOURCE_MEM,
564         },
565         [1] = {
566                 .start  = AT91SAM9260_ID_SPI1,
567                 .end    = AT91SAM9260_ID_SPI1,
568                 .flags  = IORESOURCE_IRQ,
569         },
570 };
571
572 static struct platform_device at91sam9260_spi1_device = {
573         .name           = "atmel_spi",
574         .id             = 1,
575         .dev            = {
576                                 .dma_mask               = &spi_dmamask,
577                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
578         },
579         .resource       = spi1_resources,
580         .num_resources  = ARRAY_SIZE(spi1_resources),
581 };
582
583 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
584
585 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
586 {
587         int i;
588         unsigned long cs_pin;
589         short enable_spi0 = 0;
590         short enable_spi1 = 0;
591
592         /* Choose SPI chip-selects */
593         for (i = 0; i < nr_devices; i++) {
594                 if (devices[i].controller_data)
595                         cs_pin = (unsigned long) devices[i].controller_data;
596                 else if (devices[i].bus_num == 0)
597                         cs_pin = spi0_standard_cs[devices[i].chip_select];
598                 else
599                         cs_pin = spi1_standard_cs[devices[i].chip_select];
600
601                 if (devices[i].bus_num == 0)
602                         enable_spi0 = 1;
603                 else
604                         enable_spi1 = 1;
605
606                 /* enable chip-select pin */
607                 at91_set_gpio_output(cs_pin, 1);
608
609                 /* pass chip-select pin to driver */
610                 devices[i].controller_data = (void *) cs_pin;
611         }
612
613         spi_register_board_info(devices, nr_devices);
614
615         /* Configure SPI bus(es) */
616         if (enable_spi0) {
617                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
618                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
619                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
620
621                 platform_device_register(&at91sam9260_spi0_device);
622         }
623         if (enable_spi1) {
624                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
625                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
626                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
627
628                 platform_device_register(&at91sam9260_spi1_device);
629         }
630 }
631 #else
632 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
633 #endif
634
635
636 /* --------------------------------------------------------------------
637  *  Timer/Counter blocks
638  * -------------------------------------------------------------------- */
639
640 #ifdef CONFIG_ATMEL_TCLIB
641
642 static struct resource tcb0_resources[] = {
643         [0] = {
644                 .start  = AT91SAM9260_BASE_TCB0,
645                 .end    = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
646                 .flags  = IORESOURCE_MEM,
647         },
648         [1] = {
649                 .start  = AT91SAM9260_ID_TC0,
650                 .end    = AT91SAM9260_ID_TC0,
651                 .flags  = IORESOURCE_IRQ,
652         },
653         [2] = {
654                 .start  = AT91SAM9260_ID_TC1,
655                 .end    = AT91SAM9260_ID_TC1,
656                 .flags  = IORESOURCE_IRQ,
657         },
658         [3] = {
659                 .start  = AT91SAM9260_ID_TC2,
660                 .end    = AT91SAM9260_ID_TC2,
661                 .flags  = IORESOURCE_IRQ,
662         },
663 };
664
665 static struct platform_device at91sam9260_tcb0_device = {
666         .name           = "atmel_tcb",
667         .id             = 0,
668         .resource       = tcb0_resources,
669         .num_resources  = ARRAY_SIZE(tcb0_resources),
670 };
671
672 static struct resource tcb1_resources[] = {
673         [0] = {
674                 .start  = AT91SAM9260_BASE_TCB1,
675                 .end    = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
676                 .flags  = IORESOURCE_MEM,
677         },
678         [1] = {
679                 .start  = AT91SAM9260_ID_TC3,
680                 .end    = AT91SAM9260_ID_TC3,
681                 .flags  = IORESOURCE_IRQ,
682         },
683         [2] = {
684                 .start  = AT91SAM9260_ID_TC4,
685                 .end    = AT91SAM9260_ID_TC4,
686                 .flags  = IORESOURCE_IRQ,
687         },
688         [3] = {
689                 .start  = AT91SAM9260_ID_TC5,
690                 .end    = AT91SAM9260_ID_TC5,
691                 .flags  = IORESOURCE_IRQ,
692         },
693 };
694
695 static struct platform_device at91sam9260_tcb1_device = {
696         .name           = "atmel_tcb",
697         .id             = 1,
698         .resource       = tcb1_resources,
699         .num_resources  = ARRAY_SIZE(tcb1_resources),
700 };
701
702 static void __init at91_add_device_tc(void)
703 {
704         platform_device_register(&at91sam9260_tcb0_device);
705         platform_device_register(&at91sam9260_tcb1_device);
706 }
707 #else
708 static void __init at91_add_device_tc(void) { }
709 #endif
710
711
712 /* --------------------------------------------------------------------
713  *  RTT
714  * -------------------------------------------------------------------- */
715
716 static struct resource rtt_resources[] = {
717         {
718                 .start  = AT91SAM9260_BASE_RTT,
719                 .end    = AT91SAM9260_BASE_RTT + SZ_16 - 1,
720                 .flags  = IORESOURCE_MEM,
721         }
722 };
723
724 static struct platform_device at91sam9260_rtt_device = {
725         .name           = "at91_rtt",
726         .id             = 0,
727         .resource       = rtt_resources,
728         .num_resources  = ARRAY_SIZE(rtt_resources),
729 };
730
731 static void __init at91_add_device_rtt(void)
732 {
733         platform_device_register(&at91sam9260_rtt_device);
734 }
735
736
737 /* --------------------------------------------------------------------
738  *  Watchdog
739  * -------------------------------------------------------------------- */
740
741 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
742 static struct resource wdt_resources[] = {
743         {
744                 .start  = AT91SAM9260_BASE_WDT,
745                 .end    = AT91SAM9260_BASE_WDT + SZ_16 - 1,
746                 .flags  = IORESOURCE_MEM,
747         }
748 };
749
750 static struct platform_device at91sam9260_wdt_device = {
751         .name           = "at91_wdt",
752         .id             = -1,
753         .resource       = wdt_resources,
754         .num_resources  = ARRAY_SIZE(wdt_resources),
755 };
756
757 static void __init at91_add_device_watchdog(void)
758 {
759         platform_device_register(&at91sam9260_wdt_device);
760 }
761 #else
762 static void __init at91_add_device_watchdog(void) {}
763 #endif
764
765
766 /* --------------------------------------------------------------------
767  *  SSC -- Synchronous Serial Controller
768  * -------------------------------------------------------------------- */
769
770 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
771 static u64 ssc_dmamask = DMA_BIT_MASK(32);
772
773 static struct resource ssc_resources[] = {
774         [0] = {
775                 .start  = AT91SAM9260_BASE_SSC,
776                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
777                 .flags  = IORESOURCE_MEM,
778         },
779         [1] = {
780                 .start  = AT91SAM9260_ID_SSC,
781                 .end    = AT91SAM9260_ID_SSC,
782                 .flags  = IORESOURCE_IRQ,
783         },
784 };
785
786 static struct platform_device at91sam9260_ssc_device = {
787         .name   = "ssc",
788         .id     = 0,
789         .dev    = {
790                 .dma_mask               = &ssc_dmamask,
791                 .coherent_dma_mask      = DMA_BIT_MASK(32),
792         },
793         .resource       = ssc_resources,
794         .num_resources  = ARRAY_SIZE(ssc_resources),
795 };
796
797 static inline void configure_ssc_pins(unsigned pins)
798 {
799         if (pins & ATMEL_SSC_TF)
800                 at91_set_A_periph(AT91_PIN_PB17, 1);
801         if (pins & ATMEL_SSC_TK)
802                 at91_set_A_periph(AT91_PIN_PB16, 1);
803         if (pins & ATMEL_SSC_TD)
804                 at91_set_A_periph(AT91_PIN_PB18, 1);
805         if (pins & ATMEL_SSC_RD)
806                 at91_set_A_periph(AT91_PIN_PB19, 1);
807         if (pins & ATMEL_SSC_RK)
808                 at91_set_A_periph(AT91_PIN_PB20, 1);
809         if (pins & ATMEL_SSC_RF)
810                 at91_set_A_periph(AT91_PIN_PB21, 1);
811 }
812
813 /*
814  * SSC controllers are accessed through library code, instead of any
815  * kind of all-singing/all-dancing driver.  For example one could be
816  * used by a particular I2S audio codec's driver, while another one
817  * on the same system might be used by a custom data capture driver.
818  */
819 void __init at91_add_device_ssc(unsigned id, unsigned pins)
820 {
821         struct platform_device *pdev;
822
823         /*
824          * NOTE: caller is responsible for passing information matching
825          * "pins" to whatever will be using each particular controller.
826          */
827         switch (id) {
828         case AT91SAM9260_ID_SSC:
829                 pdev = &at91sam9260_ssc_device;
830                 configure_ssc_pins(pins);
831                 break;
832         default:
833                 return;
834         }
835
836         platform_device_register(pdev);
837 }
838
839 #else
840 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
841 #endif
842
843
844 /* --------------------------------------------------------------------
845  *  UART
846  * -------------------------------------------------------------------- */
847 #if defined(CONFIG_SERIAL_ATMEL)
848 static struct resource dbgu_resources[] = {
849         [0] = {
850                 .start  = AT91SAM9260_BASE_DBGU,
851                 .end    = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
852                 .flags  = IORESOURCE_MEM,
853         },
854         [1] = {
855                 .start  = AT91_ID_SYS,
856                 .end    = AT91_ID_SYS,
857                 .flags  = IORESOURCE_IRQ,
858         },
859 };
860
861 static struct atmel_uart_data dbgu_data = {
862         .use_dma_tx     = 0,
863         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
864 };
865
866 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
867
868 static struct platform_device at91sam9260_dbgu_device = {
869         .name           = "atmel_usart",
870         .id             = 0,
871         .dev            = {
872                                 .dma_mask               = &dbgu_dmamask,
873                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
874                                 .platform_data          = &dbgu_data,
875         },
876         .resource       = dbgu_resources,
877         .num_resources  = ARRAY_SIZE(dbgu_resources),
878 };
879
880 static inline void configure_dbgu_pins(void)
881 {
882         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
883         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
884 }
885
886 static struct resource uart0_resources[] = {
887         [0] = {
888                 .start  = AT91SAM9260_BASE_US0,
889                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
890                 .flags  = IORESOURCE_MEM,
891         },
892         [1] = {
893                 .start  = AT91SAM9260_ID_US0,
894                 .end    = AT91SAM9260_ID_US0,
895                 .flags  = IORESOURCE_IRQ,
896         },
897 };
898
899 static struct atmel_uart_data uart0_data = {
900         .use_dma_tx     = 1,
901         .use_dma_rx     = 1,
902 };
903
904 static u64 uart0_dmamask = DMA_BIT_MASK(32);
905
906 static struct platform_device at91sam9260_uart0_device = {
907         .name           = "atmel_usart",
908         .id             = 1,
909         .dev            = {
910                                 .dma_mask               = &uart0_dmamask,
911                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
912                                 .platform_data          = &uart0_data,
913         },
914         .resource       = uart0_resources,
915         .num_resources  = ARRAY_SIZE(uart0_resources),
916 };
917
918 static inline void configure_usart0_pins(unsigned pins)
919 {
920         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
921         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
922
923         if (pins & ATMEL_UART_RTS)
924                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
925         if (pins & ATMEL_UART_CTS)
926                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
927         if (pins & ATMEL_UART_DTR)
928                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
929         if (pins & ATMEL_UART_DSR)
930                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
931         if (pins & ATMEL_UART_DCD)
932                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
933         if (pins & ATMEL_UART_RI)
934                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
935 }
936
937 static struct resource uart1_resources[] = {
938         [0] = {
939                 .start  = AT91SAM9260_BASE_US1,
940                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
941                 .flags  = IORESOURCE_MEM,
942         },
943         [1] = {
944                 .start  = AT91SAM9260_ID_US1,
945                 .end    = AT91SAM9260_ID_US1,
946                 .flags  = IORESOURCE_IRQ,
947         },
948 };
949
950 static struct atmel_uart_data uart1_data = {
951         .use_dma_tx     = 1,
952         .use_dma_rx     = 1,
953 };
954
955 static u64 uart1_dmamask = DMA_BIT_MASK(32);
956
957 static struct platform_device at91sam9260_uart1_device = {
958         .name           = "atmel_usart",
959         .id             = 2,
960         .dev            = {
961                                 .dma_mask               = &uart1_dmamask,
962                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
963                                 .platform_data          = &uart1_data,
964         },
965         .resource       = uart1_resources,
966         .num_resources  = ARRAY_SIZE(uart1_resources),
967 };
968
969 static inline void configure_usart1_pins(unsigned pins)
970 {
971         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
972         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
973
974         if (pins & ATMEL_UART_RTS)
975                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
976         if (pins & ATMEL_UART_CTS)
977                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
978 }
979
980 static struct resource uart2_resources[] = {
981         [0] = {
982                 .start  = AT91SAM9260_BASE_US2,
983                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
984                 .flags  = IORESOURCE_MEM,
985         },
986         [1] = {
987                 .start  = AT91SAM9260_ID_US2,
988                 .end    = AT91SAM9260_ID_US2,
989                 .flags  = IORESOURCE_IRQ,
990         },
991 };
992
993 static struct atmel_uart_data uart2_data = {
994         .use_dma_tx     = 1,
995         .use_dma_rx     = 1,
996 };
997
998 static u64 uart2_dmamask = DMA_BIT_MASK(32);
999
1000 static struct platform_device at91sam9260_uart2_device = {
1001         .name           = "atmel_usart",
1002         .id             = 3,
1003         .dev            = {
1004                                 .dma_mask               = &uart2_dmamask,
1005                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1006                                 .platform_data          = &uart2_data,
1007         },
1008         .resource       = uart2_resources,
1009         .num_resources  = ARRAY_SIZE(uart2_resources),
1010 };
1011
1012 static inline void configure_usart2_pins(unsigned pins)
1013 {
1014         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
1015         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
1016
1017         if (pins & ATMEL_UART_RTS)
1018                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
1019         if (pins & ATMEL_UART_CTS)
1020                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
1021 }
1022
1023 static struct resource uart3_resources[] = {
1024         [0] = {
1025                 .start  = AT91SAM9260_BASE_US3,
1026                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1027                 .flags  = IORESOURCE_MEM,
1028         },
1029         [1] = {
1030                 .start  = AT91SAM9260_ID_US3,
1031                 .end    = AT91SAM9260_ID_US3,
1032                 .flags  = IORESOURCE_IRQ,
1033         },
1034 };
1035
1036 static struct atmel_uart_data uart3_data = {
1037         .use_dma_tx     = 1,
1038         .use_dma_rx     = 1,
1039 };
1040
1041 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1042
1043 static struct platform_device at91sam9260_uart3_device = {
1044         .name           = "atmel_usart",
1045         .id             = 4,
1046         .dev            = {
1047                                 .dma_mask               = &uart3_dmamask,
1048                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1049                                 .platform_data          = &uart3_data,
1050         },
1051         .resource       = uart3_resources,
1052         .num_resources  = ARRAY_SIZE(uart3_resources),
1053 };
1054
1055 static inline void configure_usart3_pins(unsigned pins)
1056 {
1057         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
1058         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
1059
1060         if (pins & ATMEL_UART_RTS)
1061                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
1062         if (pins & ATMEL_UART_CTS)
1063                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
1064 }
1065
1066 static struct resource uart4_resources[] = {
1067         [0] = {
1068                 .start  = AT91SAM9260_BASE_US4,
1069                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1070                 .flags  = IORESOURCE_MEM,
1071         },
1072         [1] = {
1073                 .start  = AT91SAM9260_ID_US4,
1074                 .end    = AT91SAM9260_ID_US4,
1075                 .flags  = IORESOURCE_IRQ,
1076         },
1077 };
1078
1079 static struct atmel_uart_data uart4_data = {
1080         .use_dma_tx     = 1,
1081         .use_dma_rx     = 1,
1082 };
1083
1084 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1085
1086 static struct platform_device at91sam9260_uart4_device = {
1087         .name           = "atmel_usart",
1088         .id             = 5,
1089         .dev            = {
1090                                 .dma_mask               = &uart4_dmamask,
1091                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1092                                 .platform_data          = &uart4_data,
1093         },
1094         .resource       = uart4_resources,
1095         .num_resources  = ARRAY_SIZE(uart4_resources),
1096 };
1097
1098 static inline void configure_usart4_pins(void)
1099 {
1100         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1101         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1102 }
1103
1104 static struct resource uart5_resources[] = {
1105         [0] = {
1106                 .start  = AT91SAM9260_BASE_US5,
1107                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1108                 .flags  = IORESOURCE_MEM,
1109         },
1110         [1] = {
1111                 .start  = AT91SAM9260_ID_US5,
1112                 .end    = AT91SAM9260_ID_US5,
1113                 .flags  = IORESOURCE_IRQ,
1114         },
1115 };
1116
1117 static struct atmel_uart_data uart5_data = {
1118         .use_dma_tx     = 1,
1119         .use_dma_rx     = 1,
1120 };
1121
1122 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1123
1124 static struct platform_device at91sam9260_uart5_device = {
1125         .name           = "atmel_usart",
1126         .id             = 6,
1127         .dev            = {
1128                                 .dma_mask               = &uart5_dmamask,
1129                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1130                                 .platform_data          = &uart5_data,
1131         },
1132         .resource       = uart5_resources,
1133         .num_resources  = ARRAY_SIZE(uart5_resources),
1134 };
1135
1136 static inline void configure_usart5_pins(void)
1137 {
1138         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1139         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1140 }
1141
1142 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1143 struct platform_device *atmel_default_console_device;   /* the serial console device */
1144
1145 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1146 {
1147         struct platform_device *pdev;
1148         struct atmel_uart_data *pdata;
1149
1150         switch (id) {
1151                 case 0:         /* DBGU */
1152                         pdev = &at91sam9260_dbgu_device;
1153                         configure_dbgu_pins();
1154                         break;
1155                 case AT91SAM9260_ID_US0:
1156                         pdev = &at91sam9260_uart0_device;
1157                         configure_usart0_pins(pins);
1158                         break;
1159                 case AT91SAM9260_ID_US1:
1160                         pdev = &at91sam9260_uart1_device;
1161                         configure_usart1_pins(pins);
1162                         break;
1163                 case AT91SAM9260_ID_US2:
1164                         pdev = &at91sam9260_uart2_device;
1165                         configure_usart2_pins(pins);
1166                         break;
1167                 case AT91SAM9260_ID_US3:
1168                         pdev = &at91sam9260_uart3_device;
1169                         configure_usart3_pins(pins);
1170                         break;
1171                 case AT91SAM9260_ID_US4:
1172                         pdev = &at91sam9260_uart4_device;
1173                         configure_usart4_pins();
1174                         break;
1175                 case AT91SAM9260_ID_US5:
1176                         pdev = &at91sam9260_uart5_device;
1177                         configure_usart5_pins();
1178                         break;
1179                 default:
1180                         return;
1181         }
1182         pdata = pdev->dev.platform_data;
1183         pdata->num = portnr;            /* update to mapped ID */
1184
1185         if (portnr < ATMEL_MAX_UART)
1186                 at91_uarts[portnr] = pdev;
1187 }
1188
1189 void __init at91_set_serial_console(unsigned portnr)
1190 {
1191         if (portnr < ATMEL_MAX_UART) {
1192                 atmel_default_console_device = at91_uarts[portnr];
1193                 at91sam9260_set_console_clock(at91_uarts[portnr]->id);
1194         }
1195 }
1196
1197 void __init at91_add_device_serial(void)
1198 {
1199         int i;
1200
1201         for (i = 0; i < ATMEL_MAX_UART; i++) {
1202                 if (at91_uarts[i])
1203                         platform_device_register(at91_uarts[i]);
1204         }
1205
1206         if (!atmel_default_console_device)
1207                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1208 }
1209 #else
1210 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1211 void __init at91_set_serial_console(unsigned portnr) {}
1212 void __init at91_add_device_serial(void) {}
1213 #endif
1214
1215 /* --------------------------------------------------------------------
1216  *  CF/IDE
1217  * -------------------------------------------------------------------- */
1218
1219 #if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
1220         defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1221         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1222
1223 static struct at91_cf_data cf0_data;
1224
1225 static struct resource cf0_resources[] = {
1226         [0] = {
1227                 .start  = AT91_CHIPSELECT_4,
1228                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
1229                 .flags  = IORESOURCE_MEM,
1230         }
1231 };
1232
1233 static struct platform_device cf0_device = {
1234         .id             = 0,
1235         .dev            = {
1236                                 .platform_data  = &cf0_data,
1237         },
1238         .resource       = cf0_resources,
1239         .num_resources  = ARRAY_SIZE(cf0_resources),
1240 };
1241
1242 static struct at91_cf_data cf1_data;
1243
1244 static struct resource cf1_resources[] = {
1245         [0] = {
1246                 .start  = AT91_CHIPSELECT_5,
1247                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
1248                 .flags  = IORESOURCE_MEM,
1249         }
1250 };
1251
1252 static struct platform_device cf1_device = {
1253         .id             = 1,
1254         .dev            = {
1255                                 .platform_data  = &cf1_data,
1256         },
1257         .resource       = cf1_resources,
1258         .num_resources  = ARRAY_SIZE(cf1_resources),
1259 };
1260
1261 void __init at91_add_device_cf(struct at91_cf_data *data)
1262 {
1263         struct platform_device *pdev;
1264         unsigned long csa;
1265
1266         if (!data)
1267                 return;
1268
1269         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1270
1271         switch (data->chipselect) {
1272         case 4:
1273                 at91_set_multi_drive(AT91_PIN_PC8, 0);
1274                 at91_set_A_periph(AT91_PIN_PC8, 0);
1275                 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1276                 cf0_data = *data;
1277                 pdev = &cf0_device;
1278                 break;
1279         case 5:
1280                 at91_set_multi_drive(AT91_PIN_PC9, 0);
1281                 at91_set_A_periph(AT91_PIN_PC9, 0);
1282                 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1283                 cf1_data = *data;
1284                 pdev = &cf1_device;
1285                 break;
1286         default:
1287                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1288                        data->chipselect);
1289                 return;
1290         }
1291
1292         at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1293
1294         if (gpio_is_valid(data->rst_pin)) {
1295                 at91_set_multi_drive(data->rst_pin, 0);
1296                 at91_set_gpio_output(data->rst_pin, 1);
1297         }
1298
1299         if (gpio_is_valid(data->irq_pin)) {
1300                 at91_set_gpio_input(data->irq_pin, 0);
1301                 at91_set_deglitch(data->irq_pin, 1);
1302         }
1303
1304         if (gpio_is_valid(data->det_pin)) {
1305                 at91_set_gpio_input(data->det_pin, 0);
1306                 at91_set_deglitch(data->det_pin, 1);
1307         }
1308
1309         at91_set_B_periph(AT91_PIN_PC6, 0);     /* CFCE1 */
1310         at91_set_B_periph(AT91_PIN_PC7, 0);     /* CFCE2 */
1311         at91_set_A_periph(AT91_PIN_PC10, 0);    /* CFRNW */
1312         at91_set_A_periph(AT91_PIN_PC15, 1);    /* NWAIT */
1313
1314         if (data->flags & AT91_CF_TRUE_IDE)
1315 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1316                 pdev->name = "pata_at91";
1317 #elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
1318                 pdev->name = "at91_ide";
1319 #else
1320 #warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
1321 #endif
1322         else
1323                 pdev->name = "at91_cf";
1324
1325         platform_device_register(pdev);
1326 }
1327
1328 #else
1329 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1330 #endif
1331
1332 /* -------------------------------------------------------------------- */
1333 /*
1334  * These devices are always present and don't need any board-specific
1335  * setup.
1336  */
1337 static int __init at91_add_standard_devices(void)
1338 {
1339         at91_add_device_rtt();
1340         at91_add_device_watchdog();
1341         at91_add_device_tc();
1342         return 0;
1343 }
1344
1345 arch_initcall(at91_add_standard_devices);