2 * arch/arm/mach-at91/at91sam9260_devices.c
4 * Copyright (C) 2006 Atmel
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
20 #include <linux/platform_data/at91_adc.h>
23 #include <mach/at91sam9260.h>
24 #include <mach/at91sam9260_matrix.h>
25 #include <mach/at91_matrix.h>
26 #include <mach/at91sam9_smc.h>
27 #include <mach/at91_adc.h>
28 #include <mach/hardware.h>
34 /* --------------------------------------------------------------------
36 * -------------------------------------------------------------------- */
38 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
39 static u64 ohci_dmamask = DMA_BIT_MASK(32);
40 static struct at91_usbh_data usbh_data;
42 static struct resource usbh_resources[] = {
44 .start = AT91SAM9260_UHP_BASE,
45 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
46 .flags = IORESOURCE_MEM,
49 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
50 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
51 .flags = IORESOURCE_IRQ,
55 static struct platform_device at91_usbh_device = {
59 .dma_mask = &ohci_dmamask,
60 .coherent_dma_mask = DMA_BIT_MASK(32),
61 .platform_data = &usbh_data,
63 .resource = usbh_resources,
64 .num_resources = ARRAY_SIZE(usbh_resources),
67 void __init at91_add_device_usbh(struct at91_usbh_data *data)
74 /* Enable overcurrent notification */
75 for (i = 0; i < data->ports; i++) {
76 if (gpio_is_valid(data->overcurrent_pin[i]))
77 at91_set_gpio_input(data->overcurrent_pin[i], 1);
81 platform_device_register(&at91_usbh_device);
84 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
88 /* --------------------------------------------------------------------
90 * -------------------------------------------------------------------- */
92 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
93 static struct at91_udc_data udc_data;
95 static struct resource udc_resources[] = {
97 .start = AT91SAM9260_BASE_UDP,
98 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
99 .flags = IORESOURCE_MEM,
102 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
103 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
104 .flags = IORESOURCE_IRQ,
108 static struct platform_device at91_udc_device = {
112 .platform_data = &udc_data,
114 .resource = udc_resources,
115 .num_resources = ARRAY_SIZE(udc_resources),
118 void __init at91_add_device_udc(struct at91_udc_data *data)
123 if (gpio_is_valid(data->vbus_pin)) {
124 at91_set_gpio_input(data->vbus_pin, 0);
125 at91_set_deglitch(data->vbus_pin, 1);
128 /* Pullup pin is handled internally by USB device peripheral */
131 platform_device_register(&at91_udc_device);
134 void __init at91_add_device_udc(struct at91_udc_data *data) {}
138 /* --------------------------------------------------------------------
140 * -------------------------------------------------------------------- */
142 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
143 static u64 eth_dmamask = DMA_BIT_MASK(32);
144 static struct macb_platform_data eth_data;
146 static struct resource eth_resources[] = {
148 .start = AT91SAM9260_BASE_EMAC,
149 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
150 .flags = IORESOURCE_MEM,
153 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
154 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
155 .flags = IORESOURCE_IRQ,
159 static struct platform_device at91sam9260_eth_device = {
163 .dma_mask = ð_dmamask,
164 .coherent_dma_mask = DMA_BIT_MASK(32),
165 .platform_data = ð_data,
167 .resource = eth_resources,
168 .num_resources = ARRAY_SIZE(eth_resources),
171 void __init at91_add_device_eth(struct macb_platform_data *data)
176 if (gpio_is_valid(data->phy_irq_pin)) {
177 at91_set_gpio_input(data->phy_irq_pin, 0);
178 at91_set_deglitch(data->phy_irq_pin, 1);
181 /* Pins used for MII and RMII */
182 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
183 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
184 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
185 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
186 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
187 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
188 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
189 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
190 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
191 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
193 if (!data->is_rmii) {
194 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
195 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
196 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
197 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
198 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
199 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
200 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
201 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
205 platform_device_register(&at91sam9260_eth_device);
208 void __init at91_add_device_eth(struct macb_platform_data *data) {}
212 /* --------------------------------------------------------------------
213 * MMC / SD Slot for Atmel MCI Driver
214 * -------------------------------------------------------------------- */
216 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
217 static u64 mmc_dmamask = DMA_BIT_MASK(32);
218 static struct mci_platform_data mmc_data;
220 static struct resource mmc_resources[] = {
222 .start = AT91SAM9260_BASE_MCI,
223 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
224 .flags = IORESOURCE_MEM,
227 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
228 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
229 .flags = IORESOURCE_IRQ,
233 static struct platform_device at91sam9260_mmc_device = {
237 .dma_mask = &mmc_dmamask,
238 .coherent_dma_mask = DMA_BIT_MASK(32),
239 .platform_data = &mmc_data,
241 .resource = mmc_resources,
242 .num_resources = ARRAY_SIZE(mmc_resources),
245 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
248 unsigned int slot_count = 0;
253 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
254 if (data->slot[i].bus_width) {
256 if (gpio_is_valid(data->slot[i].detect_pin)) {
257 at91_set_gpio_input(data->slot[i].detect_pin, 1);
258 at91_set_deglitch(data->slot[i].detect_pin, 1);
260 if (gpio_is_valid(data->slot[i].wp_pin))
261 at91_set_gpio_input(data->slot[i].wp_pin, 1);
266 at91_set_A_periph(AT91_PIN_PA7, 1);
267 /* DAT0, maybe DAT1..DAT3 */
268 at91_set_A_periph(AT91_PIN_PA6, 1);
269 if (data->slot[i].bus_width == 4) {
270 at91_set_A_periph(AT91_PIN_PA9, 1);
271 at91_set_A_periph(AT91_PIN_PA10, 1);
272 at91_set_A_periph(AT91_PIN_PA11, 1);
278 at91_set_B_periph(AT91_PIN_PA1, 1);
279 /* DAT0, maybe DAT1..DAT3 */
280 at91_set_B_periph(AT91_PIN_PA0, 1);
281 if (data->slot[i].bus_width == 4) {
282 at91_set_B_periph(AT91_PIN_PA5, 1);
283 at91_set_B_periph(AT91_PIN_PA4, 1);
284 at91_set_B_periph(AT91_PIN_PA3, 1);
290 "AT91: SD/MMC slot %d not available\n", i);
298 at91_set_A_periph(AT91_PIN_PA8, 0);
301 platform_device_register(&at91sam9260_mmc_device);
305 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
309 /* --------------------------------------------------------------------
311 * -------------------------------------------------------------------- */
313 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
314 static struct atmel_nand_data nand_data;
316 #define NAND_BASE AT91_CHIPSELECT_3
318 static struct resource nand_resources[] = {
321 .end = NAND_BASE + SZ_256M - 1,
322 .flags = IORESOURCE_MEM,
325 .start = AT91SAM9260_BASE_ECC,
326 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
327 .flags = IORESOURCE_MEM,
331 static struct platform_device at91sam9260_nand_device = {
332 .name = "atmel_nand",
335 .platform_data = &nand_data,
337 .resource = nand_resources,
338 .num_resources = ARRAY_SIZE(nand_resources),
341 void __init at91_add_device_nand(struct atmel_nand_data *data)
348 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
349 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
352 if (gpio_is_valid(data->enable_pin))
353 at91_set_gpio_output(data->enable_pin, 1);
356 if (gpio_is_valid(data->rdy_pin))
357 at91_set_gpio_input(data->rdy_pin, 1);
359 /* card detect pin */
360 if (gpio_is_valid(data->det_pin))
361 at91_set_gpio_input(data->det_pin, 1);
364 platform_device_register(&at91sam9260_nand_device);
367 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
371 /* --------------------------------------------------------------------
373 * -------------------------------------------------------------------- */
376 * Prefer the GPIO code since the TWI controller isn't robust
377 * (gets overruns and underruns under load) and can only issue
378 * repeated STARTs in one scenario (the driver doesn't yet handle them).
381 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
383 static struct i2c_gpio_platform_data pdata = {
384 .sda_pin = AT91_PIN_PA23,
385 .sda_is_open_drain = 1,
386 .scl_pin = AT91_PIN_PA24,
387 .scl_is_open_drain = 1,
388 .udelay = 2, /* ~100 kHz */
391 static struct platform_device at91sam9260_twi_device = {
394 .dev.platform_data = &pdata,
397 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
399 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
400 at91_set_multi_drive(AT91_PIN_PA23, 1);
402 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
403 at91_set_multi_drive(AT91_PIN_PA24, 1);
405 i2c_register_board_info(0, devices, nr_devices);
406 platform_device_register(&at91sam9260_twi_device);
409 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
411 static struct resource twi_resources[] = {
413 .start = AT91SAM9260_BASE_TWI,
414 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
415 .flags = IORESOURCE_MEM,
418 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
419 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
420 .flags = IORESOURCE_IRQ,
424 static struct platform_device at91sam9260_twi_device = {
426 .resource = twi_resources,
427 .num_resources = ARRAY_SIZE(twi_resources),
430 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
432 /* IP version is not the same on 9260 and g20 */
433 if (cpu_is_at91sam9g20()) {
434 at91sam9260_twi_device.name = "i2c-at91sam9g20";
436 at91sam9260_twi_device.name = "i2c-at91sam9260";
439 /* pins used for TWI interface */
440 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
441 at91_set_multi_drive(AT91_PIN_PA23, 1);
443 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
444 at91_set_multi_drive(AT91_PIN_PA24, 1);
446 i2c_register_board_info(0, devices, nr_devices);
447 platform_device_register(&at91sam9260_twi_device);
450 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
454 /* --------------------------------------------------------------------
456 * -------------------------------------------------------------------- */
458 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
459 static u64 spi_dmamask = DMA_BIT_MASK(32);
461 static struct resource spi0_resources[] = {
463 .start = AT91SAM9260_BASE_SPI0,
464 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
465 .flags = IORESOURCE_MEM,
468 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
469 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
470 .flags = IORESOURCE_IRQ,
474 static struct platform_device at91sam9260_spi0_device = {
478 .dma_mask = &spi_dmamask,
479 .coherent_dma_mask = DMA_BIT_MASK(32),
481 .resource = spi0_resources,
482 .num_resources = ARRAY_SIZE(spi0_resources),
485 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
487 static struct resource spi1_resources[] = {
489 .start = AT91SAM9260_BASE_SPI1,
490 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
491 .flags = IORESOURCE_MEM,
494 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
495 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
496 .flags = IORESOURCE_IRQ,
500 static struct platform_device at91sam9260_spi1_device = {
504 .dma_mask = &spi_dmamask,
505 .coherent_dma_mask = DMA_BIT_MASK(32),
507 .resource = spi1_resources,
508 .num_resources = ARRAY_SIZE(spi1_resources),
511 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
513 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
516 unsigned long cs_pin;
517 short enable_spi0 = 0;
518 short enable_spi1 = 0;
520 /* Choose SPI chip-selects */
521 for (i = 0; i < nr_devices; i++) {
522 if (devices[i].controller_data)
523 cs_pin = (unsigned long) devices[i].controller_data;
524 else if (devices[i].bus_num == 0)
525 cs_pin = spi0_standard_cs[devices[i].chip_select];
527 cs_pin = spi1_standard_cs[devices[i].chip_select];
529 if (!gpio_is_valid(cs_pin))
532 if (devices[i].bus_num == 0)
537 /* enable chip-select pin */
538 at91_set_gpio_output(cs_pin, 1);
540 /* pass chip-select pin to driver */
541 devices[i].controller_data = (void *) cs_pin;
544 spi_register_board_info(devices, nr_devices);
546 /* Configure SPI bus(es) */
548 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
549 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
550 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
552 platform_device_register(&at91sam9260_spi0_device);
555 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
556 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
557 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
559 platform_device_register(&at91sam9260_spi1_device);
563 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
567 /* --------------------------------------------------------------------
568 * Timer/Counter blocks
569 * -------------------------------------------------------------------- */
571 #ifdef CONFIG_ATMEL_TCLIB
573 static struct resource tcb0_resources[] = {
575 .start = AT91SAM9260_BASE_TCB0,
576 .end = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
577 .flags = IORESOURCE_MEM,
580 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
581 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
582 .flags = IORESOURCE_IRQ,
585 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
586 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
587 .flags = IORESOURCE_IRQ,
590 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
591 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
592 .flags = IORESOURCE_IRQ,
596 static struct platform_device at91sam9260_tcb0_device = {
599 .resource = tcb0_resources,
600 .num_resources = ARRAY_SIZE(tcb0_resources),
603 static struct resource tcb1_resources[] = {
605 .start = AT91SAM9260_BASE_TCB1,
606 .end = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
607 .flags = IORESOURCE_MEM,
610 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
611 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
612 .flags = IORESOURCE_IRQ,
615 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
616 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
617 .flags = IORESOURCE_IRQ,
620 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
621 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
622 .flags = IORESOURCE_IRQ,
626 static struct platform_device at91sam9260_tcb1_device = {
629 .resource = tcb1_resources,
630 .num_resources = ARRAY_SIZE(tcb1_resources),
633 static void __init at91_add_device_tc(void)
635 platform_device_register(&at91sam9260_tcb0_device);
636 platform_device_register(&at91sam9260_tcb1_device);
639 static void __init at91_add_device_tc(void) { }
643 /* --------------------------------------------------------------------
645 * -------------------------------------------------------------------- */
647 static struct resource rtt_resources[] = {
649 .start = AT91SAM9260_BASE_RTT,
650 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
651 .flags = IORESOURCE_MEM,
653 .flags = IORESOURCE_MEM,
655 .flags = IORESOURCE_IRQ,
659 static struct platform_device at91sam9260_rtt_device = {
662 .resource = rtt_resources,
666 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
667 static void __init at91_add_device_rtt_rtc(void)
669 at91sam9260_rtt_device.name = "rtc-at91sam9";
671 * The second resource is needed:
672 * GPBR will serve as the storage for RTC time offset
674 at91sam9260_rtt_device.num_resources = 3;
675 rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
676 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
677 rtt_resources[1].end = rtt_resources[1].start + 3;
678 rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
679 rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
682 static void __init at91_add_device_rtt_rtc(void)
684 /* Only one resource is needed: RTT not used as RTC */
685 at91sam9260_rtt_device.num_resources = 1;
689 static void __init at91_add_device_rtt(void)
691 at91_add_device_rtt_rtc();
692 platform_device_register(&at91sam9260_rtt_device);
696 /* --------------------------------------------------------------------
698 * -------------------------------------------------------------------- */
700 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
701 static struct resource wdt_resources[] = {
703 .start = AT91SAM9260_BASE_WDT,
704 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
705 .flags = IORESOURCE_MEM,
709 static struct platform_device at91sam9260_wdt_device = {
712 .resource = wdt_resources,
713 .num_resources = ARRAY_SIZE(wdt_resources),
716 static void __init at91_add_device_watchdog(void)
718 platform_device_register(&at91sam9260_wdt_device);
721 static void __init at91_add_device_watchdog(void) {}
725 /* --------------------------------------------------------------------
726 * SSC -- Synchronous Serial Controller
727 * -------------------------------------------------------------------- */
729 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
730 static u64 ssc_dmamask = DMA_BIT_MASK(32);
732 static struct resource ssc_resources[] = {
734 .start = AT91SAM9260_BASE_SSC,
735 .end = AT91SAM9260_BASE_SSC + SZ_16K - 1,
736 .flags = IORESOURCE_MEM,
739 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
740 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
741 .flags = IORESOURCE_IRQ,
745 static struct platform_device at91sam9260_ssc_device = {
746 .name = "at91rm9200_ssc",
749 .dma_mask = &ssc_dmamask,
750 .coherent_dma_mask = DMA_BIT_MASK(32),
752 .resource = ssc_resources,
753 .num_resources = ARRAY_SIZE(ssc_resources),
756 static inline void configure_ssc_pins(unsigned pins)
758 if (pins & ATMEL_SSC_TF)
759 at91_set_A_periph(AT91_PIN_PB17, 1);
760 if (pins & ATMEL_SSC_TK)
761 at91_set_A_periph(AT91_PIN_PB16, 1);
762 if (pins & ATMEL_SSC_TD)
763 at91_set_A_periph(AT91_PIN_PB18, 1);
764 if (pins & ATMEL_SSC_RD)
765 at91_set_A_periph(AT91_PIN_PB19, 1);
766 if (pins & ATMEL_SSC_RK)
767 at91_set_A_periph(AT91_PIN_PB20, 1);
768 if (pins & ATMEL_SSC_RF)
769 at91_set_A_periph(AT91_PIN_PB21, 1);
773 * SSC controllers are accessed through library code, instead of any
774 * kind of all-singing/all-dancing driver. For example one could be
775 * used by a particular I2S audio codec's driver, while another one
776 * on the same system might be used by a custom data capture driver.
778 void __init at91_add_device_ssc(unsigned id, unsigned pins)
780 struct platform_device *pdev;
783 * NOTE: caller is responsible for passing information matching
784 * "pins" to whatever will be using each particular controller.
787 case AT91SAM9260_ID_SSC:
788 pdev = &at91sam9260_ssc_device;
789 configure_ssc_pins(pins);
795 platform_device_register(pdev);
799 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
803 /* --------------------------------------------------------------------
805 * -------------------------------------------------------------------- */
806 #if defined(CONFIG_SERIAL_ATMEL)
807 static struct resource dbgu_resources[] = {
809 .start = AT91SAM9260_BASE_DBGU,
810 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
811 .flags = IORESOURCE_MEM,
814 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
815 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
816 .flags = IORESOURCE_IRQ,
820 static struct atmel_uart_data dbgu_data = {
822 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
826 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
828 static struct platform_device at91sam9260_dbgu_device = {
829 .name = "atmel_usart",
832 .dma_mask = &dbgu_dmamask,
833 .coherent_dma_mask = DMA_BIT_MASK(32),
834 .platform_data = &dbgu_data,
836 .resource = dbgu_resources,
837 .num_resources = ARRAY_SIZE(dbgu_resources),
840 static inline void configure_dbgu_pins(void)
842 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
843 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
846 static struct resource uart0_resources[] = {
848 .start = AT91SAM9260_BASE_US0,
849 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
850 .flags = IORESOURCE_MEM,
853 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
854 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
855 .flags = IORESOURCE_IRQ,
859 static struct atmel_uart_data uart0_data = {
865 static u64 uart0_dmamask = DMA_BIT_MASK(32);
867 static struct platform_device at91sam9260_uart0_device = {
868 .name = "atmel_usart",
871 .dma_mask = &uart0_dmamask,
872 .coherent_dma_mask = DMA_BIT_MASK(32),
873 .platform_data = &uart0_data,
875 .resource = uart0_resources,
876 .num_resources = ARRAY_SIZE(uart0_resources),
879 static inline void configure_usart0_pins(unsigned pins)
881 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
882 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
884 if (pins & ATMEL_UART_RTS)
885 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
886 if (pins & ATMEL_UART_CTS)
887 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
888 if (pins & ATMEL_UART_DTR)
889 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
890 if (pins & ATMEL_UART_DSR)
891 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
892 if (pins & ATMEL_UART_DCD)
893 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
894 if (pins & ATMEL_UART_RI)
895 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
898 static struct resource uart1_resources[] = {
900 .start = AT91SAM9260_BASE_US1,
901 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
902 .flags = IORESOURCE_MEM,
905 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
906 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
907 .flags = IORESOURCE_IRQ,
911 static struct atmel_uart_data uart1_data = {
917 static u64 uart1_dmamask = DMA_BIT_MASK(32);
919 static struct platform_device at91sam9260_uart1_device = {
920 .name = "atmel_usart",
923 .dma_mask = &uart1_dmamask,
924 .coherent_dma_mask = DMA_BIT_MASK(32),
925 .platform_data = &uart1_data,
927 .resource = uart1_resources,
928 .num_resources = ARRAY_SIZE(uart1_resources),
931 static inline void configure_usart1_pins(unsigned pins)
933 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
934 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
936 if (pins & ATMEL_UART_RTS)
937 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
938 if (pins & ATMEL_UART_CTS)
939 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
942 static struct resource uart2_resources[] = {
944 .start = AT91SAM9260_BASE_US2,
945 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
946 .flags = IORESOURCE_MEM,
949 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
950 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
951 .flags = IORESOURCE_IRQ,
955 static struct atmel_uart_data uart2_data = {
961 static u64 uart2_dmamask = DMA_BIT_MASK(32);
963 static struct platform_device at91sam9260_uart2_device = {
964 .name = "atmel_usart",
967 .dma_mask = &uart2_dmamask,
968 .coherent_dma_mask = DMA_BIT_MASK(32),
969 .platform_data = &uart2_data,
971 .resource = uart2_resources,
972 .num_resources = ARRAY_SIZE(uart2_resources),
975 static inline void configure_usart2_pins(unsigned pins)
977 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
978 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
980 if (pins & ATMEL_UART_RTS)
981 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */
982 if (pins & ATMEL_UART_CTS)
983 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */
986 static struct resource uart3_resources[] = {
988 .start = AT91SAM9260_BASE_US3,
989 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
990 .flags = IORESOURCE_MEM,
993 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
994 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
995 .flags = IORESOURCE_IRQ,
999 static struct atmel_uart_data uart3_data = {
1002 .rts_gpio = -EINVAL,
1005 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1007 static struct platform_device at91sam9260_uart3_device = {
1008 .name = "atmel_usart",
1011 .dma_mask = &uart3_dmamask,
1012 .coherent_dma_mask = DMA_BIT_MASK(32),
1013 .platform_data = &uart3_data,
1015 .resource = uart3_resources,
1016 .num_resources = ARRAY_SIZE(uart3_resources),
1019 static inline void configure_usart3_pins(unsigned pins)
1021 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
1022 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
1024 if (pins & ATMEL_UART_RTS)
1025 at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */
1026 if (pins & ATMEL_UART_CTS)
1027 at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */
1030 static struct resource uart4_resources[] = {
1032 .start = AT91SAM9260_BASE_US4,
1033 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1034 .flags = IORESOURCE_MEM,
1037 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1038 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1039 .flags = IORESOURCE_IRQ,
1043 static struct atmel_uart_data uart4_data = {
1046 .rts_gpio = -EINVAL,
1049 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1051 static struct platform_device at91sam9260_uart4_device = {
1052 .name = "atmel_usart",
1055 .dma_mask = &uart4_dmamask,
1056 .coherent_dma_mask = DMA_BIT_MASK(32),
1057 .platform_data = &uart4_data,
1059 .resource = uart4_resources,
1060 .num_resources = ARRAY_SIZE(uart4_resources),
1063 static inline void configure_usart4_pins(void)
1065 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
1066 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
1069 static struct resource uart5_resources[] = {
1071 .start = AT91SAM9260_BASE_US5,
1072 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1073 .flags = IORESOURCE_MEM,
1076 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1077 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1078 .flags = IORESOURCE_IRQ,
1082 static struct atmel_uart_data uart5_data = {
1085 .rts_gpio = -EINVAL,
1088 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1090 static struct platform_device at91sam9260_uart5_device = {
1091 .name = "atmel_usart",
1094 .dma_mask = &uart5_dmamask,
1095 .coherent_dma_mask = DMA_BIT_MASK(32),
1096 .platform_data = &uart5_data,
1098 .resource = uart5_resources,
1099 .num_resources = ARRAY_SIZE(uart5_resources),
1102 static inline void configure_usart5_pins(void)
1104 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
1105 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
1108 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1110 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1112 struct platform_device *pdev;
1113 struct atmel_uart_data *pdata;
1117 pdev = &at91sam9260_dbgu_device;
1118 configure_dbgu_pins();
1120 case AT91SAM9260_ID_US0:
1121 pdev = &at91sam9260_uart0_device;
1122 configure_usart0_pins(pins);
1124 case AT91SAM9260_ID_US1:
1125 pdev = &at91sam9260_uart1_device;
1126 configure_usart1_pins(pins);
1128 case AT91SAM9260_ID_US2:
1129 pdev = &at91sam9260_uart2_device;
1130 configure_usart2_pins(pins);
1132 case AT91SAM9260_ID_US3:
1133 pdev = &at91sam9260_uart3_device;
1134 configure_usart3_pins(pins);
1136 case AT91SAM9260_ID_US4:
1137 pdev = &at91sam9260_uart4_device;
1138 configure_usart4_pins();
1140 case AT91SAM9260_ID_US5:
1141 pdev = &at91sam9260_uart5_device;
1142 configure_usart5_pins();
1147 pdata = pdev->dev.platform_data;
1148 pdata->num = portnr; /* update to mapped ID */
1150 if (portnr < ATMEL_MAX_UART)
1151 at91_uarts[portnr] = pdev;
1154 void __init at91_add_device_serial(void)
1158 for (i = 0; i < ATMEL_MAX_UART; i++) {
1160 platform_device_register(at91_uarts[i]);
1164 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1165 void __init at91_add_device_serial(void) {}
1168 /* --------------------------------------------------------------------
1170 * -------------------------------------------------------------------- */
1172 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1173 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1175 static struct at91_cf_data cf0_data;
1177 static struct resource cf0_resources[] = {
1179 .start = AT91_CHIPSELECT_4,
1180 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
1181 .flags = IORESOURCE_MEM,
1185 static struct platform_device cf0_device = {
1188 .platform_data = &cf0_data,
1190 .resource = cf0_resources,
1191 .num_resources = ARRAY_SIZE(cf0_resources),
1194 static struct at91_cf_data cf1_data;
1196 static struct resource cf1_resources[] = {
1198 .start = AT91_CHIPSELECT_5,
1199 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
1200 .flags = IORESOURCE_MEM,
1204 static struct platform_device cf1_device = {
1207 .platform_data = &cf1_data,
1209 .resource = cf1_resources,
1210 .num_resources = ARRAY_SIZE(cf1_resources),
1213 void __init at91_add_device_cf(struct at91_cf_data *data)
1215 struct platform_device *pdev;
1221 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1223 switch (data->chipselect) {
1225 at91_set_multi_drive(AT91_PIN_PC8, 0);
1226 at91_set_A_periph(AT91_PIN_PC8, 0);
1227 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1232 at91_set_multi_drive(AT91_PIN_PC9, 0);
1233 at91_set_A_periph(AT91_PIN_PC9, 0);
1234 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1239 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1244 at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1246 if (gpio_is_valid(data->rst_pin)) {
1247 at91_set_multi_drive(data->rst_pin, 0);
1248 at91_set_gpio_output(data->rst_pin, 1);
1251 if (gpio_is_valid(data->irq_pin)) {
1252 at91_set_gpio_input(data->irq_pin, 0);
1253 at91_set_deglitch(data->irq_pin, 1);
1256 if (gpio_is_valid(data->det_pin)) {
1257 at91_set_gpio_input(data->det_pin, 0);
1258 at91_set_deglitch(data->det_pin, 1);
1261 at91_set_B_periph(AT91_PIN_PC6, 0); /* CFCE1 */
1262 at91_set_B_periph(AT91_PIN_PC7, 0); /* CFCE2 */
1263 at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */
1264 at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */
1266 if (IS_ENABLED(CONFIG_PATA_AT91) && (data->flags & AT91_CF_TRUE_IDE))
1267 pdev->name = "pata_at91";
1269 pdev->name = "at91_cf";
1271 platform_device_register(pdev);
1275 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1278 /* --------------------------------------------------------------------
1280 * -------------------------------------------------------------------- */
1282 #if IS_ENABLED(CONFIG_AT91_ADC)
1283 static struct at91_adc_data adc_data;
1285 static struct resource adc_resources[] = {
1287 .start = AT91SAM9260_BASE_ADC,
1288 .end = AT91SAM9260_BASE_ADC + SZ_16K - 1,
1289 .flags = IORESOURCE_MEM,
1292 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1293 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1294 .flags = IORESOURCE_IRQ,
1298 static struct platform_device at91_adc_device = {
1299 .name = "at91sam9260-adc",
1302 .platform_data = &adc_data,
1304 .resource = adc_resources,
1305 .num_resources = ARRAY_SIZE(adc_resources),
1308 static struct at91_adc_trigger at91_adc_triggers[] = {
1310 .name = "timer-counter-0",
1314 .name = "timer-counter-1",
1318 .name = "timer-counter-2",
1324 .is_external = true,
1328 static struct at91_adc_reg_desc at91_adc_register_g20 = {
1329 .channel_base = AT91_ADC_CHR(0),
1330 .drdy_mask = AT91_ADC_DRDY,
1331 .status_register = AT91_ADC_SR,
1332 .trigger_register = AT91_ADC_MR,
1335 void __init at91_add_device_adc(struct at91_adc_data *data)
1340 if (test_bit(0, &data->channels_used))
1341 at91_set_A_periph(AT91_PIN_PC0, 0);
1342 if (test_bit(1, &data->channels_used))
1343 at91_set_A_periph(AT91_PIN_PC1, 0);
1344 if (test_bit(2, &data->channels_used))
1345 at91_set_A_periph(AT91_PIN_PC2, 0);
1346 if (test_bit(3, &data->channels_used))
1347 at91_set_A_periph(AT91_PIN_PC3, 0);
1349 if (data->use_external_triggers)
1350 at91_set_A_periph(AT91_PIN_PA22, 0);
1352 data->num_channels = 4;
1353 data->startup_time = 10;
1354 data->registers = &at91_adc_register_g20;
1355 data->trigger_number = 4;
1356 data->trigger_list = at91_adc_triggers;
1359 platform_device_register(&at91_adc_device);
1362 void __init at91_add_device_adc(struct at91_adc_data *data) {}
1365 /* -------------------------------------------------------------------- */
1367 * These devices are always present and don't need any board-specific
1370 static int __init at91_add_standard_devices(void)
1372 if (of_have_populated_dt())
1375 at91_add_device_rtt();
1376 at91_add_device_watchdog();
1377 at91_add_device_tc();
1381 arch_initcall(at91_add_standard_devices);