2 * arch/arm/mach-at91/at91sam9261_devices.c
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/gpio.h>
18 #include <linux/platform_device.h>
19 #include <linux/i2c-gpio.h>
22 #include <video/atmel_lcdc.h>
24 #include <mach/board.h>
25 #include <mach/at91sam9261.h>
26 #include <mach/at91sam9261_matrix.h>
27 #include <mach/at91_matrix.h>
28 #include <mach/at91sam9_smc.h>
33 /* --------------------------------------------------------------------
35 * -------------------------------------------------------------------- */
37 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
38 static u64 ohci_dmamask = DMA_BIT_MASK(32);
39 static struct at91_usbh_data usbh_data;
41 static struct resource usbh_resources[] = {
43 .start = AT91SAM9261_UHP_BASE,
44 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
45 .flags = IORESOURCE_MEM,
48 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
49 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
50 .flags = IORESOURCE_IRQ,
54 static struct platform_device at91sam9261_usbh_device = {
58 .dma_mask = &ohci_dmamask,
59 .coherent_dma_mask = DMA_BIT_MASK(32),
60 .platform_data = &usbh_data,
62 .resource = usbh_resources,
63 .num_resources = ARRAY_SIZE(usbh_resources),
66 void __init at91_add_device_usbh(struct at91_usbh_data *data)
73 /* Enable overcurrent notification */
74 for (i = 0; i < data->ports; i++) {
75 if (data->overcurrent_pin[i])
76 at91_set_gpio_input(data->overcurrent_pin[i], 1);
80 platform_device_register(&at91sam9261_usbh_device);
83 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
87 /* --------------------------------------------------------------------
89 * -------------------------------------------------------------------- */
91 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
92 static struct at91_udc_data udc_data;
94 static struct resource udc_resources[] = {
96 .start = AT91SAM9261_BASE_UDP,
97 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
98 .flags = IORESOURCE_MEM,
101 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
102 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
103 .flags = IORESOURCE_IRQ,
107 static struct platform_device at91sam9261_udc_device = {
111 .platform_data = &udc_data,
113 .resource = udc_resources,
114 .num_resources = ARRAY_SIZE(udc_resources),
117 void __init at91_add_device_udc(struct at91_udc_data *data)
122 if (gpio_is_valid(data->vbus_pin)) {
123 at91_set_gpio_input(data->vbus_pin, 0);
124 at91_set_deglitch(data->vbus_pin, 1);
127 /* Pullup pin is handled internally by USB device peripheral */
130 platform_device_register(&at91sam9261_udc_device);
133 void __init at91_add_device_udc(struct at91_udc_data *data) {}
136 /* --------------------------------------------------------------------
138 * -------------------------------------------------------------------- */
140 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
141 static u64 mmc_dmamask = DMA_BIT_MASK(32);
142 static struct at91_mmc_data mmc_data;
144 static struct resource mmc_resources[] = {
146 .start = AT91SAM9261_BASE_MCI,
147 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
148 .flags = IORESOURCE_MEM,
151 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
152 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
153 .flags = IORESOURCE_IRQ,
157 static struct platform_device at91sam9261_mmc_device = {
161 .dma_mask = &mmc_dmamask,
162 .coherent_dma_mask = DMA_BIT_MASK(32),
163 .platform_data = &mmc_data,
165 .resource = mmc_resources,
166 .num_resources = ARRAY_SIZE(mmc_resources),
169 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
175 if (gpio_is_valid(data->det_pin)) {
176 at91_set_gpio_input(data->det_pin, 1);
177 at91_set_deglitch(data->det_pin, 1);
179 if (gpio_is_valid(data->wp_pin))
180 at91_set_gpio_input(data->wp_pin, 1);
181 if (gpio_is_valid(data->vcc_pin))
182 at91_set_gpio_output(data->vcc_pin, 0);
185 at91_set_B_periph(AT91_PIN_PA2, 0);
188 at91_set_B_periph(AT91_PIN_PA1, 1);
190 /* DAT0, maybe DAT1..DAT3 */
191 at91_set_B_periph(AT91_PIN_PA0, 1);
193 at91_set_B_periph(AT91_PIN_PA4, 1);
194 at91_set_B_periph(AT91_PIN_PA5, 1);
195 at91_set_B_periph(AT91_PIN_PA6, 1);
199 platform_device_register(&at91sam9261_mmc_device);
202 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
206 /* --------------------------------------------------------------------
208 * -------------------------------------------------------------------- */
210 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
211 static struct atmel_nand_data nand_data;
213 #define NAND_BASE AT91_CHIPSELECT_3
215 static struct resource nand_resources[] = {
218 .end = NAND_BASE + SZ_256M - 1,
219 .flags = IORESOURCE_MEM,
223 static struct platform_device atmel_nand_device = {
224 .name = "atmel_nand",
227 .platform_data = &nand_data,
229 .resource = nand_resources,
230 .num_resources = ARRAY_SIZE(nand_resources),
233 void __init at91_add_device_nand(struct atmel_nand_data *data)
240 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
241 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
244 if (gpio_is_valid(data->enable_pin))
245 at91_set_gpio_output(data->enable_pin, 1);
248 if (gpio_is_valid(data->rdy_pin))
249 at91_set_gpio_input(data->rdy_pin, 1);
251 /* card detect pin */
252 if (gpio_is_valid(data->det_pin))
253 at91_set_gpio_input(data->det_pin, 1);
255 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
256 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
259 platform_device_register(&atmel_nand_device);
263 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
267 /* --------------------------------------------------------------------
269 * -------------------------------------------------------------------- */
272 * Prefer the GPIO code since the TWI controller isn't robust
273 * (gets overruns and underruns under load) and can only issue
274 * repeated STARTs in one scenario (the driver doesn't yet handle them).
276 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
278 static struct i2c_gpio_platform_data pdata = {
279 .sda_pin = AT91_PIN_PA7,
280 .sda_is_open_drain = 1,
281 .scl_pin = AT91_PIN_PA8,
282 .scl_is_open_drain = 1,
283 .udelay = 2, /* ~100 kHz */
286 static struct platform_device at91sam9261_twi_device = {
289 .dev.platform_data = &pdata,
292 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
294 at91_set_GPIO_periph(AT91_PIN_PA7, 1); /* TWD (SDA) */
295 at91_set_multi_drive(AT91_PIN_PA7, 1);
297 at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */
298 at91_set_multi_drive(AT91_PIN_PA8, 1);
300 i2c_register_board_info(0, devices, nr_devices);
301 platform_device_register(&at91sam9261_twi_device);
304 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
306 static struct resource twi_resources[] = {
308 .start = AT91SAM9261_BASE_TWI,
309 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
310 .flags = IORESOURCE_MEM,
313 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
314 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
315 .flags = IORESOURCE_IRQ,
319 static struct platform_device at91sam9261_twi_device = {
322 .resource = twi_resources,
323 .num_resources = ARRAY_SIZE(twi_resources),
326 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
328 /* pins used for TWI interface */
329 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
330 at91_set_multi_drive(AT91_PIN_PA7, 1);
332 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
333 at91_set_multi_drive(AT91_PIN_PA8, 1);
335 i2c_register_board_info(0, devices, nr_devices);
336 platform_device_register(&at91sam9261_twi_device);
339 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
343 /* --------------------------------------------------------------------
345 * -------------------------------------------------------------------- */
347 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
348 static u64 spi_dmamask = DMA_BIT_MASK(32);
350 static struct resource spi0_resources[] = {
352 .start = AT91SAM9261_BASE_SPI0,
353 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
354 .flags = IORESOURCE_MEM,
357 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
358 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
359 .flags = IORESOURCE_IRQ,
363 static struct platform_device at91sam9261_spi0_device = {
367 .dma_mask = &spi_dmamask,
368 .coherent_dma_mask = DMA_BIT_MASK(32),
370 .resource = spi0_resources,
371 .num_resources = ARRAY_SIZE(spi0_resources),
374 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
376 static struct resource spi1_resources[] = {
378 .start = AT91SAM9261_BASE_SPI1,
379 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
380 .flags = IORESOURCE_MEM,
383 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
384 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
385 .flags = IORESOURCE_IRQ,
389 static struct platform_device at91sam9261_spi1_device = {
393 .dma_mask = &spi_dmamask,
394 .coherent_dma_mask = DMA_BIT_MASK(32),
396 .resource = spi1_resources,
397 .num_resources = ARRAY_SIZE(spi1_resources),
400 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
402 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
405 unsigned long cs_pin;
406 short enable_spi0 = 0;
407 short enable_spi1 = 0;
409 /* Choose SPI chip-selects */
410 for (i = 0; i < nr_devices; i++) {
411 if (devices[i].controller_data)
412 cs_pin = (unsigned long) devices[i].controller_data;
413 else if (devices[i].bus_num == 0)
414 cs_pin = spi0_standard_cs[devices[i].chip_select];
416 cs_pin = spi1_standard_cs[devices[i].chip_select];
418 if (!gpio_is_valid(cs_pin))
421 if (devices[i].bus_num == 0)
426 /* enable chip-select pin */
427 at91_set_gpio_output(cs_pin, 1);
429 /* pass chip-select pin to driver */
430 devices[i].controller_data = (void *) cs_pin;
433 spi_register_board_info(devices, nr_devices);
435 /* Configure SPI bus(es) */
437 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
438 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
439 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
441 platform_device_register(&at91sam9261_spi0_device);
444 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
445 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
446 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
448 platform_device_register(&at91sam9261_spi1_device);
452 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
456 /* --------------------------------------------------------------------
458 * -------------------------------------------------------------------- */
460 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
461 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
462 static struct atmel_lcdfb_info lcdc_data;
464 static struct resource lcdc_resources[] = {
466 .start = AT91SAM9261_LCDC_BASE,
467 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
468 .flags = IORESOURCE_MEM,
471 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
472 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
473 .flags = IORESOURCE_IRQ,
475 #if defined(CONFIG_FB_INTSRAM)
477 .start = AT91SAM9261_SRAM_BASE,
478 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
479 .flags = IORESOURCE_MEM,
484 static struct platform_device at91_lcdc_device = {
485 .name = "atmel_lcdfb",
488 .dma_mask = &lcdc_dmamask,
489 .coherent_dma_mask = DMA_BIT_MASK(32),
490 .platform_data = &lcdc_data,
492 .resource = lcdc_resources,
493 .num_resources = ARRAY_SIZE(lcdc_resources),
496 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
502 #if defined(CONFIG_FB_ATMEL_STN)
503 at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */
504 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
505 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
506 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
507 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
508 at91_set_A_periph(AT91_PIN_PB5, 0); /* LCDD0 */
509 at91_set_A_periph(AT91_PIN_PB6, 0); /* LCDD1 */
510 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
511 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
513 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
514 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
515 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
516 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
517 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
518 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
519 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
520 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
521 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
522 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
523 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
524 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
525 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
526 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
527 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
528 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
529 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
530 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
531 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
532 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
533 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
534 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
537 if (ARRAY_SIZE(lcdc_resources) > 2) {
539 struct resource *fb_res = &lcdc_resources[2];
540 size_t fb_len = resource_size(fb_res);
542 fb = ioremap(fb_res->start, fb_len);
544 memset(fb, 0, fb_len);
549 platform_device_register(&at91_lcdc_device);
552 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
556 /* --------------------------------------------------------------------
557 * Timer/Counter block
558 * -------------------------------------------------------------------- */
560 #ifdef CONFIG_ATMEL_TCLIB
562 static struct resource tcb_resources[] = {
564 .start = AT91SAM9261_BASE_TCB0,
565 .end = AT91SAM9261_BASE_TCB0 + SZ_16K - 1,
566 .flags = IORESOURCE_MEM,
569 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
570 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
571 .flags = IORESOURCE_IRQ,
574 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
575 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
576 .flags = IORESOURCE_IRQ,
579 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
580 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
581 .flags = IORESOURCE_IRQ,
585 static struct platform_device at91sam9261_tcb_device = {
588 .resource = tcb_resources,
589 .num_resources = ARRAY_SIZE(tcb_resources),
592 static void __init at91_add_device_tc(void)
594 platform_device_register(&at91sam9261_tcb_device);
597 static void __init at91_add_device_tc(void) { }
601 /* --------------------------------------------------------------------
603 * -------------------------------------------------------------------- */
605 static struct resource rtt_resources[] = {
607 .start = AT91SAM9261_BASE_RTT,
608 .end = AT91SAM9261_BASE_RTT + SZ_16 - 1,
609 .flags = IORESOURCE_MEM,
611 .flags = IORESOURCE_MEM,
615 static struct platform_device at91sam9261_rtt_device = {
618 .resource = rtt_resources,
621 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
622 static void __init at91_add_device_rtt_rtc(void)
624 at91sam9261_rtt_device.name = "rtc-at91sam9";
626 * The second resource is needed:
627 * GPBR will serve as the storage for RTC time offset
629 at91sam9261_rtt_device.num_resources = 2;
630 rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
631 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
632 rtt_resources[1].end = rtt_resources[1].start + 3;
635 static void __init at91_add_device_rtt_rtc(void)
637 /* Only one resource is needed: RTT not used as RTC */
638 at91sam9261_rtt_device.num_resources = 1;
642 static void __init at91_add_device_rtt(void)
644 at91_add_device_rtt_rtc();
645 platform_device_register(&at91sam9261_rtt_device);
649 /* --------------------------------------------------------------------
651 * -------------------------------------------------------------------- */
653 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
654 static struct resource wdt_resources[] = {
656 .start = AT91SAM9261_BASE_WDT,
657 .end = AT91SAM9261_BASE_WDT + SZ_16 - 1,
658 .flags = IORESOURCE_MEM,
662 static struct platform_device at91sam9261_wdt_device = {
665 .resource = wdt_resources,
666 .num_resources = ARRAY_SIZE(wdt_resources),
669 static void __init at91_add_device_watchdog(void)
671 platform_device_register(&at91sam9261_wdt_device);
674 static void __init at91_add_device_watchdog(void) {}
678 /* --------------------------------------------------------------------
679 * SSC -- Synchronous Serial Controller
680 * -------------------------------------------------------------------- */
682 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
683 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
685 static struct resource ssc0_resources[] = {
687 .start = AT91SAM9261_BASE_SSC0,
688 .end = AT91SAM9261_BASE_SSC0 + SZ_16K - 1,
689 .flags = IORESOURCE_MEM,
692 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
693 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
694 .flags = IORESOURCE_IRQ,
698 static struct platform_device at91sam9261_ssc0_device = {
702 .dma_mask = &ssc0_dmamask,
703 .coherent_dma_mask = DMA_BIT_MASK(32),
705 .resource = ssc0_resources,
706 .num_resources = ARRAY_SIZE(ssc0_resources),
709 static inline void configure_ssc0_pins(unsigned pins)
711 if (pins & ATMEL_SSC_TF)
712 at91_set_A_periph(AT91_PIN_PB21, 1);
713 if (pins & ATMEL_SSC_TK)
714 at91_set_A_periph(AT91_PIN_PB22, 1);
715 if (pins & ATMEL_SSC_TD)
716 at91_set_A_periph(AT91_PIN_PB23, 1);
717 if (pins & ATMEL_SSC_RD)
718 at91_set_A_periph(AT91_PIN_PB24, 1);
719 if (pins & ATMEL_SSC_RK)
720 at91_set_A_periph(AT91_PIN_PB25, 1);
721 if (pins & ATMEL_SSC_RF)
722 at91_set_A_periph(AT91_PIN_PB26, 1);
725 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
727 static struct resource ssc1_resources[] = {
729 .start = AT91SAM9261_BASE_SSC1,
730 .end = AT91SAM9261_BASE_SSC1 + SZ_16K - 1,
731 .flags = IORESOURCE_MEM,
734 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
735 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
736 .flags = IORESOURCE_IRQ,
740 static struct platform_device at91sam9261_ssc1_device = {
744 .dma_mask = &ssc1_dmamask,
745 .coherent_dma_mask = DMA_BIT_MASK(32),
747 .resource = ssc1_resources,
748 .num_resources = ARRAY_SIZE(ssc1_resources),
751 static inline void configure_ssc1_pins(unsigned pins)
753 if (pins & ATMEL_SSC_TF)
754 at91_set_B_periph(AT91_PIN_PA17, 1);
755 if (pins & ATMEL_SSC_TK)
756 at91_set_B_periph(AT91_PIN_PA18, 1);
757 if (pins & ATMEL_SSC_TD)
758 at91_set_B_periph(AT91_PIN_PA19, 1);
759 if (pins & ATMEL_SSC_RD)
760 at91_set_B_periph(AT91_PIN_PA20, 1);
761 if (pins & ATMEL_SSC_RK)
762 at91_set_B_periph(AT91_PIN_PA21, 1);
763 if (pins & ATMEL_SSC_RF)
764 at91_set_B_periph(AT91_PIN_PA22, 1);
767 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
769 static struct resource ssc2_resources[] = {
771 .start = AT91SAM9261_BASE_SSC2,
772 .end = AT91SAM9261_BASE_SSC2 + SZ_16K - 1,
773 .flags = IORESOURCE_MEM,
776 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
777 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
778 .flags = IORESOURCE_IRQ,
782 static struct platform_device at91sam9261_ssc2_device = {
786 .dma_mask = &ssc2_dmamask,
787 .coherent_dma_mask = DMA_BIT_MASK(32),
789 .resource = ssc2_resources,
790 .num_resources = ARRAY_SIZE(ssc2_resources),
793 static inline void configure_ssc2_pins(unsigned pins)
795 if (pins & ATMEL_SSC_TF)
796 at91_set_B_periph(AT91_PIN_PC25, 1);
797 if (pins & ATMEL_SSC_TK)
798 at91_set_B_periph(AT91_PIN_PC26, 1);
799 if (pins & ATMEL_SSC_TD)
800 at91_set_B_periph(AT91_PIN_PC27, 1);
801 if (pins & ATMEL_SSC_RD)
802 at91_set_B_periph(AT91_PIN_PC28, 1);
803 if (pins & ATMEL_SSC_RK)
804 at91_set_B_periph(AT91_PIN_PC29, 1);
805 if (pins & ATMEL_SSC_RF)
806 at91_set_B_periph(AT91_PIN_PC30, 1);
810 * SSC controllers are accessed through library code, instead of any
811 * kind of all-singing/all-dancing driver. For example one could be
812 * used by a particular I2S audio codec's driver, while another one
813 * on the same system might be used by a custom data capture driver.
815 void __init at91_add_device_ssc(unsigned id, unsigned pins)
817 struct platform_device *pdev;
820 * NOTE: caller is responsible for passing information matching
821 * "pins" to whatever will be using each particular controller.
824 case AT91SAM9261_ID_SSC0:
825 pdev = &at91sam9261_ssc0_device;
826 configure_ssc0_pins(pins);
828 case AT91SAM9261_ID_SSC1:
829 pdev = &at91sam9261_ssc1_device;
830 configure_ssc1_pins(pins);
832 case AT91SAM9261_ID_SSC2:
833 pdev = &at91sam9261_ssc2_device;
834 configure_ssc2_pins(pins);
840 platform_device_register(pdev);
844 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
848 /* --------------------------------------------------------------------
850 * -------------------------------------------------------------------- */
852 #if defined(CONFIG_SERIAL_ATMEL)
853 static struct resource dbgu_resources[] = {
855 .start = AT91SAM9261_BASE_DBGU,
856 .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
857 .flags = IORESOURCE_MEM,
860 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
861 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
862 .flags = IORESOURCE_IRQ,
866 static struct atmel_uart_data dbgu_data = {
868 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
871 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
873 static struct platform_device at91sam9261_dbgu_device = {
874 .name = "atmel_usart",
877 .dma_mask = &dbgu_dmamask,
878 .coherent_dma_mask = DMA_BIT_MASK(32),
879 .platform_data = &dbgu_data,
881 .resource = dbgu_resources,
882 .num_resources = ARRAY_SIZE(dbgu_resources),
885 static inline void configure_dbgu_pins(void)
887 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
888 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
891 static struct resource uart0_resources[] = {
893 .start = AT91SAM9261_BASE_US0,
894 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
895 .flags = IORESOURCE_MEM,
898 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
899 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
900 .flags = IORESOURCE_IRQ,
904 static struct atmel_uart_data uart0_data = {
909 static u64 uart0_dmamask = DMA_BIT_MASK(32);
911 static struct platform_device at91sam9261_uart0_device = {
912 .name = "atmel_usart",
915 .dma_mask = &uart0_dmamask,
916 .coherent_dma_mask = DMA_BIT_MASK(32),
917 .platform_data = &uart0_data,
919 .resource = uart0_resources,
920 .num_resources = ARRAY_SIZE(uart0_resources),
923 static inline void configure_usart0_pins(unsigned pins)
925 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
926 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
928 if (pins & ATMEL_UART_RTS)
929 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
930 if (pins & ATMEL_UART_CTS)
931 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
934 static struct resource uart1_resources[] = {
936 .start = AT91SAM9261_BASE_US1,
937 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
938 .flags = IORESOURCE_MEM,
941 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
942 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
943 .flags = IORESOURCE_IRQ,
947 static struct atmel_uart_data uart1_data = {
952 static u64 uart1_dmamask = DMA_BIT_MASK(32);
954 static struct platform_device at91sam9261_uart1_device = {
955 .name = "atmel_usart",
958 .dma_mask = &uart1_dmamask,
959 .coherent_dma_mask = DMA_BIT_MASK(32),
960 .platform_data = &uart1_data,
962 .resource = uart1_resources,
963 .num_resources = ARRAY_SIZE(uart1_resources),
966 static inline void configure_usart1_pins(unsigned pins)
968 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
969 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
971 if (pins & ATMEL_UART_RTS)
972 at91_set_B_periph(AT91_PIN_PA12, 0); /* RTS1 */
973 if (pins & ATMEL_UART_CTS)
974 at91_set_B_periph(AT91_PIN_PA13, 0); /* CTS1 */
977 static struct resource uart2_resources[] = {
979 .start = AT91SAM9261_BASE_US2,
980 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
981 .flags = IORESOURCE_MEM,
984 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
985 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
986 .flags = IORESOURCE_IRQ,
990 static struct atmel_uart_data uart2_data = {
995 static u64 uart2_dmamask = DMA_BIT_MASK(32);
997 static struct platform_device at91sam9261_uart2_device = {
998 .name = "atmel_usart",
1001 .dma_mask = &uart2_dmamask,
1002 .coherent_dma_mask = DMA_BIT_MASK(32),
1003 .platform_data = &uart2_data,
1005 .resource = uart2_resources,
1006 .num_resources = ARRAY_SIZE(uart2_resources),
1009 static inline void configure_usart2_pins(unsigned pins)
1011 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
1012 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
1014 if (pins & ATMEL_UART_RTS)
1015 at91_set_B_periph(AT91_PIN_PA15, 0); /* RTS2*/
1016 if (pins & ATMEL_UART_CTS)
1017 at91_set_B_periph(AT91_PIN_PA16, 0); /* CTS2 */
1020 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1022 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1024 struct platform_device *pdev;
1025 struct atmel_uart_data *pdata;
1029 pdev = &at91sam9261_dbgu_device;
1030 configure_dbgu_pins();
1032 case AT91SAM9261_ID_US0:
1033 pdev = &at91sam9261_uart0_device;
1034 configure_usart0_pins(pins);
1036 case AT91SAM9261_ID_US1:
1037 pdev = &at91sam9261_uart1_device;
1038 configure_usart1_pins(pins);
1040 case AT91SAM9261_ID_US2:
1041 pdev = &at91sam9261_uart2_device;
1042 configure_usart2_pins(pins);
1047 pdata = pdev->dev.platform_data;
1048 pdata->num = portnr; /* update to mapped ID */
1050 if (portnr < ATMEL_MAX_UART)
1051 at91_uarts[portnr] = pdev;
1054 void __init at91_add_device_serial(void)
1058 for (i = 0; i < ATMEL_MAX_UART; i++) {
1060 platform_device_register(at91_uarts[i]);
1064 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1065 void __init at91_add_device_serial(void) {}
1069 /* -------------------------------------------------------------------- */
1072 * These devices are always present and don't need any board-specific
1075 static int __init at91_add_standard_devices(void)
1077 at91_add_device_rtt();
1078 at91_add_device_watchdog();
1079 at91_add_device_tc();
1083 arch_initcall(at91_add_standard_devices);