2 * arch/arm/mach-at91/at91sam9261_devices.c
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/gpio.h>
18 #include <linux/platform_device.h>
19 #include <linux/i2c-gpio.h>
22 #include <video/atmel_lcdc.h>
24 #include <mach/at91sam9261.h>
25 #include <mach/at91sam9261_matrix.h>
26 #include <mach/at91_matrix.h>
27 #include <mach/at91sam9_smc.h>
28 #include <mach/hardware.h>
34 /* --------------------------------------------------------------------
36 * -------------------------------------------------------------------- */
38 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
39 static u64 ohci_dmamask = DMA_BIT_MASK(32);
40 static struct at91_usbh_data usbh_data;
42 static struct resource usbh_resources[] = {
44 .start = AT91SAM9261_UHP_BASE,
45 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
46 .flags = IORESOURCE_MEM,
49 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
50 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
51 .flags = IORESOURCE_IRQ,
55 static struct platform_device at91sam9261_usbh_device = {
59 .dma_mask = &ohci_dmamask,
60 .coherent_dma_mask = DMA_BIT_MASK(32),
61 .platform_data = &usbh_data,
63 .resource = usbh_resources,
64 .num_resources = ARRAY_SIZE(usbh_resources),
67 void __init at91_add_device_usbh(struct at91_usbh_data *data)
74 /* Enable overcurrent notification */
75 for (i = 0; i < data->ports; i++) {
76 if (gpio_is_valid(data->overcurrent_pin[i]))
77 at91_set_gpio_input(data->overcurrent_pin[i], 1);
81 platform_device_register(&at91sam9261_usbh_device);
84 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
88 /* --------------------------------------------------------------------
90 * -------------------------------------------------------------------- */
92 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
93 static struct at91_udc_data udc_data;
95 static struct resource udc_resources[] = {
97 .start = AT91SAM9261_BASE_UDP,
98 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
99 .flags = IORESOURCE_MEM,
102 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
103 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
104 .flags = IORESOURCE_IRQ,
108 static struct platform_device at91sam9261_udc_device = {
112 .platform_data = &udc_data,
114 .resource = udc_resources,
115 .num_resources = ARRAY_SIZE(udc_resources),
118 void __init at91_add_device_udc(struct at91_udc_data *data)
123 if (gpio_is_valid(data->vbus_pin)) {
124 at91_set_gpio_input(data->vbus_pin, 0);
125 at91_set_deglitch(data->vbus_pin, 1);
128 /* Pullup pin is handled internally by USB device peripheral */
131 platform_device_register(&at91sam9261_udc_device);
134 void __init at91_add_device_udc(struct at91_udc_data *data) {}
137 /* --------------------------------------------------------------------
139 * -------------------------------------------------------------------- */
141 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
142 static u64 mmc_dmamask = DMA_BIT_MASK(32);
143 static struct mci_platform_data mmc_data;
145 static struct resource mmc_resources[] = {
147 .start = AT91SAM9261_BASE_MCI,
148 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
149 .flags = IORESOURCE_MEM,
152 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
153 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
154 .flags = IORESOURCE_IRQ,
158 static struct platform_device at91sam9261_mmc_device = {
162 .dma_mask = &mmc_dmamask,
163 .coherent_dma_mask = DMA_BIT_MASK(32),
164 .platform_data = &mmc_data,
166 .resource = mmc_resources,
167 .num_resources = ARRAY_SIZE(mmc_resources),
170 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
175 if (data->slot[0].bus_width) {
177 if (gpio_is_valid(data->slot[0].detect_pin)) {
178 at91_set_gpio_input(data->slot[0].detect_pin, 1);
179 at91_set_deglitch(data->slot[0].detect_pin, 1);
181 if (gpio_is_valid(data->slot[0].wp_pin))
182 at91_set_gpio_input(data->slot[0].wp_pin, 1);
185 at91_set_B_periph(AT91_PIN_PA2, 0);
188 at91_set_B_periph(AT91_PIN_PA1, 1);
190 /* DAT0, maybe DAT1..DAT3 */
191 at91_set_B_periph(AT91_PIN_PA0, 1);
192 if (data->slot[0].bus_width == 4) {
193 at91_set_B_periph(AT91_PIN_PA4, 1);
194 at91_set_B_periph(AT91_PIN_PA5, 1);
195 at91_set_B_periph(AT91_PIN_PA6, 1);
199 platform_device_register(&at91sam9261_mmc_device);
203 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
207 /* --------------------------------------------------------------------
209 * -------------------------------------------------------------------- */
211 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
212 static struct atmel_nand_data nand_data;
214 #define NAND_BASE AT91_CHIPSELECT_3
216 static struct resource nand_resources[] = {
219 .end = NAND_BASE + SZ_256M - 1,
220 .flags = IORESOURCE_MEM,
224 static struct platform_device atmel_nand_device = {
225 .name = "atmel_nand",
228 .platform_data = &nand_data,
230 .resource = nand_resources,
231 .num_resources = ARRAY_SIZE(nand_resources),
234 void __init at91_add_device_nand(struct atmel_nand_data *data)
241 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
242 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
245 if (gpio_is_valid(data->enable_pin))
246 at91_set_gpio_output(data->enable_pin, 1);
249 if (gpio_is_valid(data->rdy_pin))
250 at91_set_gpio_input(data->rdy_pin, 1);
252 /* card detect pin */
253 if (gpio_is_valid(data->det_pin))
254 at91_set_gpio_input(data->det_pin, 1);
256 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
257 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
260 platform_device_register(&atmel_nand_device);
264 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
268 /* --------------------------------------------------------------------
270 * -------------------------------------------------------------------- */
273 * Prefer the GPIO code since the TWI controller isn't robust
274 * (gets overruns and underruns under load) and can only issue
275 * repeated STARTs in one scenario (the driver doesn't yet handle them).
277 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
279 static struct i2c_gpio_platform_data pdata = {
280 .sda_pin = AT91_PIN_PA7,
281 .sda_is_open_drain = 1,
282 .scl_pin = AT91_PIN_PA8,
283 .scl_is_open_drain = 1,
284 .udelay = 2, /* ~100 kHz */
287 static struct platform_device at91sam9261_twi_device = {
290 .dev.platform_data = &pdata,
293 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
295 at91_set_GPIO_periph(AT91_PIN_PA7, 1); /* TWD (SDA) */
296 at91_set_multi_drive(AT91_PIN_PA7, 1);
298 at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */
299 at91_set_multi_drive(AT91_PIN_PA8, 1);
301 i2c_register_board_info(0, devices, nr_devices);
302 platform_device_register(&at91sam9261_twi_device);
305 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
307 static struct resource twi_resources[] = {
309 .start = AT91SAM9261_BASE_TWI,
310 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
311 .flags = IORESOURCE_MEM,
314 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
315 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
316 .flags = IORESOURCE_IRQ,
320 static struct platform_device at91sam9261_twi_device = {
322 .resource = twi_resources,
323 .num_resources = ARRAY_SIZE(twi_resources),
326 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
328 /* IP version is not the same on 9261 and g10 */
329 if (cpu_is_at91sam9g10()) {
330 at91sam9261_twi_device.name = "i2c-at91sam9g10";
331 /* I2C PIO must not be configured as open-drain on this chip */
333 at91sam9261_twi_device.name = "i2c-at91sam9261";
334 at91_set_multi_drive(AT91_PIN_PA7, 1);
335 at91_set_multi_drive(AT91_PIN_PA8, 1);
338 /* pins used for TWI interface */
339 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
340 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
342 i2c_register_board_info(0, devices, nr_devices);
343 platform_device_register(&at91sam9261_twi_device);
346 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
350 /* --------------------------------------------------------------------
352 * -------------------------------------------------------------------- */
354 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
355 static u64 spi_dmamask = DMA_BIT_MASK(32);
357 static struct resource spi0_resources[] = {
359 .start = AT91SAM9261_BASE_SPI0,
360 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
361 .flags = IORESOURCE_MEM,
364 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
365 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
366 .flags = IORESOURCE_IRQ,
370 static struct platform_device at91sam9261_spi0_device = {
374 .dma_mask = &spi_dmamask,
375 .coherent_dma_mask = DMA_BIT_MASK(32),
377 .resource = spi0_resources,
378 .num_resources = ARRAY_SIZE(spi0_resources),
381 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
383 static struct resource spi1_resources[] = {
385 .start = AT91SAM9261_BASE_SPI1,
386 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
387 .flags = IORESOURCE_MEM,
390 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
391 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
392 .flags = IORESOURCE_IRQ,
396 static struct platform_device at91sam9261_spi1_device = {
400 .dma_mask = &spi_dmamask,
401 .coherent_dma_mask = DMA_BIT_MASK(32),
403 .resource = spi1_resources,
404 .num_resources = ARRAY_SIZE(spi1_resources),
407 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
409 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
412 unsigned long cs_pin;
413 short enable_spi0 = 0;
414 short enable_spi1 = 0;
416 /* Choose SPI chip-selects */
417 for (i = 0; i < nr_devices; i++) {
418 if (devices[i].controller_data)
419 cs_pin = (unsigned long) devices[i].controller_data;
420 else if (devices[i].bus_num == 0)
421 cs_pin = spi0_standard_cs[devices[i].chip_select];
423 cs_pin = spi1_standard_cs[devices[i].chip_select];
425 if (!gpio_is_valid(cs_pin))
428 if (devices[i].bus_num == 0)
433 /* enable chip-select pin */
434 at91_set_gpio_output(cs_pin, 1);
436 /* pass chip-select pin to driver */
437 devices[i].controller_data = (void *) cs_pin;
440 spi_register_board_info(devices, nr_devices);
442 /* Configure SPI bus(es) */
444 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
445 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
446 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
448 platform_device_register(&at91sam9261_spi0_device);
451 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
452 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
453 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
455 platform_device_register(&at91sam9261_spi1_device);
459 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
463 /* --------------------------------------------------------------------
465 * -------------------------------------------------------------------- */
467 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
468 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
469 static struct atmel_lcdfb_pdata lcdc_data;
471 static struct resource lcdc_resources[] = {
473 .start = AT91SAM9261_LCDC_BASE,
474 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
475 .flags = IORESOURCE_MEM,
478 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
479 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
480 .flags = IORESOURCE_IRQ,
482 #if defined(CONFIG_FB_INTSRAM)
484 .start = AT91SAM9261_SRAM_BASE,
485 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
486 .flags = IORESOURCE_MEM,
491 static struct platform_device at91_lcdc_device = {
494 .dma_mask = &lcdc_dmamask,
495 .coherent_dma_mask = DMA_BIT_MASK(32),
496 .platform_data = &lcdc_data,
498 .resource = lcdc_resources,
499 .num_resources = ARRAY_SIZE(lcdc_resources),
502 void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data)
508 if (cpu_is_at91sam9g10())
509 at91_lcdc_device.name = "at91sam9g10-lcdfb";
511 at91_lcdc_device.name = "at91sam9261-lcdfb";
513 #if defined(CONFIG_FB_ATMEL_STN)
514 at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */
515 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
516 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
517 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
518 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
519 at91_set_A_periph(AT91_PIN_PB5, 0); /* LCDD0 */
520 at91_set_A_periph(AT91_PIN_PB6, 0); /* LCDD1 */
521 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
522 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
524 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
525 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
526 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
527 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
528 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
529 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
530 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
531 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
532 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
533 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
534 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
535 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
536 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
537 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
538 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
539 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
540 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
541 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
542 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
543 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
544 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
545 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
548 if (ARRAY_SIZE(lcdc_resources) > 2) {
550 struct resource *fb_res = &lcdc_resources[2];
551 size_t fb_len = resource_size(fb_res);
553 fb = ioremap(fb_res->start, fb_len);
555 memset(fb, 0, fb_len);
560 platform_device_register(&at91_lcdc_device);
563 void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data) {}
567 /* --------------------------------------------------------------------
568 * Timer/Counter block
569 * -------------------------------------------------------------------- */
571 #ifdef CONFIG_ATMEL_TCLIB
573 static struct resource tcb_resources[] = {
575 .start = AT91SAM9261_BASE_TCB0,
576 .end = AT91SAM9261_BASE_TCB0 + SZ_16K - 1,
577 .flags = IORESOURCE_MEM,
580 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
581 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
582 .flags = IORESOURCE_IRQ,
585 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
586 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
587 .flags = IORESOURCE_IRQ,
590 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
591 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
592 .flags = IORESOURCE_IRQ,
596 static struct platform_device at91sam9261_tcb_device = {
599 .resource = tcb_resources,
600 .num_resources = ARRAY_SIZE(tcb_resources),
603 static void __init at91_add_device_tc(void)
605 platform_device_register(&at91sam9261_tcb_device);
608 static void __init at91_add_device_tc(void) { }
612 /* --------------------------------------------------------------------
614 * -------------------------------------------------------------------- */
616 static struct resource rtt_resources[] = {
618 .start = AT91SAM9261_BASE_RTT,
619 .end = AT91SAM9261_BASE_RTT + SZ_16 - 1,
620 .flags = IORESOURCE_MEM,
622 .flags = IORESOURCE_MEM,
624 .flags = IORESOURCE_IRQ,
628 static struct platform_device at91sam9261_rtt_device = {
631 .resource = rtt_resources,
634 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
635 static void __init at91_add_device_rtt_rtc(void)
637 at91sam9261_rtt_device.name = "rtc-at91sam9";
639 * The second resource is needed:
640 * GPBR will serve as the storage for RTC time offset
642 at91sam9261_rtt_device.num_resources = 3;
643 rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
644 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
645 rtt_resources[1].end = rtt_resources[1].start + 3;
646 rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
647 rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
650 static void __init at91_add_device_rtt_rtc(void)
652 /* Only one resource is needed: RTT not used as RTC */
653 at91sam9261_rtt_device.num_resources = 1;
657 static void __init at91_add_device_rtt(void)
659 at91_add_device_rtt_rtc();
660 platform_device_register(&at91sam9261_rtt_device);
664 /* --------------------------------------------------------------------
666 * -------------------------------------------------------------------- */
668 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
669 static struct resource wdt_resources[] = {
671 .start = AT91SAM9261_BASE_WDT,
672 .end = AT91SAM9261_BASE_WDT + SZ_16 - 1,
673 .flags = IORESOURCE_MEM,
677 static struct platform_device at91sam9261_wdt_device = {
680 .resource = wdt_resources,
681 .num_resources = ARRAY_SIZE(wdt_resources),
684 static void __init at91_add_device_watchdog(void)
686 platform_device_register(&at91sam9261_wdt_device);
689 static void __init at91_add_device_watchdog(void) {}
693 /* --------------------------------------------------------------------
694 * SSC -- Synchronous Serial Controller
695 * -------------------------------------------------------------------- */
697 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
698 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
700 static struct resource ssc0_resources[] = {
702 .start = AT91SAM9261_BASE_SSC0,
703 .end = AT91SAM9261_BASE_SSC0 + SZ_16K - 1,
704 .flags = IORESOURCE_MEM,
707 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
708 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
709 .flags = IORESOURCE_IRQ,
713 static struct platform_device at91sam9261_ssc0_device = {
714 .name = "at91rm9200_ssc",
717 .dma_mask = &ssc0_dmamask,
718 .coherent_dma_mask = DMA_BIT_MASK(32),
720 .resource = ssc0_resources,
721 .num_resources = ARRAY_SIZE(ssc0_resources),
724 static inline void configure_ssc0_pins(unsigned pins)
726 if (pins & ATMEL_SSC_TF)
727 at91_set_A_periph(AT91_PIN_PB21, 1);
728 if (pins & ATMEL_SSC_TK)
729 at91_set_A_periph(AT91_PIN_PB22, 1);
730 if (pins & ATMEL_SSC_TD)
731 at91_set_A_periph(AT91_PIN_PB23, 1);
732 if (pins & ATMEL_SSC_RD)
733 at91_set_A_periph(AT91_PIN_PB24, 1);
734 if (pins & ATMEL_SSC_RK)
735 at91_set_A_periph(AT91_PIN_PB25, 1);
736 if (pins & ATMEL_SSC_RF)
737 at91_set_A_periph(AT91_PIN_PB26, 1);
740 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
742 static struct resource ssc1_resources[] = {
744 .start = AT91SAM9261_BASE_SSC1,
745 .end = AT91SAM9261_BASE_SSC1 + SZ_16K - 1,
746 .flags = IORESOURCE_MEM,
749 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
750 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
751 .flags = IORESOURCE_IRQ,
755 static struct platform_device at91sam9261_ssc1_device = {
756 .name = "at91rm9200_ssc",
759 .dma_mask = &ssc1_dmamask,
760 .coherent_dma_mask = DMA_BIT_MASK(32),
762 .resource = ssc1_resources,
763 .num_resources = ARRAY_SIZE(ssc1_resources),
766 static inline void configure_ssc1_pins(unsigned pins)
768 if (pins & ATMEL_SSC_TF)
769 at91_set_B_periph(AT91_PIN_PA17, 1);
770 if (pins & ATMEL_SSC_TK)
771 at91_set_B_periph(AT91_PIN_PA18, 1);
772 if (pins & ATMEL_SSC_TD)
773 at91_set_B_periph(AT91_PIN_PA19, 1);
774 if (pins & ATMEL_SSC_RD)
775 at91_set_B_periph(AT91_PIN_PA20, 1);
776 if (pins & ATMEL_SSC_RK)
777 at91_set_B_periph(AT91_PIN_PA21, 1);
778 if (pins & ATMEL_SSC_RF)
779 at91_set_B_periph(AT91_PIN_PA22, 1);
782 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
784 static struct resource ssc2_resources[] = {
786 .start = AT91SAM9261_BASE_SSC2,
787 .end = AT91SAM9261_BASE_SSC2 + SZ_16K - 1,
788 .flags = IORESOURCE_MEM,
791 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
792 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
793 .flags = IORESOURCE_IRQ,
797 static struct platform_device at91sam9261_ssc2_device = {
798 .name = "at91rm9200_ssc",
801 .dma_mask = &ssc2_dmamask,
802 .coherent_dma_mask = DMA_BIT_MASK(32),
804 .resource = ssc2_resources,
805 .num_resources = ARRAY_SIZE(ssc2_resources),
808 static inline void configure_ssc2_pins(unsigned pins)
810 if (pins & ATMEL_SSC_TF)
811 at91_set_B_periph(AT91_PIN_PC25, 1);
812 if (pins & ATMEL_SSC_TK)
813 at91_set_B_periph(AT91_PIN_PC26, 1);
814 if (pins & ATMEL_SSC_TD)
815 at91_set_B_periph(AT91_PIN_PC27, 1);
816 if (pins & ATMEL_SSC_RD)
817 at91_set_B_periph(AT91_PIN_PC28, 1);
818 if (pins & ATMEL_SSC_RK)
819 at91_set_B_periph(AT91_PIN_PC29, 1);
820 if (pins & ATMEL_SSC_RF)
821 at91_set_B_periph(AT91_PIN_PC30, 1);
825 * SSC controllers are accessed through library code, instead of any
826 * kind of all-singing/all-dancing driver. For example one could be
827 * used by a particular I2S audio codec's driver, while another one
828 * on the same system might be used by a custom data capture driver.
830 void __init at91_add_device_ssc(unsigned id, unsigned pins)
832 struct platform_device *pdev;
835 * NOTE: caller is responsible for passing information matching
836 * "pins" to whatever will be using each particular controller.
839 case AT91SAM9261_ID_SSC0:
840 pdev = &at91sam9261_ssc0_device;
841 configure_ssc0_pins(pins);
843 case AT91SAM9261_ID_SSC1:
844 pdev = &at91sam9261_ssc1_device;
845 configure_ssc1_pins(pins);
847 case AT91SAM9261_ID_SSC2:
848 pdev = &at91sam9261_ssc2_device;
849 configure_ssc2_pins(pins);
855 platform_device_register(pdev);
859 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
863 /* --------------------------------------------------------------------
865 * -------------------------------------------------------------------- */
867 #if defined(CONFIG_SERIAL_ATMEL)
868 static struct resource dbgu_resources[] = {
870 .start = AT91SAM9261_BASE_DBGU,
871 .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
872 .flags = IORESOURCE_MEM,
875 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
876 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
877 .flags = IORESOURCE_IRQ,
881 static struct atmel_uart_data dbgu_data = {
883 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
886 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
888 static struct platform_device at91sam9261_dbgu_device = {
889 .name = "atmel_usart",
892 .dma_mask = &dbgu_dmamask,
893 .coherent_dma_mask = DMA_BIT_MASK(32),
894 .platform_data = &dbgu_data,
896 .resource = dbgu_resources,
897 .num_resources = ARRAY_SIZE(dbgu_resources),
900 static inline void configure_dbgu_pins(void)
902 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
903 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
906 static struct resource uart0_resources[] = {
908 .start = AT91SAM9261_BASE_US0,
909 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
910 .flags = IORESOURCE_MEM,
913 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
914 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
915 .flags = IORESOURCE_IRQ,
919 static struct atmel_uart_data uart0_data = {
924 static u64 uart0_dmamask = DMA_BIT_MASK(32);
926 static struct platform_device at91sam9261_uart0_device = {
927 .name = "atmel_usart",
930 .dma_mask = &uart0_dmamask,
931 .coherent_dma_mask = DMA_BIT_MASK(32),
932 .platform_data = &uart0_data,
934 .resource = uart0_resources,
935 .num_resources = ARRAY_SIZE(uart0_resources),
938 static inline void configure_usart0_pins(unsigned pins)
940 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
941 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
943 if (pins & ATMEL_UART_RTS)
944 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
945 if (pins & ATMEL_UART_CTS)
946 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
949 static struct resource uart1_resources[] = {
951 .start = AT91SAM9261_BASE_US1,
952 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
953 .flags = IORESOURCE_MEM,
956 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
957 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
958 .flags = IORESOURCE_IRQ,
962 static struct atmel_uart_data uart1_data = {
967 static u64 uart1_dmamask = DMA_BIT_MASK(32);
969 static struct platform_device at91sam9261_uart1_device = {
970 .name = "atmel_usart",
973 .dma_mask = &uart1_dmamask,
974 .coherent_dma_mask = DMA_BIT_MASK(32),
975 .platform_data = &uart1_data,
977 .resource = uart1_resources,
978 .num_resources = ARRAY_SIZE(uart1_resources),
981 static inline void configure_usart1_pins(unsigned pins)
983 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
984 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
986 if (pins & ATMEL_UART_RTS)
987 at91_set_B_periph(AT91_PIN_PA12, 0); /* RTS1 */
988 if (pins & ATMEL_UART_CTS)
989 at91_set_B_periph(AT91_PIN_PA13, 0); /* CTS1 */
992 static struct resource uart2_resources[] = {
994 .start = AT91SAM9261_BASE_US2,
995 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
996 .flags = IORESOURCE_MEM,
999 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
1000 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
1001 .flags = IORESOURCE_IRQ,
1005 static struct atmel_uart_data uart2_data = {
1010 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1012 static struct platform_device at91sam9261_uart2_device = {
1013 .name = "atmel_usart",
1016 .dma_mask = &uart2_dmamask,
1017 .coherent_dma_mask = DMA_BIT_MASK(32),
1018 .platform_data = &uart2_data,
1020 .resource = uart2_resources,
1021 .num_resources = ARRAY_SIZE(uart2_resources),
1024 static inline void configure_usart2_pins(unsigned pins)
1026 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
1027 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
1029 if (pins & ATMEL_UART_RTS)
1030 at91_set_B_periph(AT91_PIN_PA15, 0); /* RTS2*/
1031 if (pins & ATMEL_UART_CTS)
1032 at91_set_B_periph(AT91_PIN_PA16, 0); /* CTS2 */
1035 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1037 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1039 struct platform_device *pdev;
1040 struct atmel_uart_data *pdata;
1044 pdev = &at91sam9261_dbgu_device;
1045 configure_dbgu_pins();
1047 case AT91SAM9261_ID_US0:
1048 pdev = &at91sam9261_uart0_device;
1049 configure_usart0_pins(pins);
1051 case AT91SAM9261_ID_US1:
1052 pdev = &at91sam9261_uart1_device;
1053 configure_usart1_pins(pins);
1055 case AT91SAM9261_ID_US2:
1056 pdev = &at91sam9261_uart2_device;
1057 configure_usart2_pins(pins);
1062 pdata = pdev->dev.platform_data;
1063 pdata->num = portnr; /* update to mapped ID */
1065 if (portnr < ATMEL_MAX_UART)
1066 at91_uarts[portnr] = pdev;
1069 void __init at91_add_device_serial(void)
1073 for (i = 0; i < ATMEL_MAX_UART; i++) {
1075 platform_device_register(at91_uarts[i]);
1079 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1080 void __init at91_add_device_serial(void) {}
1084 /* -------------------------------------------------------------------- */
1087 * These devices are always present and don't need any board-specific
1090 static int __init at91_add_standard_devices(void)
1092 at91_add_device_rtt();
1093 at91_add_device_watchdog();
1094 at91_add_device_tc();
1098 arch_initcall(at91_add_standard_devices);