2 * arch/arm/mach-at91/at91sam9263.c
4 * Copyright (C) 2007 Atmel Corporation.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
17 #include <asm/mach/arch.h>
18 #include <asm/mach/map.h>
19 #include <mach/at91sam9263.h>
20 #include <mach/at91_pmc.h>
21 #include <mach/at91_rstc.h>
22 #include <mach/at91_shdwc.h>
27 static struct map_desc at91sam9263_io_desc[] __initdata = {
29 .virtual = AT91_VA_BASE_SYS,
30 .pfn = __phys_to_pfn(AT91_BASE_SYS),
34 .virtual = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE,
35 .pfn = __phys_to_pfn(AT91SAM9263_SRAM0_BASE),
36 .length = AT91SAM9263_SRAM0_SIZE,
39 .virtual = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE - AT91SAM9263_SRAM1_SIZE,
40 .pfn = __phys_to_pfn(AT91SAM9263_SRAM1_BASE),
41 .length = AT91SAM9263_SRAM1_SIZE,
46 /* --------------------------------------------------------------------
48 * -------------------------------------------------------------------- */
51 * The peripheral clocks.
53 static struct clk pioA_clk = {
55 .pmc_mask = 1 << AT91SAM9263_ID_PIOA,
56 .type = CLK_TYPE_PERIPHERAL,
58 static struct clk pioB_clk = {
60 .pmc_mask = 1 << AT91SAM9263_ID_PIOB,
61 .type = CLK_TYPE_PERIPHERAL,
63 static struct clk pioCDE_clk = {
65 .pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
66 .type = CLK_TYPE_PERIPHERAL,
68 static struct clk usart0_clk = {
70 .pmc_mask = 1 << AT91SAM9263_ID_US0,
71 .type = CLK_TYPE_PERIPHERAL,
73 static struct clk usart1_clk = {
75 .pmc_mask = 1 << AT91SAM9263_ID_US1,
76 .type = CLK_TYPE_PERIPHERAL,
78 static struct clk usart2_clk = {
80 .pmc_mask = 1 << AT91SAM9263_ID_US2,
81 .type = CLK_TYPE_PERIPHERAL,
83 static struct clk mmc0_clk = {
85 .pmc_mask = 1 << AT91SAM9263_ID_MCI0,
86 .type = CLK_TYPE_PERIPHERAL,
88 static struct clk mmc1_clk = {
90 .pmc_mask = 1 << AT91SAM9263_ID_MCI1,
91 .type = CLK_TYPE_PERIPHERAL,
93 static struct clk can_clk = {
95 .pmc_mask = 1 << AT91SAM9263_ID_CAN,
96 .type = CLK_TYPE_PERIPHERAL,
98 static struct clk twi_clk = {
100 .pmc_mask = 1 << AT91SAM9263_ID_TWI,
101 .type = CLK_TYPE_PERIPHERAL,
103 static struct clk spi0_clk = {
105 .pmc_mask = 1 << AT91SAM9263_ID_SPI0,
106 .type = CLK_TYPE_PERIPHERAL,
108 static struct clk spi1_clk = {
110 .pmc_mask = 1 << AT91SAM9263_ID_SPI1,
111 .type = CLK_TYPE_PERIPHERAL,
113 static struct clk ssc0_clk = {
115 .pmc_mask = 1 << AT91SAM9263_ID_SSC0,
116 .type = CLK_TYPE_PERIPHERAL,
118 static struct clk ssc1_clk = {
120 .pmc_mask = 1 << AT91SAM9263_ID_SSC1,
121 .type = CLK_TYPE_PERIPHERAL,
123 static struct clk ac97_clk = {
125 .pmc_mask = 1 << AT91SAM9263_ID_AC97C,
126 .type = CLK_TYPE_PERIPHERAL,
128 static struct clk tcb_clk = {
130 .pmc_mask = 1 << AT91SAM9263_ID_TCB,
131 .type = CLK_TYPE_PERIPHERAL,
133 static struct clk pwm_clk = {
135 .pmc_mask = 1 << AT91SAM9263_ID_PWMC,
136 .type = CLK_TYPE_PERIPHERAL,
138 static struct clk macb_clk = {
140 .pmc_mask = 1 << AT91SAM9263_ID_EMAC,
141 .type = CLK_TYPE_PERIPHERAL,
143 static struct clk dma_clk = {
145 .pmc_mask = 1 << AT91SAM9263_ID_DMA,
146 .type = CLK_TYPE_PERIPHERAL,
148 static struct clk twodge_clk = {
150 .pmc_mask = 1 << AT91SAM9263_ID_2DGE,
151 .type = CLK_TYPE_PERIPHERAL,
153 static struct clk udc_clk = {
155 .pmc_mask = 1 << AT91SAM9263_ID_UDP,
156 .type = CLK_TYPE_PERIPHERAL,
158 static struct clk isi_clk = {
160 .pmc_mask = 1 << AT91SAM9263_ID_ISI,
161 .type = CLK_TYPE_PERIPHERAL,
163 static struct clk lcdc_clk = {
165 .pmc_mask = 1 << AT91SAM9263_ID_LCDC,
166 .type = CLK_TYPE_PERIPHERAL,
168 static struct clk ohci_clk = {
170 .pmc_mask = 1 << AT91SAM9263_ID_UHP,
171 .type = CLK_TYPE_PERIPHERAL,
174 static struct clk *periph_clocks[] __initdata = {
202 static struct clk_lookup periph_clocks_lookups[] = {
203 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
204 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
205 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
206 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
207 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
208 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
209 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
212 static struct clk_lookup usart_clocks_lookups[] = {
213 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
214 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
215 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
216 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
220 * The four programmable clocks.
221 * You must configure pin multiplexing to bring these signals out.
223 static struct clk pck0 = {
225 .pmc_mask = AT91_PMC_PCK0,
226 .type = CLK_TYPE_PROGRAMMABLE,
229 static struct clk pck1 = {
231 .pmc_mask = AT91_PMC_PCK1,
232 .type = CLK_TYPE_PROGRAMMABLE,
235 static struct clk pck2 = {
237 .pmc_mask = AT91_PMC_PCK2,
238 .type = CLK_TYPE_PROGRAMMABLE,
241 static struct clk pck3 = {
243 .pmc_mask = AT91_PMC_PCK3,
244 .type = CLK_TYPE_PROGRAMMABLE,
248 static void __init at91sam9263_register_clocks(void)
252 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
253 clk_register(periph_clocks[i]);
255 clkdev_add_table(periph_clocks_lookups,
256 ARRAY_SIZE(periph_clocks_lookups));
257 clkdev_add_table(usart_clocks_lookups,
258 ARRAY_SIZE(usart_clocks_lookups));
266 static struct clk_lookup console_clock_lookup;
268 void __init at91sam9263_set_console_clock(int id)
270 if (id >= ARRAY_SIZE(usart_clocks_lookups))
273 console_clock_lookup.con_id = "usart";
274 console_clock_lookup.clk = usart_clocks_lookups[id].clk;
275 clkdev_add(&console_clock_lookup);
278 /* --------------------------------------------------------------------
280 * -------------------------------------------------------------------- */
282 static struct at91_gpio_bank at91sam9263_gpio[] = {
284 .id = AT91SAM9263_ID_PIOA,
288 .id = AT91SAM9263_ID_PIOB,
292 .id = AT91SAM9263_ID_PIOCDE,
294 .clock = &pioCDE_clk,
296 .id = AT91SAM9263_ID_PIOCDE,
298 .clock = &pioCDE_clk,
300 .id = AT91SAM9263_ID_PIOCDE,
302 .clock = &pioCDE_clk,
306 static void at91sam9263_poweroff(void)
308 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
312 /* --------------------------------------------------------------------
313 * AT91SAM9263 processor initialization
314 * -------------------------------------------------------------------- */
316 void __init at91sam9263_map_io(void)
318 /* Map peripherals */
319 iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
322 void __init at91sam9263_initialize(unsigned long main_clock)
324 at91_arch_reset = at91sam9_alt_reset;
325 pm_power_off = at91sam9263_poweroff;
326 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
328 /* Init clock subsystem */
329 at91_clock_init(main_clock);
331 /* Register the processor-specific clocks */
332 at91sam9263_register_clocks();
334 /* Register GPIO subsystem */
335 at91_gpio_init(at91sam9263_gpio, 5);
338 /* --------------------------------------------------------------------
339 * Interrupt initialization
340 * -------------------------------------------------------------------- */
343 * The default interrupt priority levels (0 = lowest, 7 = highest).
345 static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
346 7, /* Advanced Interrupt Controller (FIQ) */
347 7, /* System Peripherals */
348 1, /* Parallel IO Controller A */
349 1, /* Parallel IO Controller B */
350 1, /* Parallel IO Controller C, D and E */
356 0, /* Multimedia Card Interface 0 */
357 0, /* Multimedia Card Interface 1 */
359 6, /* Two-Wire Interface */
360 5, /* Serial Peripheral Interface 0 */
361 5, /* Serial Peripheral Interface 1 */
362 4, /* Serial Synchronous Controller 0 */
363 4, /* Serial Synchronous Controller 1 */
364 5, /* AC97 Controller */
365 0, /* Timer Counter 0, 1 and 2 */
366 0, /* Pulse Width Modulation Controller */
369 0, /* 2D Graphic Engine */
370 2, /* USB Device Port */
371 0, /* Image Sensor Interface */
372 3, /* LDC Controller */
373 0, /* DMA Controller */
375 2, /* USB Host port */
376 0, /* Advanced Interrupt Controller (IRQ0) */
377 0, /* Advanced Interrupt Controller (IRQ1) */
380 void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS])
383 priority = at91sam9263_default_irq_priority;
385 /* Initialize the AIC interrupt controller */
386 at91_aic_init(priority);
388 /* Enable GPIO interrupts */
389 at91_gpio_irq_setup();