2 * arch/arm/mach-at91/at91sam9263_devices.c
4 * Copyright (C) 2007 Atmel Corporation.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
15 #include <linux/platform_device.h>
16 #include <linux/i2c-gpio.h>
19 #include <video/atmel_lcdc.h>
21 #include <asm/arch/board.h>
22 #include <asm/arch/gpio.h>
23 #include <asm/arch/at91sam9263.h>
24 #include <asm/arch/at91sam926x_mc.h>
25 #include <asm/arch/at91sam9263_matrix.h>
30 /* --------------------------------------------------------------------
32 * -------------------------------------------------------------------- */
34 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35 static u64 ohci_dmamask = 0xffffffffUL;
36 static struct at91_usbh_data usbh_data;
38 static struct resource usbh_resources[] = {
40 .start = AT91SAM9263_UHP_BASE,
41 .end = AT91SAM9263_UHP_BASE + SZ_1M - 1,
42 .flags = IORESOURCE_MEM,
45 .start = AT91SAM9263_ID_UHP,
46 .end = AT91SAM9263_ID_UHP,
47 .flags = IORESOURCE_IRQ,
51 static struct platform_device at91_usbh_device = {
55 .dma_mask = &ohci_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 .platform_data = &usbh_data,
59 .resource = usbh_resources,
60 .num_resources = ARRAY_SIZE(usbh_resources),
63 void __init at91_add_device_usbh(struct at91_usbh_data *data)
70 /* Enable VBus control for UHP ports */
71 for (i = 0; i < data->ports; i++) {
72 if (data->vbus_pin[i])
73 at91_set_gpio_output(data->vbus_pin[i], 0);
77 platform_device_register(&at91_usbh_device);
80 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
84 /* --------------------------------------------------------------------
86 * -------------------------------------------------------------------- */
88 #ifdef CONFIG_USB_GADGET_AT91
89 static struct at91_udc_data udc_data;
91 static struct resource udc_resources[] = {
93 .start = AT91SAM9263_BASE_UDP,
94 .end = AT91SAM9263_BASE_UDP + SZ_16K - 1,
95 .flags = IORESOURCE_MEM,
98 .start = AT91SAM9263_ID_UDP,
99 .end = AT91SAM9263_ID_UDP,
100 .flags = IORESOURCE_IRQ,
104 static struct platform_device at91_udc_device = {
108 .platform_data = &udc_data,
110 .resource = udc_resources,
111 .num_resources = ARRAY_SIZE(udc_resources),
114 void __init at91_add_device_udc(struct at91_udc_data *data)
119 if (data->vbus_pin) {
120 at91_set_gpio_input(data->vbus_pin, 0);
121 at91_set_deglitch(data->vbus_pin, 1);
124 /* Pullup pin is handled internally by USB device peripheral */
127 platform_device_register(&at91_udc_device);
130 void __init at91_add_device_udc(struct at91_udc_data *data) {}
134 /* --------------------------------------------------------------------
136 * -------------------------------------------------------------------- */
138 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
139 static u64 eth_dmamask = 0xffffffffUL;
140 static struct at91_eth_data eth_data;
142 static struct resource eth_resources[] = {
144 .start = AT91SAM9263_BASE_EMAC,
145 .end = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
146 .flags = IORESOURCE_MEM,
149 .start = AT91SAM9263_ID_EMAC,
150 .end = AT91SAM9263_ID_EMAC,
151 .flags = IORESOURCE_IRQ,
155 static struct platform_device at91sam9263_eth_device = {
159 .dma_mask = ð_dmamask,
160 .coherent_dma_mask = 0xffffffff,
161 .platform_data = ð_data,
163 .resource = eth_resources,
164 .num_resources = ARRAY_SIZE(eth_resources),
167 void __init at91_add_device_eth(struct at91_eth_data *data)
172 if (data->phy_irq_pin) {
173 at91_set_gpio_input(data->phy_irq_pin, 0);
174 at91_set_deglitch(data->phy_irq_pin, 1);
177 /* Pins used for MII and RMII */
178 at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
179 at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
180 at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
181 at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
182 at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
183 at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
184 at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
185 at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
186 at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
187 at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */
189 if (!data->is_rmii) {
190 at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
191 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
192 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
193 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
194 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
195 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
196 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
197 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
201 platform_device_register(&at91sam9263_eth_device);
204 void __init at91_add_device_eth(struct at91_eth_data *data) {}
208 /* --------------------------------------------------------------------
210 * -------------------------------------------------------------------- */
212 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
213 static u64 mmc_dmamask = 0xffffffffUL;
214 static struct at91_mmc_data mmc0_data, mmc1_data;
216 static struct resource mmc0_resources[] = {
218 .start = AT91SAM9263_BASE_MCI0,
219 .end = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
220 .flags = IORESOURCE_MEM,
223 .start = AT91SAM9263_ID_MCI0,
224 .end = AT91SAM9263_ID_MCI0,
225 .flags = IORESOURCE_IRQ,
229 static struct platform_device at91sam9263_mmc0_device = {
233 .dma_mask = &mmc_dmamask,
234 .coherent_dma_mask = 0xffffffff,
235 .platform_data = &mmc0_data,
237 .resource = mmc0_resources,
238 .num_resources = ARRAY_SIZE(mmc0_resources),
241 static struct resource mmc1_resources[] = {
243 .start = AT91SAM9263_BASE_MCI1,
244 .end = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
245 .flags = IORESOURCE_MEM,
248 .start = AT91SAM9263_ID_MCI1,
249 .end = AT91SAM9263_ID_MCI1,
250 .flags = IORESOURCE_IRQ,
254 static struct platform_device at91sam9263_mmc1_device = {
258 .dma_mask = &mmc_dmamask,
259 .coherent_dma_mask = 0xffffffff,
260 .platform_data = &mmc1_data,
262 .resource = mmc1_resources,
263 .num_resources = ARRAY_SIZE(mmc1_resources),
266 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
273 at91_set_gpio_input(data->det_pin, 1);
274 at91_set_deglitch(data->det_pin, 1);
277 at91_set_gpio_input(data->wp_pin, 1);
279 at91_set_gpio_output(data->vcc_pin, 0);
281 if (mmc_id == 0) { /* MCI0 */
283 at91_set_A_periph(AT91_PIN_PA12, 0);
287 at91_set_A_periph(AT91_PIN_PA16, 1);
289 /* DAT0, maybe DAT1..DAT3 */
290 at91_set_A_periph(AT91_PIN_PA17, 1);
292 at91_set_A_periph(AT91_PIN_PA18, 1);
293 at91_set_A_periph(AT91_PIN_PA19, 1);
294 at91_set_A_periph(AT91_PIN_PA20, 1);
298 at91_set_A_periph(AT91_PIN_PA1, 1);
300 /* DAT0, maybe DAT1..DAT3 */
301 at91_set_A_periph(AT91_PIN_PA0, 1);
303 at91_set_A_periph(AT91_PIN_PA3, 1);
304 at91_set_A_periph(AT91_PIN_PA4, 1);
305 at91_set_A_periph(AT91_PIN_PA5, 1);
310 at91_clock_associate("mci0_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
311 platform_device_register(&at91sam9263_mmc0_device);
314 at91_set_A_periph(AT91_PIN_PA6, 0);
318 at91_set_A_periph(AT91_PIN_PA21, 1);
320 /* DAT0, maybe DAT1..DAT3 */
321 at91_set_A_periph(AT91_PIN_PA22, 1);
323 at91_set_A_periph(AT91_PIN_PA23, 1);
324 at91_set_A_periph(AT91_PIN_PA24, 1);
325 at91_set_A_periph(AT91_PIN_PA25, 1);
329 at91_set_A_periph(AT91_PIN_PA7, 1);
331 /* DAT0, maybe DAT1..DAT3 */
332 at91_set_A_periph(AT91_PIN_PA8, 1);
334 at91_set_A_periph(AT91_PIN_PA9, 1);
335 at91_set_A_periph(AT91_PIN_PA10, 1);
336 at91_set_A_periph(AT91_PIN_PA11, 1);
341 at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
342 platform_device_register(&at91sam9263_mmc1_device);
346 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
350 /* --------------------------------------------------------------------
352 * -------------------------------------------------------------------- */
354 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
355 static struct at91_nand_data nand_data;
357 #define NAND_BASE AT91_CHIPSELECT_3
359 static struct resource nand_resources[] = {
362 .end = NAND_BASE + SZ_256M - 1,
363 .flags = IORESOURCE_MEM,
367 static struct platform_device at91sam9263_nand_device = {
371 .platform_data = &nand_data,
373 .resource = nand_resources,
374 .num_resources = ARRAY_SIZE(nand_resources),
377 void __init at91_add_device_nand(struct at91_nand_data *data)
379 unsigned long csa, mode;
384 csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
385 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC);
387 /* set the bus interface characteristics */
388 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
389 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
391 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
392 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
394 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
396 if (data->bus_width_16)
397 mode = AT91_SMC_DBW_16;
399 mode = AT91_SMC_DBW_8;
400 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
403 if (data->enable_pin)
404 at91_set_gpio_output(data->enable_pin, 1);
408 at91_set_gpio_input(data->rdy_pin, 1);
410 /* card detect pin */
412 at91_set_gpio_input(data->det_pin, 1);
415 platform_device_register(&at91sam9263_nand_device);
418 void __init at91_add_device_nand(struct at91_nand_data *data) {}
422 /* --------------------------------------------------------------------
424 * -------------------------------------------------------------------- */
427 * Prefer the GPIO code since the TWI controller isn't robust
428 * (gets overruns and underruns under load) and can only issue
429 * repeated STARTs in one scenario (the driver doesn't yet handle them).
431 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
433 static struct i2c_gpio_platform_data pdata = {
434 .sda_pin = AT91_PIN_PB4,
435 .sda_is_open_drain = 1,
436 .scl_pin = AT91_PIN_PB5,
437 .scl_is_open_drain = 1,
438 .udelay = 2, /* ~100 kHz */
441 static struct platform_device at91sam9263_twi_device = {
444 .dev.platform_data = &pdata,
447 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
449 at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */
450 at91_set_multi_drive(AT91_PIN_PB4, 1);
452 at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */
453 at91_set_multi_drive(AT91_PIN_PB5, 1);
455 i2c_register_board_info(0, devices, nr_devices);
456 platform_device_register(&at91sam9263_twi_device);
459 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
461 static struct resource twi_resources[] = {
463 .start = AT91SAM9263_BASE_TWI,
464 .end = AT91SAM9263_BASE_TWI + SZ_16K - 1,
465 .flags = IORESOURCE_MEM,
468 .start = AT91SAM9263_ID_TWI,
469 .end = AT91SAM9263_ID_TWI,
470 .flags = IORESOURCE_IRQ,
474 static struct platform_device at91sam9263_twi_device = {
477 .resource = twi_resources,
478 .num_resources = ARRAY_SIZE(twi_resources),
481 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
483 /* pins used for TWI interface */
484 at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
485 at91_set_multi_drive(AT91_PIN_PB4, 1);
487 at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
488 at91_set_multi_drive(AT91_PIN_PB5, 1);
490 i2c_register_board_info(0, devices, nr_devices);
491 platform_device_register(&at91sam9263_twi_device);
494 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
498 /* --------------------------------------------------------------------
500 * -------------------------------------------------------------------- */
502 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
503 static u64 spi_dmamask = 0xffffffffUL;
505 static struct resource spi0_resources[] = {
507 .start = AT91SAM9263_BASE_SPI0,
508 .end = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
509 .flags = IORESOURCE_MEM,
512 .start = AT91SAM9263_ID_SPI0,
513 .end = AT91SAM9263_ID_SPI0,
514 .flags = IORESOURCE_IRQ,
518 static struct platform_device at91sam9263_spi0_device = {
522 .dma_mask = &spi_dmamask,
523 .coherent_dma_mask = 0xffffffff,
525 .resource = spi0_resources,
526 .num_resources = ARRAY_SIZE(spi0_resources),
529 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
531 static struct resource spi1_resources[] = {
533 .start = AT91SAM9263_BASE_SPI1,
534 .end = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
535 .flags = IORESOURCE_MEM,
538 .start = AT91SAM9263_ID_SPI1,
539 .end = AT91SAM9263_ID_SPI1,
540 .flags = IORESOURCE_IRQ,
544 static struct platform_device at91sam9263_spi1_device = {
548 .dma_mask = &spi_dmamask,
549 .coherent_dma_mask = 0xffffffff,
551 .resource = spi1_resources,
552 .num_resources = ARRAY_SIZE(spi1_resources),
555 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
557 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
560 unsigned long cs_pin;
561 short enable_spi0 = 0;
562 short enable_spi1 = 0;
564 /* Choose SPI chip-selects */
565 for (i = 0; i < nr_devices; i++) {
566 if (devices[i].controller_data)
567 cs_pin = (unsigned long) devices[i].controller_data;
568 else if (devices[i].bus_num == 0)
569 cs_pin = spi0_standard_cs[devices[i].chip_select];
571 cs_pin = spi1_standard_cs[devices[i].chip_select];
573 if (devices[i].bus_num == 0)
578 /* enable chip-select pin */
579 at91_set_gpio_output(cs_pin, 1);
581 /* pass chip-select pin to driver */
582 devices[i].controller_data = (void *) cs_pin;
585 spi_register_board_info(devices, nr_devices);
587 /* Configure SPI bus(es) */
589 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
590 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
591 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
593 at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
594 platform_device_register(&at91sam9263_spi0_device);
597 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
598 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
599 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
601 at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
602 platform_device_register(&at91sam9263_spi1_device);
606 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
610 /* --------------------------------------------------------------------
612 * -------------------------------------------------------------------- */
614 #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
615 static u64 ac97_dmamask = 0xffffffffUL;
616 static struct atmel_ac97_data ac97_data;
618 static struct resource ac97_resources[] = {
620 .start = AT91SAM9263_BASE_AC97C,
621 .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
622 .flags = IORESOURCE_MEM,
625 .start = AT91SAM9263_ID_AC97C,
626 .end = AT91SAM9263_ID_AC97C,
627 .flags = IORESOURCE_IRQ,
631 static struct platform_device at91sam9263_ac97_device = {
635 .dma_mask = &ac97_dmamask,
636 .coherent_dma_mask = 0xffffffff,
637 .platform_data = &ac97_data,
639 .resource = ac97_resources,
640 .num_resources = ARRAY_SIZE(ac97_resources),
643 void __init at91_add_device_ac97(struct atmel_ac97_data *data)
648 at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */
649 at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */
650 at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */
651 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
655 at91_set_gpio_output(data->reset_pin, 0);
657 ac97_data = *ek_data;
658 platform_device_register(&at91sam9263_ac97_device);
661 void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
665 /* --------------------------------------------------------------------
667 * -------------------------------------------------------------------- */
669 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
670 static u64 lcdc_dmamask = 0xffffffffUL;
671 static struct atmel_lcdfb_info lcdc_data;
673 static struct resource lcdc_resources[] = {
675 .start = AT91SAM9263_LCDC_BASE,
676 .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
677 .flags = IORESOURCE_MEM,
680 .start = AT91SAM9263_ID_LCDC,
681 .end = AT91SAM9263_ID_LCDC,
682 .flags = IORESOURCE_IRQ,
686 static struct platform_device at91_lcdc_device = {
687 .name = "atmel_lcdfb",
690 .dma_mask = &lcdc_dmamask,
691 .coherent_dma_mask = 0xffffffff,
692 .platform_data = &lcdc_data,
694 .resource = lcdc_resources,
695 .num_resources = ARRAY_SIZE(lcdc_resources),
698 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
703 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
704 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
705 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
706 at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
707 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
708 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
709 at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
710 at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
711 at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
712 at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
713 at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
714 at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
715 at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
716 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
717 at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
718 at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
719 at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
720 at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
721 at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
722 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
723 at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
724 at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
727 platform_device_register(&at91_lcdc_device);
730 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
734 /* --------------------------------------------------------------------
736 * -------------------------------------------------------------------- */
738 #if defined(CONFIG_LEDS)
742 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
744 /* Enable GPIO to access the LEDs */
745 at91_set_gpio_output(cpu_led, 1);
746 at91_set_gpio_output(timer_led, 1);
748 at91_leds_cpu = cpu_led;
749 at91_leds_timer = timer_led;
752 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
756 /* --------------------------------------------------------------------
758 * -------------------------------------------------------------------- */
760 #if defined(CONFIG_SERIAL_ATMEL)
762 static struct resource dbgu_resources[] = {
764 .start = AT91_VA_BASE_SYS + AT91_DBGU,
765 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
766 .flags = IORESOURCE_MEM,
769 .start = AT91_ID_SYS,
771 .flags = IORESOURCE_IRQ,
775 static struct atmel_uart_data dbgu_data = {
777 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
778 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
781 static struct platform_device at91sam9263_dbgu_device = {
782 .name = "atmel_usart",
785 .platform_data = &dbgu_data,
786 .coherent_dma_mask = 0xffffffff,
788 .resource = dbgu_resources,
789 .num_resources = ARRAY_SIZE(dbgu_resources),
792 static inline void configure_dbgu_pins(void)
794 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
795 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
798 static struct resource uart0_resources[] = {
800 .start = AT91SAM9263_BASE_US0,
801 .end = AT91SAM9263_BASE_US0 + SZ_16K - 1,
802 .flags = IORESOURCE_MEM,
805 .start = AT91SAM9263_ID_US0,
806 .end = AT91SAM9263_ID_US0,
807 .flags = IORESOURCE_IRQ,
811 static struct atmel_uart_data uart0_data = {
816 static struct platform_device at91sam9263_uart0_device = {
817 .name = "atmel_usart",
820 .platform_data = &uart0_data,
821 .coherent_dma_mask = 0xffffffff,
823 .resource = uart0_resources,
824 .num_resources = ARRAY_SIZE(uart0_resources),
827 static inline void configure_usart0_pins(void)
829 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
830 at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
831 at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */
832 at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */
835 static struct resource uart1_resources[] = {
837 .start = AT91SAM9263_BASE_US1,
838 .end = AT91SAM9263_BASE_US1 + SZ_16K - 1,
839 .flags = IORESOURCE_MEM,
842 .start = AT91SAM9263_ID_US1,
843 .end = AT91SAM9263_ID_US1,
844 .flags = IORESOURCE_IRQ,
848 static struct atmel_uart_data uart1_data = {
853 static struct platform_device at91sam9263_uart1_device = {
854 .name = "atmel_usart",
857 .platform_data = &uart1_data,
858 .coherent_dma_mask = 0xffffffff,
860 .resource = uart1_resources,
861 .num_resources = ARRAY_SIZE(uart1_resources),
864 static inline void configure_usart1_pins(void)
866 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
867 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
868 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
869 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
872 static struct resource uart2_resources[] = {
874 .start = AT91SAM9263_BASE_US2,
875 .end = AT91SAM9263_BASE_US2 + SZ_16K - 1,
876 .flags = IORESOURCE_MEM,
879 .start = AT91SAM9263_ID_US2,
880 .end = AT91SAM9263_ID_US2,
881 .flags = IORESOURCE_IRQ,
885 static struct atmel_uart_data uart2_data = {
890 static struct platform_device at91sam9263_uart2_device = {
891 .name = "atmel_usart",
894 .platform_data = &uart2_data,
895 .coherent_dma_mask = 0xffffffff,
897 .resource = uart2_resources,
898 .num_resources = ARRAY_SIZE(uart2_resources),
901 static inline void configure_usart2_pins(void)
903 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
904 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
905 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
906 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
909 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
910 struct platform_device *atmel_default_console_device; /* the serial console device */
912 void __init at91_init_serial(struct at91_uart_config *config)
916 /* Fill in list of supported UARTs */
917 for (i = 0; i < config->nr_tty; i++) {
918 switch (config->tty_map[i]) {
920 configure_usart0_pins();
921 at91_uarts[i] = &at91sam9263_uart0_device;
922 at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart");
925 configure_usart1_pins();
926 at91_uarts[i] = &at91sam9263_uart1_device;
927 at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart");
930 configure_usart2_pins();
931 at91_uarts[i] = &at91sam9263_uart2_device;
932 at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart");
935 configure_dbgu_pins();
936 at91_uarts[i] = &at91sam9263_dbgu_device;
937 at91_clock_associate("mck", &at91sam9263_dbgu_device.dev, "usart");
942 at91_uarts[i]->id = i; /* update ID number to mapped ID */
945 /* Set serial console device */
946 if (config->console_tty < ATMEL_MAX_UART)
947 atmel_default_console_device = at91_uarts[config->console_tty];
948 if (!atmel_default_console_device)
949 printk(KERN_INFO "AT91: No default serial console defined.\n");
952 void __init at91_add_device_serial(void)
956 for (i = 0; i < ATMEL_MAX_UART; i++) {
958 platform_device_register(at91_uarts[i]);
962 void __init at91_init_serial(struct at91_uart_config *config) {}
963 void __init at91_add_device_serial(void) {}
967 /* -------------------------------------------------------------------- */
969 * These devices are always present and don't need any board-specific
972 static int __init at91_add_standard_devices(void)
977 arch_initcall(at91_add_standard_devices);