arch/arm/mach-at91/at91sam9rl_devices.c

   1 /*
   2  *  Copyright (C) 2007 Atmel Corporation
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file COPYING in the main directory of this archive for
   6  * more details.
   7  */
   8
   9 #include <asm/mach/arch.h>
  10 #include <asm/mach/map.h>
  11
  12 #include <linux/dma-mapping.h>
  13 #include <linux/gpio.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/i2c-gpio.h>
  16
  17 #include <linux/fb.h>
  18 #include <video/atmel_lcdc.h>
  19
  20 #include <mach/board.h>
  21 #include <mach/at91sam9rl.h>
  22 #include <mach/at91sam9rl_matrix.h>
  23 #include <mach/at91sam9_smc.h>
  24 #include <mach/at_hdmac.h>
  25
  26 #include "generic.h"
  27
  28
  29 /* --------------------------------------------------------------------
  30  *  HDMAC - AHB DMA Controller
  31  * -------------------------------------------------------------------- */
  32
  33 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
  34 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
  35
  36 static struct resource hdmac_resources[] = {
  37         [0] = {
  38                 .start  = AT91SAM9RL_BASE_DMA,
  39                 .end    = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
  40                 .flags  = IORESOURCE_MEM,
  41         },
  42         [2] = {
  43                 .start  = AT91SAM9RL_ID_DMA,
  44                 .end    = AT91SAM9RL_ID_DMA,
  45                 .flags  = IORESOURCE_IRQ,
  46         },
  47 };
  48
  49 static struct platform_device at_hdmac_device = {
  50         .name           = "at91sam9rl_dma",
  51         .id             = -1,
  52         .dev            = {
  53                                 .dma_mask               = &hdmac_dmamask,
  54                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  55         },
  56         .resource       = hdmac_resources,
  57         .num_resources  = ARRAY_SIZE(hdmac_resources),
  58 };
  59
  60 void __init at91_add_device_hdmac(void)
  61 {
  62         platform_device_register(&at_hdmac_device);
  63 }
  64 #else
  65 void __init at91_add_device_hdmac(void) {}
  66 #endif
  67
  68 /* --------------------------------------------------------------------
  69  *  USB HS Device (Gadget)
  70  * -------------------------------------------------------------------- */
  71
  72 #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
  73
  74 static struct resource usba_udc_resources[] = {
  75         [0] = {
  76                 .start  = AT91SAM9RL_UDPHS_FIFO,
  77                 .end    = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
  78                 .flags  = IORESOURCE_MEM,
  79         },
  80         [1] = {
  81                 .start  = AT91SAM9RL_BASE_UDPHS,
  82                 .end    = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
  83                 .flags  = IORESOURCE_MEM,
  84         },
  85         [2] = {
  86                 .start  = AT91SAM9RL_ID_UDPHS,
  87                 .end    = AT91SAM9RL_ID_UDPHS,
  88                 .flags  = IORESOURCE_IRQ,
  89         },
  90 };
  91
  92 #define EP(nam, idx, maxpkt, maxbk, dma, isoc)                  \
  93         [idx] = {                                               \
  94                 .name           = nam,                          \
  95                 .index          = idx,                          \
  96                 .fifo_size      = maxpkt,                       \
  97                 .nr_banks       = maxbk,                        \
  98                 .can_dma        = dma,                          \
  99                 .can_isoc       = isoc,                         \
 100         }
 101
 102 static struct usba_ep_data usba_udc_ep[] __initdata = {
 103         EP("ep0", 0, 64, 1, 0, 0),
 104         EP("ep1", 1, 1024, 2, 1, 1),
 105         EP("ep2", 2, 1024, 2, 1, 1),
 106         EP("ep3", 3, 1024, 3, 1, 0),
 107         EP("ep4", 4, 1024, 3, 1, 0),
 108         EP("ep5", 5, 1024, 3, 1, 1),
 109         EP("ep6", 6, 1024, 3, 1, 1),
 110 };
 111
 112 #undef EP
 113
 114 /*
 115  * pdata doesn't have room for any endpoints, so we need to
 116  * append room for the ones we need right after it.
 117  */
 118 static struct {
 119         struct usba_platform_data pdata;
 120         struct usba_ep_data ep[7];
 121 } usba_udc_data;
 122
 123 static struct platform_device at91_usba_udc_device = {
 124         .name           = "atmel_usba_udc",
 125         .id             = -1,
 126         .dev            = {
 127                                 .platform_data  = &usba_udc_data.pdata,
 128         },
 129         .resource       = usba_udc_resources,
 130         .num_resources  = ARRAY_SIZE(usba_udc_resources),
 131 };
 132
 133 void __init at91_add_device_usba(struct usba_platform_data *data)
 134 {
 135         /*
 136          * Invalid pins are 0 on AT91, but the usba driver is shared
 137          * with AVR32, which use negative values instead. Once/if
 138          * gpio_is_valid() is ported to AT91, revisit this code.
 139          */
 140         usba_udc_data.pdata.vbus_pin = -EINVAL;
 141         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
 142         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
 143
 144         if (data && gpio_is_valid(data->vbus_pin)) {
 145                 at91_set_gpio_input(data->vbus_pin, 0);
 146                 at91_set_deglitch(data->vbus_pin, 1);
 147                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
 148         }
 149
 150         /* Pullup pin is handled internally by USB device peripheral */
 151
 152         platform_device_register(&at91_usba_udc_device);
 153 }
 154 #else
 155 void __init at91_add_device_usba(struct usba_platform_data *data) {}
 156 #endif
 157
 158
 159 /* --------------------------------------------------------------------
 160  *  MMC / SD
 161  * -------------------------------------------------------------------- */
 162
 163 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 164 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 165 static struct at91_mmc_data mmc_data;
 166
 167 static struct resource mmc_resources[] = {
 168         [0] = {
 169                 .start  = AT91SAM9RL_BASE_MCI,
 170                 .end    = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
 171                 .flags  = IORESOURCE_MEM,
 172         },
 173         [1] = {
 174                 .start  = AT91SAM9RL_ID_MCI,
 175                 .end    = AT91SAM9RL_ID_MCI,
 176                 .flags  = IORESOURCE_IRQ,
 177         },
 178 };
 179
 180 static struct platform_device at91sam9rl_mmc_device = {
 181         .name           = "at91_mci",
 182         .id             = -1,
 183         .dev            = {
 184                                 .dma_mask               = &mmc_dmamask,
 185                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 186                                 .platform_data          = &mmc_data,
 187         },
 188         .resource       = mmc_resources,
 189         .num_resources  = ARRAY_SIZE(mmc_resources),
 190 };
 191
 192 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 193 {
 194         if (!data)
 195                 return;
 196
 197         /* input/irq */
 198         if (gpio_is_valid(data->det_pin)) {
 199                 at91_set_gpio_input(data->det_pin, 1);
 200                 at91_set_deglitch(data->det_pin, 1);
 201         }
 202         if (gpio_is_valid(data->wp_pin))
 203                 at91_set_gpio_input(data->wp_pin, 1);
 204         if (gpio_is_valid(data->vcc_pin))
 205                 at91_set_gpio_output(data->vcc_pin, 0);
 206
 207         /* CLK */
 208         at91_set_A_periph(AT91_PIN_PA2, 0);
 209
 210         /* CMD */
 211         at91_set_A_periph(AT91_PIN_PA1, 1);
 212
 213         /* DAT0, maybe DAT1..DAT3 */
 214         at91_set_A_periph(AT91_PIN_PA0, 1);
 215         if (data->wire4) {
 216                 at91_set_A_periph(AT91_PIN_PA3, 1);
 217                 at91_set_A_periph(AT91_PIN_PA4, 1);
 218                 at91_set_A_periph(AT91_PIN_PA5, 1);
 219         }
 220
 221         mmc_data = *data;
 222         platform_device_register(&at91sam9rl_mmc_device);
 223 }
 224 #else
 225 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 226 #endif
 227
 228
 229 /* --------------------------------------------------------------------
 230  *  NAND / SmartMedia
 231  * -------------------------------------------------------------------- */
 232
 233 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 234 static struct atmel_nand_data nand_data;
 235
 236 #define NAND_BASE       AT91_CHIPSELECT_3
 237
 238 static struct resource nand_resources[] = {
 239         [0] = {
 240                 .start  = NAND_BASE,
 241                 .end    = NAND_BASE + SZ_256M - 1,
 242                 .flags  = IORESOURCE_MEM,
 243         },
 244         [1] = {
 245                 .start  = AT91SAM9RL_BASE_ECC,
 246                 .end    = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
 247                 .flags  = IORESOURCE_MEM,
 248         }
 249 };
 250
 251 static struct platform_device atmel_nand_device = {
 252         .name           = "atmel_nand",
 253         .id             = -1,
 254         .dev            = {
 255                                 .platform_data  = &nand_data,
 256         },
 257         .resource       = nand_resources,
 258         .num_resources  = ARRAY_SIZE(nand_resources),
 259 };
 260
 261 void __init at91_add_device_nand(struct atmel_nand_data *data)
 262 {
 263         unsigned long csa;
 264
 265         if (!data)
 266                 return;
 267
 268         csa = at91_sys_read(AT91_MATRIX_EBICSA);
 269         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 270
 271         /* enable pin */
 272         if (gpio_is_valid(data->enable_pin))
 273                 at91_set_gpio_output(data->enable_pin, 1);
 274
 275         /* ready/busy pin */
 276         if (gpio_is_valid(data->rdy_pin))
 277                 at91_set_gpio_input(data->rdy_pin, 1);
 278
 279         /* card detect pin */
 280         if (gpio_is_valid(data->det_pin))
 281                 at91_set_gpio_input(data->det_pin, 1);
 282
 283         at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
 284         at91_set_A_periph(AT91_PIN_PB5, 0);             /* NANDWE */
 285
 286         nand_data = *data;
 287         platform_device_register(&atmel_nand_device);
 288 }
 289
 290 #else
 291 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 292 #endif
 293
 294
 295 /* --------------------------------------------------------------------
 296  *  TWI (i2c)
 297  * -------------------------------------------------------------------- */
 298
 299 /*
 300  * Prefer the GPIO code since the TWI controller isn't robust
 301  * (gets overruns and underruns under load) and can only issue
 302  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 303  */
 304 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 305
 306 static struct i2c_gpio_platform_data pdata = {
 307         .sda_pin                = AT91_PIN_PA23,
 308         .sda_is_open_drain      = 1,
 309         .scl_pin                = AT91_PIN_PA24,
 310         .scl_is_open_drain      = 1,
 311         .udelay                 = 2,            /* ~100 kHz */
 312 };
 313
 314 static struct platform_device at91sam9rl_twi_device = {
 315         .name                   = "i2c-gpio",
 316         .id                     = -1,
 317         .dev.platform_data      = &pdata,
 318 };
 319
 320 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 321 {
 322         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
 323         at91_set_multi_drive(AT91_PIN_PA23, 1);
 324
 325         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
 326         at91_set_multi_drive(AT91_PIN_PA24, 1);
 327
 328         i2c_register_board_info(0, devices, nr_devices);
 329         platform_device_register(&at91sam9rl_twi_device);
 330 }
 331
 332 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 333
 334 static struct resource twi_resources[] = {
 335         [0] = {
 336                 .start  = AT91SAM9RL_BASE_TWI0,
 337                 .end    = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
 338                 .flags  = IORESOURCE_MEM,
 339         },
 340         [1] = {
 341                 .start  = AT91SAM9RL_ID_TWI0,
 342                 .end    = AT91SAM9RL_ID_TWI0,
 343                 .flags  = IORESOURCE_IRQ,
 344         },
 345 };
 346
 347 static struct platform_device at91sam9rl_twi_device = {
 348         .name           = "at91_i2c",
 349         .id             = -1,
 350         .resource       = twi_resources,
 351         .num_resources  = ARRAY_SIZE(twi_resources),
 352 };
 353
 354 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 355 {
 356         /* pins used for TWI interface */
 357         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 358         at91_set_multi_drive(AT91_PIN_PA23, 1);
 359
 360         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 361         at91_set_multi_drive(AT91_PIN_PA24, 1);
 362
 363         i2c_register_board_info(0, devices, nr_devices);
 364         platform_device_register(&at91sam9rl_twi_device);
 365 }
 366 #else
 367 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 368 #endif
 369
 370
 371 /* --------------------------------------------------------------------
 372  *  SPI
 373  * -------------------------------------------------------------------- */
 374
 375 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 376 static u64 spi_dmamask = DMA_BIT_MASK(32);
 377
 378 static struct resource spi_resources[] = {
 379         [0] = {
 380                 .start  = AT91SAM9RL_BASE_SPI,
 381                 .end    = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
 382                 .flags  = IORESOURCE_MEM,
 383         },
 384         [1] = {
 385                 .start  = AT91SAM9RL_ID_SPI,
 386                 .end    = AT91SAM9RL_ID_SPI,
 387                 .flags  = IORESOURCE_IRQ,
 388         },
 389 };
 390
 391 static struct platform_device at91sam9rl_spi_device = {
 392         .name           = "atmel_spi",
 393         .id             = 0,
 394         .dev            = {
 395                                 .dma_mask               = &spi_dmamask,
 396                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 397         },
 398         .resource       = spi_resources,
 399         .num_resources  = ARRAY_SIZE(spi_resources),
 400 };
 401
 402 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
 403
 404
 405 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 406 {
 407         int i;
 408         unsigned long cs_pin;
 409
 410         at91_set_A_periph(AT91_PIN_PA25, 0);    /* MISO */
 411         at91_set_A_periph(AT91_PIN_PA26, 0);    /* MOSI */
 412         at91_set_A_periph(AT91_PIN_PA27, 0);    /* SPCK */
 413
 414         /* Enable SPI chip-selects */
 415         for (i = 0; i < nr_devices; i++) {
 416                 if (devices[i].controller_data)
 417                         cs_pin = (unsigned long) devices[i].controller_data;
 418                 else
 419                         cs_pin = spi_standard_cs[devices[i].chip_select];
 420
 421                 /* enable chip-select pin */
 422                 at91_set_gpio_output(cs_pin, 1);
 423
 424                 /* pass chip-select pin to driver */
 425                 devices[i].controller_data = (void *) cs_pin;
 426         }
 427
 428         spi_register_board_info(devices, nr_devices);
 429         platform_device_register(&at91sam9rl_spi_device);
 430 }
 431 #else
 432 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 433 #endif
 434
 435
 436 /* --------------------------------------------------------------------
 437  *  AC97
 438  * -------------------------------------------------------------------- */
 439
 440 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
 441 static u64 ac97_dmamask = DMA_BIT_MASK(32);
 442 static struct ac97c_platform_data ac97_data;
 443
 444 static struct resource ac97_resources[] = {
 445         [0] = {
 446                 .start  = AT91SAM9RL_BASE_AC97C,
 447                 .end    = AT91SAM9RL_BASE_AC97C + SZ_16K - 1,
 448                 .flags  = IORESOURCE_MEM,
 449         },
 450         [1] = {
 451                 .start  = AT91SAM9RL_ID_AC97C,
 452                 .end    = AT91SAM9RL_ID_AC97C,
 453                 .flags  = IORESOURCE_IRQ,
 454         },
 455 };
 456
 457 static struct platform_device at91sam9rl_ac97_device = {
 458         .name           = "atmel_ac97c",
 459         .id             = 0,
 460         .dev            = {
 461                                 .dma_mask               = &ac97_dmamask,
 462                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 463                                 .platform_data          = &ac97_data,
 464         },
 465         .resource       = ac97_resources,
 466         .num_resources  = ARRAY_SIZE(ac97_resources),
 467 };
 468
 469 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 470 {
 471         if (!data)
 472                 return;
 473
 474         at91_set_A_periph(AT91_PIN_PD1, 0);     /* AC97FS */
 475         at91_set_A_periph(AT91_PIN_PD2, 0);     /* AC97CK */
 476         at91_set_A_periph(AT91_PIN_PD3, 0);     /* AC97TX */
 477         at91_set_A_periph(AT91_PIN_PD4, 0);     /* AC97RX */
 478
 479         /* reset */
 480         if (gpio_is_valid(data->reset_pin))
 481                 at91_set_gpio_output(data->reset_pin, 0);
 482
 483         ac97_data = *data;
 484         platform_device_register(&at91sam9rl_ac97_device);
 485 }
 486 #else
 487 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 488 #endif
 489
 490
 491 /* --------------------------------------------------------------------
 492  *  LCD Controller
 493  * -------------------------------------------------------------------- */
 494
 495 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 496 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 497 static struct atmel_lcdfb_info lcdc_data;
 498
 499 static struct resource lcdc_resources[] = {
 500         [0] = {
 501                 .start  = AT91SAM9RL_LCDC_BASE,
 502                 .end    = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
 503                 .flags  = IORESOURCE_MEM,
 504         },
 505         [1] = {
 506                 .start  = AT91SAM9RL_ID_LCDC,
 507                 .end    = AT91SAM9RL_ID_LCDC,
 508                 .flags  = IORESOURCE_IRQ,
 509         },
 510 };
 511
 512 static struct platform_device at91_lcdc_device = {
 513         .name           = "atmel_lcdfb",
 514         .id             = 0,
 515         .dev            = {
 516                                 .dma_mask               = &lcdc_dmamask,
 517                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 518                                 .platform_data          = &lcdc_data,
 519         },
 520         .resource       = lcdc_resources,
 521         .num_resources  = ARRAY_SIZE(lcdc_resources),
 522 };
 523
 524 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 525 {
 526         if (!data) {
 527                 return;
 528         }
 529
 530         at91_set_B_periph(AT91_PIN_PC1, 0);     /* LCDPWR */
 531         at91_set_A_periph(AT91_PIN_PC5, 0);     /* LCDHSYNC */
 532         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDDOTCK */
 533         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDDEN */
 534         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDCC */
 535         at91_set_B_periph(AT91_PIN_PC9, 0);     /* LCDD3 */
 536         at91_set_B_periph(AT91_PIN_PC10, 0);    /* LCDD4 */
 537         at91_set_B_periph(AT91_PIN_PC11, 0);    /* LCDD5 */
 538         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD6 */
 539         at91_set_B_periph(AT91_PIN_PC13, 0);    /* LCDD7 */
 540         at91_set_B_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 541         at91_set_B_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 542         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
 543         at91_set_B_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 544         at91_set_B_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 545         at91_set_B_periph(AT91_PIN_PC20, 0);    /* LCDD18 */
 546         at91_set_B_periph(AT91_PIN_PC21, 0);    /* LCDD19 */
 547         at91_set_B_periph(AT91_PIN_PC22, 0);    /* LCDD20 */
 548         at91_set_B_periph(AT91_PIN_PC23, 0);    /* LCDD21 */
 549         at91_set_B_periph(AT91_PIN_PC24, 0);    /* LCDD22 */
 550         at91_set_B_periph(AT91_PIN_PC25, 0);    /* LCDD23 */
 551
 552         lcdc_data = *data;
 553         platform_device_register(&at91_lcdc_device);
 554 }
 555 #else
 556 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 557 #endif
 558
 559
 560 /* --------------------------------------------------------------------
 561  *  Timer/Counter block
 562  * -------------------------------------------------------------------- */
 563
 564 #ifdef CONFIG_ATMEL_TCLIB
 565
 566 static struct resource tcb_resources[] = {
 567         [0] = {
 568                 .start  = AT91SAM9RL_BASE_TCB0,
 569                 .end    = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
 570                 .flags  = IORESOURCE_MEM,
 571         },
 572         [1] = {
 573                 .start  = AT91SAM9RL_ID_TC0,
 574                 .end    = AT91SAM9RL_ID_TC0,
 575                 .flags  = IORESOURCE_IRQ,
 576         },
 577         [2] = {
 578                 .start  = AT91SAM9RL_ID_TC1,
 579                 .end    = AT91SAM9RL_ID_TC1,
 580                 .flags  = IORESOURCE_IRQ,
 581         },
 582         [3] = {
 583                 .start  = AT91SAM9RL_ID_TC2,
 584                 .end    = AT91SAM9RL_ID_TC2,
 585                 .flags  = IORESOURCE_IRQ,
 586         },
 587 };
 588
 589 static struct platform_device at91sam9rl_tcb_device = {
 590         .name           = "atmel_tcb",
 591         .id             = 0,
 592         .resource       = tcb_resources,
 593         .num_resources  = ARRAY_SIZE(tcb_resources),
 594 };
 595
 596 static void __init at91_add_device_tc(void)
 597 {
 598         platform_device_register(&at91sam9rl_tcb_device);
 599 }
 600 #else
 601 static void __init at91_add_device_tc(void) { }
 602 #endif
 603
 604
 605 /* --------------------------------------------------------------------
 606  *  Touchscreen
 607  * -------------------------------------------------------------------- */
 608
 609 #if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
 610 static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
 611 static struct at91_tsadcc_data tsadcc_data;
 612
 613 static struct resource tsadcc_resources[] = {
 614         [0] = {
 615                 .start  = AT91SAM9RL_BASE_TSC,
 616                 .end    = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
 617                 .flags  = IORESOURCE_MEM,
 618         },
 619         [1] = {
 620                 .start  = AT91SAM9RL_ID_TSC,
 621                 .end    = AT91SAM9RL_ID_TSC,
 622                 .flags  = IORESOURCE_IRQ,
 623         }
 624 };
 625
 626 static struct platform_device at91sam9rl_tsadcc_device = {
 627         .name           = "atmel_tsadcc",
 628         .id             = -1,
 629         .dev            = {
 630                                 .dma_mask               = &tsadcc_dmamask,
 631                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 632                                 .platform_data          = &tsadcc_data,
 633         },
 634         .resource       = tsadcc_resources,
 635         .num_resources  = ARRAY_SIZE(tsadcc_resources),
 636 };
 637
 638 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data)
 639 {
 640         if (!data)
 641                 return;
 642
 643         at91_set_A_periph(AT91_PIN_PA17, 0);    /* AD0_XR */
 644         at91_set_A_periph(AT91_PIN_PA18, 0);    /* AD1_XL */
 645         at91_set_A_periph(AT91_PIN_PA19, 0);    /* AD2_YT */
 646         at91_set_A_periph(AT91_PIN_PA20, 0);    /* AD3_TB */
 647
 648         tsadcc_data = *data;
 649         platform_device_register(&at91sam9rl_tsadcc_device);
 650 }
 651 #else
 652 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
 653 #endif
 654
 655
 656 /* --------------------------------------------------------------------
 657  *  RTC
 658  * -------------------------------------------------------------------- */
 659
 660 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
 661 static struct platform_device at91sam9rl_rtc_device = {
 662         .name           = "at91_rtc",
 663         .id             = -1,
 664         .num_resources  = 0,
 665 };
 666
 667 static void __init at91_add_device_rtc(void)
 668 {
 669         platform_device_register(&at91sam9rl_rtc_device);
 670 }
 671 #else
 672 static void __init at91_add_device_rtc(void) {}
 673 #endif
 674
 675
 676 /* --------------------------------------------------------------------
 677  *  RTT
 678  * -------------------------------------------------------------------- */
 679
 680 static struct resource rtt_resources[] = {
 681         {
 682                 .start  = AT91SAM9RL_BASE_RTT,
 683                 .end    = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
 684                 .flags  = IORESOURCE_MEM,
 685         }
 686 };
 687
 688 static struct platform_device at91sam9rl_rtt_device = {
 689         .name           = "at91_rtt",
 690         .id             = 0,
 691         .resource       = rtt_resources,
 692         .num_resources  = ARRAY_SIZE(rtt_resources),
 693 };
 694
 695 static void __init at91_add_device_rtt(void)
 696 {
 697         platform_device_register(&at91sam9rl_rtt_device);
 698 }
 699
 700
 701 /* --------------------------------------------------------------------
 702  *  Watchdog
 703  * -------------------------------------------------------------------- */
 704
 705 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
 706 static struct resource wdt_resources[] = {
 707         {
 708                 .start  = AT91SAM9RL_BASE_WDT,
 709                 .end    = AT91SAM9RL_BASE_WDT + SZ_16 - 1,
 710                 .flags  = IORESOURCE_MEM,
 711         }
 712 };
 713
 714 static struct platform_device at91sam9rl_wdt_device = {
 715         .name           = "at91_wdt",
 716         .id             = -1,
 717         .resource       = wdt_resources,
 718         .num_resources  = ARRAY_SIZE(wdt_resources),
 719 };
 720
 721 static void __init at91_add_device_watchdog(void)
 722 {
 723         platform_device_register(&at91sam9rl_wdt_device);
 724 }
 725 #else
 726 static void __init at91_add_device_watchdog(void) {}
 727 #endif
 728
 729
 730 /* --------------------------------------------------------------------
 731  *  PWM
 732  * --------------------------------------------------------------------*/
 733
 734 #if defined(CONFIG_ATMEL_PWM)
 735 static u32 pwm_mask;
 736
 737 static struct resource pwm_resources[] = {
 738         [0] = {
 739                 .start  = AT91SAM9RL_BASE_PWMC,
 740                 .end    = AT91SAM9RL_BASE_PWMC + SZ_16K - 1,
 741                 .flags  = IORESOURCE_MEM,
 742         },
 743         [1] = {
 744                 .start  = AT91SAM9RL_ID_PWMC,
 745                 .end    = AT91SAM9RL_ID_PWMC,
 746                 .flags  = IORESOURCE_IRQ,
 747         },
 748 };
 749
 750 static struct platform_device at91sam9rl_pwm0_device = {
 751         .name   = "atmel_pwm",
 752         .id     = -1,
 753         .dev    = {
 754                 .platform_data          = &pwm_mask,
 755         },
 756         .resource       = pwm_resources,
 757         .num_resources  = ARRAY_SIZE(pwm_resources),
 758 };
 759
 760 void __init at91_add_device_pwm(u32 mask)
 761 {
 762         if (mask & (1 << AT91_PWM0))
 763                 at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM0 */
 764
 765         if (mask & (1 << AT91_PWM1))
 766                 at91_set_B_periph(AT91_PIN_PB9, 1);     /* enable PWM1 */
 767
 768         if (mask & (1 << AT91_PWM2))
 769                 at91_set_B_periph(AT91_PIN_PD5, 1);     /* enable PWM2 */
 770
 771         if (mask & (1 << AT91_PWM3))
 772                 at91_set_B_periph(AT91_PIN_PD8, 1);     /* enable PWM3 */
 773
 774         pwm_mask = mask;
 775
 776         platform_device_register(&at91sam9rl_pwm0_device);
 777 }
 778 #else
 779 void __init at91_add_device_pwm(u32 mask) {}
 780 #endif
 781
 782
 783 /* --------------------------------------------------------------------
 784  *  SSC -- Synchronous Serial Controller
 785  * -------------------------------------------------------------------- */
 786
 787 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 788 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 789
 790 static struct resource ssc0_resources[] = {
 791         [0] = {
 792                 .start  = AT91SAM9RL_BASE_SSC0,
 793                 .end    = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1,
 794                 .flags  = IORESOURCE_MEM,
 795         },
 796         [1] = {
 797                 .start  = AT91SAM9RL_ID_SSC0,
 798                 .end    = AT91SAM9RL_ID_SSC0,
 799                 .flags  = IORESOURCE_IRQ,
 800         },
 801 };
 802
 803 static struct platform_device at91sam9rl_ssc0_device = {
 804         .name   = "ssc",
 805         .id     = 0,
 806         .dev    = {
 807                 .dma_mask               = &ssc0_dmamask,
 808                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 809         },
 810         .resource       = ssc0_resources,
 811         .num_resources  = ARRAY_SIZE(ssc0_resources),
 812 };
 813
 814 static inline void configure_ssc0_pins(unsigned pins)
 815 {
 816         if (pins & ATMEL_SSC_TF)
 817                 at91_set_A_periph(AT91_PIN_PC0, 1);
 818         if (pins & ATMEL_SSC_TK)
 819                 at91_set_A_periph(AT91_PIN_PC1, 1);
 820         if (pins & ATMEL_SSC_TD)
 821                 at91_set_A_periph(AT91_PIN_PA15, 1);
 822         if (pins & ATMEL_SSC_RD)
 823                 at91_set_A_periph(AT91_PIN_PA16, 1);
 824         if (pins & ATMEL_SSC_RK)
 825                 at91_set_B_periph(AT91_PIN_PA10, 1);
 826         if (pins & ATMEL_SSC_RF)
 827                 at91_set_B_periph(AT91_PIN_PA22, 1);
 828 }
 829
 830 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 831
 832 static struct resource ssc1_resources[] = {
 833         [0] = {
 834                 .start  = AT91SAM9RL_BASE_SSC1,
 835                 .end    = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1,
 836                 .flags  = IORESOURCE_MEM,
 837         },
 838         [1] = {
 839                 .start  = AT91SAM9RL_ID_SSC1,
 840                 .end    = AT91SAM9RL_ID_SSC1,
 841                 .flags  = IORESOURCE_IRQ,
 842         },
 843 };
 844
 845 static struct platform_device at91sam9rl_ssc1_device = {
 846         .name   = "ssc",
 847         .id     = 1,
 848         .dev    = {
 849                 .dma_mask               = &ssc1_dmamask,
 850                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 851         },
 852         .resource       = ssc1_resources,
 853         .num_resources  = ARRAY_SIZE(ssc1_resources),
 854 };
 855
 856 static inline void configure_ssc1_pins(unsigned pins)
 857 {
 858         if (pins & ATMEL_SSC_TF)
 859                 at91_set_B_periph(AT91_PIN_PA29, 1);
 860         if (pins & ATMEL_SSC_TK)
 861                 at91_set_B_periph(AT91_PIN_PA30, 1);
 862         if (pins & ATMEL_SSC_TD)
 863                 at91_set_B_periph(AT91_PIN_PA13, 1);
 864         if (pins & ATMEL_SSC_RD)
 865                 at91_set_B_periph(AT91_PIN_PA14, 1);
 866         if (pins & ATMEL_SSC_RK)
 867                 at91_set_B_periph(AT91_PIN_PA9, 1);
 868         if (pins & ATMEL_SSC_RF)
 869                 at91_set_B_periph(AT91_PIN_PA8, 1);
 870 }
 871
 872 /*
 873  * SSC controllers are accessed through library code, instead of any
 874  * kind of all-singing/all-dancing driver.  For example one could be
 875  * used by a particular I2S audio codec's driver, while another one
 876  * on the same system might be used by a custom data capture driver.
 877  */
 878 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 879 {
 880         struct platform_device *pdev;
 881
 882         /*
 883          * NOTE: caller is responsible for passing information matching
 884          * "pins" to whatever will be using each particular controller.
 885          */
 886         switch (id) {
 887         case AT91SAM9RL_ID_SSC0:
 888                 pdev = &at91sam9rl_ssc0_device;
 889                 configure_ssc0_pins(pins);
 890                 break;
 891         case AT91SAM9RL_ID_SSC1:
 892                 pdev = &at91sam9rl_ssc1_device;
 893                 configure_ssc1_pins(pins);
 894                 break;
 895         default:
 896                 return;
 897         }
 898
 899         platform_device_register(pdev);
 900 }
 901
 902 #else
 903 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 904 #endif
 905
 906
 907 /* --------------------------------------------------------------------
 908  *  UART
 909  * -------------------------------------------------------------------- */
 910
 911 #if defined(CONFIG_SERIAL_ATMEL)
 912 static struct resource dbgu_resources[] = {
 913         [0] = {
 914                 .start  = AT91SAM9RL_BASE_DBGU,
 915                 .end    = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
 916                 .flags  = IORESOURCE_MEM,
 917         },
 918         [1] = {
 919                 .start  = AT91_ID_SYS,
 920                 .end    = AT91_ID_SYS,
 921                 .flags  = IORESOURCE_IRQ,
 922         },
 923 };
 924
 925 static struct atmel_uart_data dbgu_data = {
 926         .use_dma_tx     = 0,
 927         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 928 };
 929
 930 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 931
 932 static struct platform_device at91sam9rl_dbgu_device = {
 933         .name           = "atmel_usart",
 934         .id             = 0,
 935         .dev            = {
 936                                 .dma_mask               = &dbgu_dmamask,
 937                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 938                                 .platform_data          = &dbgu_data,
 939         },
 940         .resource       = dbgu_resources,
 941         .num_resources  = ARRAY_SIZE(dbgu_resources),
 942 };
 943
 944 static inline void configure_dbgu_pins(void)
 945 {
 946         at91_set_A_periph(AT91_PIN_PA21, 0);            /* DRXD */
 947         at91_set_A_periph(AT91_PIN_PA22, 1);            /* DTXD */
 948 }
 949
 950 static struct resource uart0_resources[] = {
 951         [0] = {
 952                 .start  = AT91SAM9RL_BASE_US0,
 953                 .end    = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
 954                 .flags  = IORESOURCE_MEM,
 955         },
 956         [1] = {
 957                 .start  = AT91SAM9RL_ID_US0,
 958                 .end    = AT91SAM9RL_ID_US0,
 959                 .flags  = IORESOURCE_IRQ,
 960         },
 961 };
 962
 963 static struct atmel_uart_data uart0_data = {
 964         .use_dma_tx     = 1,
 965         .use_dma_rx     = 1,
 966 };
 967
 968 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 969
 970 static struct platform_device at91sam9rl_uart0_device = {
 971         .name           = "atmel_usart",
 972         .id             = 1,
 973         .dev            = {
 974                                 .dma_mask               = &uart0_dmamask,
 975                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 976                                 .platform_data          = &uart0_data,
 977         },
 978         .resource       = uart0_resources,
 979         .num_resources  = ARRAY_SIZE(uart0_resources),
 980 };
 981
 982 static inline void configure_usart0_pins(unsigned pins)
 983 {
 984         at91_set_A_periph(AT91_PIN_PA6, 1);             /* TXD0 */
 985         at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
 986
 987         if (pins & ATMEL_UART_RTS)
 988                 at91_set_A_periph(AT91_PIN_PA9, 0);     /* RTS0 */
 989         if (pins & ATMEL_UART_CTS)
 990                 at91_set_A_periph(AT91_PIN_PA10, 0);    /* CTS0 */
 991         if (pins & ATMEL_UART_DSR)
 992                 at91_set_A_periph(AT91_PIN_PD14, 0);    /* DSR0 */
 993         if (pins & ATMEL_UART_DTR)
 994                 at91_set_A_periph(AT91_PIN_PD15, 0);    /* DTR0 */
 995         if (pins & ATMEL_UART_DCD)
 996                 at91_set_A_periph(AT91_PIN_PD16, 0);    /* DCD0 */
 997         if (pins & ATMEL_UART_RI)
 998                 at91_set_A_periph(AT91_PIN_PD17, 0);    /* RI0 */
 999 }
1000
1001 static struct resource uart1_resources[] = {
1002         [0] = {
1003                 .start  = AT91SAM9RL_BASE_US1,
1004                 .end    = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
1005                 .flags  = IORESOURCE_MEM,
1006         },
1007         [1] = {
1008                 .start  = AT91SAM9RL_ID_US1,
1009                 .end    = AT91SAM9RL_ID_US1,
1010                 .flags  = IORESOURCE_IRQ,
1011         },
1012 };
1013
1014 static struct atmel_uart_data uart1_data = {
1015         .use_dma_tx     = 1,
1016         .use_dma_rx     = 1,
1017 };
1018
1019 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1020
1021 static struct platform_device at91sam9rl_uart1_device = {
1022         .name           = "atmel_usart",
1023         .id             = 2,
1024         .dev            = {
1025                                 .dma_mask               = &uart1_dmamask,
1026                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1027                                 .platform_data          = &uart1_data,
1028         },
1029         .resource       = uart1_resources,
1030         .num_resources  = ARRAY_SIZE(uart1_resources),
1031 };
1032
1033 static inline void configure_usart1_pins(unsigned pins)
1034 {
1035         at91_set_A_periph(AT91_PIN_PA11, 1);            /* TXD1 */
1036         at91_set_A_periph(AT91_PIN_PA12, 0);            /* RXD1 */
1037
1038         if (pins & ATMEL_UART_RTS)
1039                 at91_set_B_periph(AT91_PIN_PA18, 0);    /* RTS1 */
1040         if (pins & ATMEL_UART_CTS)
1041                 at91_set_B_periph(AT91_PIN_PA19, 0);    /* CTS1 */
1042 }
1043
1044 static struct resource uart2_resources[] = {
1045         [0] = {
1046                 .start  = AT91SAM9RL_BASE_US2,
1047                 .end    = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
1048                 .flags  = IORESOURCE_MEM,
1049         },
1050         [1] = {
1051                 .start  = AT91SAM9RL_ID_US2,
1052                 .end    = AT91SAM9RL_ID_US2,
1053                 .flags  = IORESOURCE_IRQ,
1054         },
1055 };
1056
1057 static struct atmel_uart_data uart2_data = {
1058         .use_dma_tx     = 1,
1059         .use_dma_rx     = 1,
1060 };
1061
1062 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1063
1064 static struct platform_device at91sam9rl_uart2_device = {
1065         .name           = "atmel_usart",
1066         .id             = 3,
1067         .dev            = {
1068                                 .dma_mask               = &uart2_dmamask,
1069                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1070                                 .platform_data          = &uart2_data,
1071         },
1072         .resource       = uart2_resources,
1073         .num_resources  = ARRAY_SIZE(uart2_resources),
1074 };
1075
1076 static inline void configure_usart2_pins(unsigned pins)
1077 {
1078         at91_set_A_periph(AT91_PIN_PA13, 1);            /* TXD2 */
1079         at91_set_A_periph(AT91_PIN_PA14, 0);            /* RXD2 */
1080
1081         if (pins & ATMEL_UART_RTS)
1082                 at91_set_A_periph(AT91_PIN_PA29, 0);    /* RTS2 */
1083         if (pins & ATMEL_UART_CTS)
1084                 at91_set_A_periph(AT91_PIN_PA30, 0);    /* CTS2 */
1085 }
1086
1087 static struct resource uart3_resources[] = {
1088         [0] = {
1089                 .start  = AT91SAM9RL_BASE_US3,
1090                 .end    = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
1091                 .flags  = IORESOURCE_MEM,
1092         },
1093         [1] = {
1094                 .start  = AT91SAM9RL_ID_US3,
1095                 .end    = AT91SAM9RL_ID_US3,
1096                 .flags  = IORESOURCE_IRQ,
1097         },
1098 };
1099
1100 static struct atmel_uart_data uart3_data = {
1101         .use_dma_tx     = 1,
1102         .use_dma_rx     = 1,
1103 };
1104
1105 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1106
1107 static struct platform_device at91sam9rl_uart3_device = {
1108         .name           = "atmel_usart",
1109         .id             = 4,
1110         .dev            = {
1111                                 .dma_mask               = &uart3_dmamask,
1112                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1113                                 .platform_data          = &uart3_data,
1114         },
1115         .resource       = uart3_resources,
1116         .num_resources  = ARRAY_SIZE(uart3_resources),
1117 };
1118
1119 static inline void configure_usart3_pins(unsigned pins)
1120 {
1121         at91_set_A_periph(AT91_PIN_PB0, 1);             /* TXD3 */
1122         at91_set_A_periph(AT91_PIN_PB1, 0);             /* RXD3 */
1123
1124         if (pins & ATMEL_UART_RTS)
1125                 at91_set_B_periph(AT91_PIN_PD4, 0);     /* RTS3 */
1126         if (pins & ATMEL_UART_CTS)
1127                 at91_set_B_periph(AT91_PIN_PD3, 0);     /* CTS3 */
1128 }
1129
1130 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1131 struct platform_device *atmel_default_console_device;   /* the serial console device */
1132
1133 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1134 {
1135         struct platform_device *pdev;
1136         struct atmel_uart_data *pdata;
1137
1138         switch (id) {
1139                 case 0:         /* DBGU */
1140                         pdev = &at91sam9rl_dbgu_device;
1141                         configure_dbgu_pins();
1142                         break;
1143                 case AT91SAM9RL_ID_US0:
1144                         pdev = &at91sam9rl_uart0_device;
1145                         configure_usart0_pins(pins);
1146                         break;
1147                 case AT91SAM9RL_ID_US1:
1148                         pdev = &at91sam9rl_uart1_device;
1149                         configure_usart1_pins(pins);
1150                         break;
1151                 case AT91SAM9RL_ID_US2:
1152                         pdev = &at91sam9rl_uart2_device;
1153                         configure_usart2_pins(pins);
1154                         break;
1155                 case AT91SAM9RL_ID_US3:
1156                         pdev = &at91sam9rl_uart3_device;
1157                         configure_usart3_pins(pins);
1158                         break;
1159                 default:
1160                         return;
1161         }
1162         pdata = pdev->dev.platform_data;
1163         pdata->num = portnr;            /* update to mapped ID */
1164
1165         if (portnr < ATMEL_MAX_UART)
1166                 at91_uarts[portnr] = pdev;
1167 }
1168
1169 void __init at91_set_serial_console(unsigned portnr)
1170 {
1171         if (portnr < ATMEL_MAX_UART) {
1172                 atmel_default_console_device = at91_uarts[portnr];
1173                 at91sam9rl_set_console_clock(at91_uarts[portnr]->id);
1174         }
1175 }
1176
1177 void __init at91_add_device_serial(void)
1178 {
1179         int i;
1180
1181         for (i = 0; i < ATMEL_MAX_UART; i++) {
1182                 if (at91_uarts[i])
1183                         platform_device_register(at91_uarts[i]);
1184         }
1185
1186         if (!atmel_default_console_device)
1187                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1188 }
1189 #else
1190 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1191 void __init at91_set_serial_console(unsigned portnr) {}
1192 void __init at91_add_device_serial(void) {}
1193 #endif
1194
1195
1196 /* -------------------------------------------------------------------- */
1197
1198 /*
1199  * These devices are always present and don't need any board-specific
1200  * setup.
1201  */
1202 static int __init at91_add_standard_devices(void)
1203 {
1204         at91_add_device_hdmac();
1205         at91_add_device_rtc();
1206         at91_add_device_rtt();
1207         at91_add_device_watchdog();
1208         at91_add_device_tc();
1209         return 0;
1210 }
1211
1212 arch_initcall(at91_add_standard_devices);