2 * arch/arm/mach-at91/include/mach/hardware.h
4 * Copyright (C) 2003 SAN People
5 * Copyright (C) 2003 ATMEL
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
14 #ifndef __ASM_ARCH_HARDWARE_H
15 #define __ASM_ARCH_HARDWARE_H
17 #include <asm/sizes.h>
20 /* rm9200, 9260/9g20, 9261/9g10, 9rl */
21 #define AT91_BASE_DBGU0 0xfffff200
22 /* 9263, 9g45, sama5d3 */
23 #define AT91_BASE_DBGU1 0xffffee00
25 #define AT91_BASE_DBGU2 0xfc069000
27 #include <mach/at91rm9200.h>
28 #include <mach/at91sam9260.h>
29 #include <mach/at91sam9261.h>
30 #include <mach/at91sam9263.h>
31 #include <mach/at91sam9rl.h>
32 #include <mach/at91sam9g45.h>
33 #include <mach/at91sam9x5.h>
34 #include <mach/at91sam9n12.h>
35 #include <mach/sama5d3.h>
36 #include <mach/sama5d4.h>
39 * On all at91 except rm9200 and x40 have the System Controller starts
40 * at address 0xffffc000 and has a size of 16KiB.
42 * On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
45 * Removes the individual definitions of AT91_BASE_SYS and
46 * replaces them with a common version at base 0xfffffc000 and size 16KiB
47 * and map the same memory space
49 #define AT91_BASE_SYS 0xffffc000
52 * On sama5d4 there is no system controller, we map some needed peripherals
54 #define AT91_ALT_BASE_SYS 0xfc069000
57 * On all at91 have the Advanced Interrupt Controller starts at address
58 * 0xfffff000 and the Power Management Controller starts at 0xfffffc00
60 #define AT91_AIC 0xfffff000
61 #define AT91_PMC 0xfffffc00
64 * Peripheral identifiers/interrupts.
66 #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
67 #define AT91_ID_SYS 1 /* System Peripherals */
71 * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
72 * to 0xFEF78000 .. 0xFF000000. (544Kb)
74 #define AT91_IO_PHYS_BASE 0xFFF78000
75 #define AT91_IO_VIRT_BASE IOMEM(0xFF000000 - AT91_IO_SIZE)
78 * On sama5d4, remap the peripherals from address 0xFC069000 .. 0xFC06F000
79 * to 0xFB069000 .. 0xFB06F000. (24Kb)
81 #define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS
82 #define AT91_ALT_IO_VIRT_BASE IOMEM(0xFB069000)
85 * Identity mapping for the non MMU case.
87 #define AT91_IO_PHYS_BASE AT91_BASE_SYS
88 #define AT91_IO_VIRT_BASE IOMEM(AT91_IO_PHYS_BASE)
90 #define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS
91 #define AT91_ALT_IO_VIRT_BASE IOMEM(AT91_ALT_BASE_SYS)
94 #define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
96 /* Convert a physical IO address to virtual IO address */
97 #define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
98 #define AT91_ALT_IO_P2V(x) ((x) - AT91_ALT_IO_PHYS_BASE + AT91_ALT_IO_VIRT_BASE)
101 * Virtual to Physical Address mapping for IO devices.
103 #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
104 #define AT91_ALT_VA_BASE_SYS AT91_ALT_IO_P2V(AT91_ALT_BASE_SYS)
106 /* Internal SRAM is mapped below the IO devices */
107 #define AT91_SRAM_MAX SZ_1M
108 #define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
110 /* External Memory Map */
111 #define AT91_CHIPSELECT_0 0x10000000
112 #define AT91_CHIPSELECT_1 0x20000000
113 #define AT91_CHIPSELECT_2 0x30000000
114 #define AT91_CHIPSELECT_3 0x40000000
115 #define AT91_CHIPSELECT_4 0x50000000
116 #define AT91_CHIPSELECT_5 0x60000000
117 #define AT91_CHIPSELECT_6 0x70000000
118 #define AT91_CHIPSELECT_7 0x80000000
121 #define AT91_SLOW_CLOCK 32768 /* slow clock */
124 * FIXME: this is needed to communicate between the pinctrl driver and
125 * the PM implementation in the machine. Possibly part of the PM
126 * implementation should be moved down into the pinctrl driver and get
127 * called as part of the generic suspend/resume path.
130 extern void at91_pinctrl_gpio_suspend(void);
131 extern void at91_pinctrl_gpio_resume(void);