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1 /*
2  * arch/arm/mach-at91/pm.c
3  * AT91 Power Management
4  *
5  * Copyright (C) 2005 David Brownell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  */
12
13 #include <linux/gpio.h>
14 #include <linux/suspend.h>
15 #include <linux/sched.h>
16 #include <linux/proc_fs.h>
17 #include <linux/interrupt.h>
18 #include <linux/sysfs.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/clk/at91_pmc.h>
23
24 #include <asm/irq.h>
25 #include <linux/atomic.h>
26 #include <asm/mach/time.h>
27 #include <asm/mach/irq.h>
28
29 #include <mach/cpu.h>
30
31 #include "at91_aic.h"
32 #include "generic.h"
33 #include "pm.h"
34
35 /*
36  * Show the reason for the previous system reset.
37  */
38
39 #include "at91_rstc.h"
40 #include "at91_shdwc.h"
41
42 static void (*at91_pm_standby)(void);
43
44 static void __init show_reset_status(void)
45 {
46         static char reset[] __initdata = "reset";
47
48         static char general[] __initdata = "general";
49         static char wakeup[] __initdata = "wakeup";
50         static char watchdog[] __initdata = "watchdog";
51         static char software[] __initdata = "software";
52         static char user[] __initdata = "user";
53         static char unknown[] __initdata = "unknown";
54
55         static char signal[] __initdata = "signal";
56         static char rtc[] __initdata = "rtc";
57         static char rtt[] __initdata = "rtt";
58         static char restore[] __initdata = "power-restored";
59
60         char *reason, *r2 = reset;
61         u32 reset_type, wake_type;
62
63         if (!at91_shdwc_base || !at91_rstc_base)
64                 return;
65
66         reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
67         wake_type = at91_shdwc_read(AT91_SHDW_SR);
68
69         switch (reset_type) {
70         case AT91_RSTC_RSTTYP_GENERAL:
71                 reason = general;
72                 break;
73         case AT91_RSTC_RSTTYP_WAKEUP:
74                 /* board-specific code enabled the wakeup sources */
75                 reason = wakeup;
76
77                 /* "wakeup signal" */
78                 if (wake_type & AT91_SHDW_WAKEUP0)
79                         r2 = signal;
80                 else {
81                         r2 = reason;
82                         if (wake_type & AT91_SHDW_RTTWK)        /* rtt wakeup */
83                                 reason = rtt;
84                         else if (wake_type & AT91_SHDW_RTCWK)   /* rtc wakeup */
85                                 reason = rtc;
86                         else if (wake_type == 0)        /* power-restored wakeup */
87                                 reason = restore;
88                         else                            /* unknown wakeup */
89                                 reason = unknown;
90                 }
91                 break;
92         case AT91_RSTC_RSTTYP_WATCHDOG:
93                 reason = watchdog;
94                 break;
95         case AT91_RSTC_RSTTYP_SOFTWARE:
96                 reason = software;
97                 break;
98         case AT91_RSTC_RSTTYP_USER:
99                 reason = user;
100                 break;
101         default:
102                 reason = unknown;
103                 break;
104         }
105         pr_info("AT91: Starting after %s %s\n", reason, r2);
106 }
107
108 static int at91_pm_valid_state(suspend_state_t state)
109 {
110         switch (state) {
111                 case PM_SUSPEND_ON:
112                 case PM_SUSPEND_STANDBY:
113                 case PM_SUSPEND_MEM:
114                         return 1;
115
116                 default:
117                         return 0;
118         }
119 }
120
121
122 static suspend_state_t target_state;
123
124 /*
125  * Called after processes are frozen, but before we shutdown devices.
126  */
127 static int at91_pm_begin(suspend_state_t state)
128 {
129         target_state = state;
130         return 0;
131 }
132
133 /*
134  * Verify that all the clocks are correct before entering
135  * slow-clock mode.
136  */
137 static int at91_pm_verify_clocks(void)
138 {
139         unsigned long scsr;
140         int i;
141
142         scsr = at91_pmc_read(AT91_PMC_SCSR);
143
144         /* USB must not be using PLLB */
145         if (cpu_is_at91rm9200()) {
146                 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
147                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
148                         return 0;
149                 }
150         } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
151                         || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
152                 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
153                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
154                         return 0;
155                 }
156         }
157
158         /* PCK0..PCK3 must be disabled, or configured to use clk32k */
159         for (i = 0; i < 4; i++) {
160                 u32 css;
161
162                 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
163                         continue;
164
165                 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
166                 if (css != AT91_PMC_CSS_SLOW) {
167                         pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
168                         return 0;
169                 }
170         }
171
172         return 1;
173 }
174
175 /*
176  * Call this from platform driver suspend() to see how deeply to suspend.
177  * For example, some controllers (like OHCI) need one of the PLL clocks
178  * in order to act as a wakeup source, and those are not available when
179  * going into slow clock mode.
180  *
181  * REVISIT: generalize as clk_will_be_available(clk)?  Other platforms have
182  * the very same problem (but not using at91 main_clk), and it'd be better
183  * to add one generic API rather than lots of platform-specific ones.
184  */
185 int at91_suspend_entering_slow_clock(void)
186 {
187         return (target_state == PM_SUSPEND_MEM);
188 }
189 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
190
191
192 static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
193                           void __iomem *ramc1, int memctrl);
194
195 #ifdef CONFIG_AT91_SLOW_CLOCK
196 extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
197                             void __iomem *ramc1, int memctrl);
198 extern u32 at91_slow_clock_sz;
199 #endif
200
201 static int at91_pm_enter(suspend_state_t state)
202 {
203         if (of_have_populated_dt())
204                 at91_pinctrl_gpio_suspend();
205         else
206                 at91_gpio_suspend();
207         at91_irq_suspend();
208
209         pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
210                         /* remember all the always-wake irqs */
211                         (at91_pmc_read(AT91_PMC_PCSR)
212                                         | (1 << AT91_ID_FIQ)
213                                         | (1 << AT91_ID_SYS)
214                                         | (at91_get_extern_irq()))
215                                 & at91_aic_read(AT91_AIC_IMR),
216                         state);
217
218         switch (state) {
219                 /*
220                  * Suspend-to-RAM is like STANDBY plus slow clock mode, so
221                  * drivers must suspend more deeply:  only the master clock
222                  * controller may be using the main oscillator.
223                  */
224                 case PM_SUSPEND_MEM:
225                         /*
226                          * Ensure that clocks are in a valid state.
227                          */
228                         if (!at91_pm_verify_clocks())
229                                 goto error;
230
231                         /*
232                          * Enter slow clock mode by switching over to clk32k and
233                          * turning off the main oscillator; reverse on wakeup.
234                          */
235                         if (slow_clock) {
236                                 int memctrl = AT91_MEMCTRL_SDRAMC;
237
238                                 if (cpu_is_at91rm9200())
239                                         memctrl = AT91_MEMCTRL_MC;
240                                 else if (cpu_is_at91sam9g45())
241                                         memctrl = AT91_MEMCTRL_DDRSDR;
242 #ifdef CONFIG_AT91_SLOW_CLOCK
243                                 /* copy slow_clock handler to SRAM, and call it */
244                                 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
245 #endif
246                                 slow_clock(at91_pmc_base, at91_ramc_base[0],
247                                            at91_ramc_base[1], memctrl);
248                                 break;
249                         } else {
250                                 pr_info("AT91: PM - no slow clock mode enabled ...\n");
251                                 /* FALLTHROUGH leaving master clock alone */
252                         }
253
254                 /*
255                  * STANDBY mode has *all* drivers suspended; ignores irqs not
256                  * marked as 'wakeup' event sources; and reduces DRAM power.
257                  * But otherwise it's identical to PM_SUSPEND_ON:  cpu idle, and
258                  * nothing fancy done with main or cpu clocks.
259                  */
260                 case PM_SUSPEND_STANDBY:
261                         /*
262                          * NOTE: the Wait-for-Interrupt instruction needs to be
263                          * in icache so no SDRAM accesses are needed until the
264                          * wakeup IRQ occurs and self-refresh is terminated.
265                          * For ARM 926 based chips, this requirement is weaker
266                          * as at91sam9 can access a RAM in self-refresh mode.
267                          */
268                         if (at91_pm_standby)
269                                 at91_pm_standby();
270                         break;
271
272                 case PM_SUSPEND_ON:
273                         cpu_do_idle();
274                         break;
275
276                 default:
277                         pr_debug("AT91: PM - bogus suspend state %d\n", state);
278                         goto error;
279         }
280
281         pr_debug("AT91: PM - wakeup %08x\n",
282                         at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
283
284 error:
285         target_state = PM_SUSPEND_ON;
286         at91_irq_resume();
287         if (of_have_populated_dt())
288                 at91_pinctrl_gpio_resume();
289         else
290                 at91_gpio_resume();
291         return 0;
292 }
293
294 /*
295  * Called right prior to thawing processes.
296  */
297 static void at91_pm_end(void)
298 {
299         target_state = PM_SUSPEND_ON;
300 }
301
302
303 static const struct platform_suspend_ops at91_pm_ops = {
304         .valid  = at91_pm_valid_state,
305         .begin  = at91_pm_begin,
306         .enter  = at91_pm_enter,
307         .end    = at91_pm_end,
308 };
309
310 static struct platform_device at91_cpuidle_device = {
311         .name = "cpuidle-at91",
312 };
313
314 void at91_pm_set_standby(void (*at91_standby)(void))
315 {
316         if (at91_standby) {
317                 at91_cpuidle_device.dev.platform_data = at91_standby;
318                 at91_pm_standby = at91_standby;
319         }
320 }
321
322 static int __init at91_pm_init(void)
323 {
324 #ifdef CONFIG_AT91_SLOW_CLOCK
325         slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
326 #endif
327
328         pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
329
330         /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
331         if (cpu_is_at91rm9200())
332                 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
333         
334         if (at91_cpuidle_device.dev.platform_data)
335                 platform_device_register(&at91_cpuidle_device);
336
337         suspend_set_ops(&at91_pm_ops);
338
339         show_reset_status();
340         return 0;
341 }
342 arch_initcall(at91_pm_init);