2 * arch/arm/mach-at91/pm.c
3 * AT91 Power Management
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <linux/gpio.h>
14 #include <linux/suspend.h>
15 #include <linux/sched.h>
16 #include <linux/proc_fs.h>
17 #include <linux/interrupt.h>
18 #include <linux/sysfs.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
22 #include <linux/clk/at91_pmc.h>
25 #include <linux/atomic.h>
26 #include <asm/mach/time.h>
27 #include <asm/mach/irq.h>
30 #include <mach/hardware.h>
38 * Show the reason for the previous system reset.
41 #include "at91_rstc.h"
42 #include "at91_shdwc.h"
44 static void (*at91_pm_standby)(void);
46 static void __init show_reset_status(void)
48 static char reset[] __initdata = "reset";
50 static char general[] __initdata = "general";
51 static char wakeup[] __initdata = "wakeup";
52 static char watchdog[] __initdata = "watchdog";
53 static char software[] __initdata = "software";
54 static char user[] __initdata = "user";
55 static char unknown[] __initdata = "unknown";
57 static char signal[] __initdata = "signal";
58 static char rtc[] __initdata = "rtc";
59 static char rtt[] __initdata = "rtt";
60 static char restore[] __initdata = "power-restored";
62 char *reason, *r2 = reset;
63 u32 reset_type, wake_type;
65 if (!at91_shdwc_base || !at91_rstc_base)
68 reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
69 wake_type = at91_shdwc_read(AT91_SHDW_SR);
72 case AT91_RSTC_RSTTYP_GENERAL:
75 case AT91_RSTC_RSTTYP_WAKEUP:
76 /* board-specific code enabled the wakeup sources */
80 if (wake_type & AT91_SHDW_WAKEUP0)
84 if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */
86 else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */
88 else if (wake_type == 0) /* power-restored wakeup */
90 else /* unknown wakeup */
94 case AT91_RSTC_RSTTYP_WATCHDOG:
97 case AT91_RSTC_RSTTYP_SOFTWARE:
100 case AT91_RSTC_RSTTYP_USER:
107 pr_info("AT91: Starting after %s %s\n", reason, r2);
110 static int at91_pm_valid_state(suspend_state_t state)
114 case PM_SUSPEND_STANDBY:
124 static suspend_state_t target_state;
127 * Called after processes are frozen, but before we shutdown devices.
129 static int at91_pm_begin(suspend_state_t state)
131 target_state = state;
136 * Verify that all the clocks are correct before entering
139 static int at91_pm_verify_clocks(void)
144 scsr = at91_pmc_read(AT91_PMC_SCSR);
146 /* USB must not be using PLLB */
147 if (cpu_is_at91rm9200()) {
148 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
149 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
152 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
153 || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
154 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
155 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
160 /* PCK0..PCK3 must be disabled, or configured to use clk32k */
161 for (i = 0; i < 4; i++) {
164 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
167 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
168 if (css != AT91_PMC_CSS_SLOW) {
169 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
178 * Call this from platform driver suspend() to see how deeply to suspend.
179 * For example, some controllers (like OHCI) need one of the PLL clocks
180 * in order to act as a wakeup source, and those are not available when
181 * going into slow clock mode.
183 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
184 * the very same problem (but not using at91 main_clk), and it'd be better
185 * to add one generic API rather than lots of platform-specific ones.
187 int at91_suspend_entering_slow_clock(void)
189 return (target_state == PM_SUSPEND_MEM);
191 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
194 static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
195 void __iomem *ramc1, int memctrl);
197 #ifdef CONFIG_AT91_SLOW_CLOCK
198 extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
199 void __iomem *ramc1, int memctrl);
200 extern u32 at91_slow_clock_sz;
203 static int at91_pm_enter(suspend_state_t state)
205 if (of_have_populated_dt())
206 at91_pinctrl_gpio_suspend();
211 pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
212 /* remember all the always-wake irqs */
213 (at91_pmc_read(AT91_PMC_PCSR)
216 | (at91_get_extern_irq()))
217 & at91_aic_read(AT91_AIC_IMR),
222 * Suspend-to-RAM is like STANDBY plus slow clock mode, so
223 * drivers must suspend more deeply: only the master clock
224 * controller may be using the main oscillator.
228 * Ensure that clocks are in a valid state.
230 if (!at91_pm_verify_clocks())
234 * Enter slow clock mode by switching over to clk32k and
235 * turning off the main oscillator; reverse on wakeup.
238 int memctrl = AT91_MEMCTRL_SDRAMC;
240 if (cpu_is_at91rm9200())
241 memctrl = AT91_MEMCTRL_MC;
242 else if (cpu_is_at91sam9g45())
243 memctrl = AT91_MEMCTRL_DDRSDR;
244 #ifdef CONFIG_AT91_SLOW_CLOCK
245 /* copy slow_clock handler to SRAM, and call it */
246 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
248 slow_clock(at91_pmc_base, at91_ramc_base[0],
249 at91_ramc_base[1], memctrl);
252 pr_info("AT91: PM - no slow clock mode enabled ...\n");
253 /* FALLTHROUGH leaving master clock alone */
257 * STANDBY mode has *all* drivers suspended; ignores irqs not
258 * marked as 'wakeup' event sources; and reduces DRAM power.
259 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
260 * nothing fancy done with main or cpu clocks.
262 case PM_SUSPEND_STANDBY:
264 * NOTE: the Wait-for-Interrupt instruction needs to be
265 * in icache so no SDRAM accesses are needed until the
266 * wakeup IRQ occurs and self-refresh is terminated.
267 * For ARM 926 based chips, this requirement is weaker
268 * as at91sam9 can access a RAM in self-refresh mode.
279 pr_debug("AT91: PM - bogus suspend state %d\n", state);
283 pr_debug("AT91: PM - wakeup %08x\n",
284 at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
287 target_state = PM_SUSPEND_ON;
289 if (of_have_populated_dt())
290 at91_pinctrl_gpio_resume();
297 * Called right prior to thawing processes.
299 static void at91_pm_end(void)
301 target_state = PM_SUSPEND_ON;
305 static const struct platform_suspend_ops at91_pm_ops = {
306 .valid = at91_pm_valid_state,
307 .begin = at91_pm_begin,
308 .enter = at91_pm_enter,
312 static struct platform_device at91_cpuidle_device = {
313 .name = "cpuidle-at91",
316 void at91_pm_set_standby(void (*at91_standby)(void))
319 at91_cpuidle_device.dev.platform_data = at91_standby;
320 at91_pm_standby = at91_standby;
324 static int __init at91_pm_init(void)
326 #ifdef CONFIG_AT91_SLOW_CLOCK
327 slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
330 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
332 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
333 if (cpu_is_at91rm9200())
334 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
336 if (at91_cpuidle_device.dev.platform_data)
337 platform_device_register(&at91_cpuidle_device);
339 suspend_set_ops(&at91_pm_ops);
344 arch_initcall(at91_pm_init);