2 * TI DaVinci DM646X EVM board
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
7 * (C) 2007-2008, MontaVista Software, Inc.
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
15 /**************************************************************************
17 **************************************************************************/
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/platform_data/at24.h>
26 #include <linux/i2c/pcf857x.h>
28 #include <media/tvp514x.h>
29 #include <media/adv7343.h>
31 #include <linux/mtd/mtd.h>
32 #include <linux/mtd/nand.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/clk.h>
35 #include <linux/export.h>
37 #include <asm/mach-types.h>
38 #include <asm/mach/arch.h>
40 #include <mach/common.h>
41 #include <mach/serial.h>
42 #include <linux/platform_data/i2c-davinci.h>
43 #include <linux/platform_data/mtd-davinci.h>
44 #include <mach/clock.h>
45 #include <mach/cdce949.h>
46 #include <linux/platform_data/mtd-davinci-aemif.h>
51 #define NAND_BLOCK_SIZE SZ_128K
53 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
54 * and U-Boot environment this avoids dependency on any particular combination
55 * of UBL, U-Boot or flashing tools etc.
57 static struct mtd_partition davinci_nand_partitions[] = {
59 /* UBL, U-Boot with environment */
61 .offset = MTDPART_OFS_APPEND,
62 .size = 16 * NAND_BLOCK_SIZE,
63 .mask_flags = MTD_WRITEABLE, /* force read-only */
66 .offset = MTDPART_OFS_APPEND,
71 .offset = MTDPART_OFS_APPEND,
72 .size = MTDPART_SIZ_FULL,
77 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
87 static struct davinci_nand_pdata davinci_nand_data = {
90 .parts = davinci_nand_partitions,
91 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
92 .ecc_mode = NAND_ECC_HW,
97 static struct resource davinci_nand_resources[] = {
99 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
100 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
101 .flags = IORESOURCE_MEM,
103 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
104 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
105 .flags = IORESOURCE_MEM,
109 static struct platform_device davinci_nand_device = {
110 .name = "davinci_nand",
113 .num_resources = ARRAY_SIZE(davinci_nand_resources),
114 .resource = davinci_nand_resources,
117 .platform_data = &davinci_nand_data,
121 #define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
123 /* CPLD Register 0 bits to control ATA */
124 #define DM646X_EVM_ATA_RST BIT(0)
125 #define DM646X_EVM_ATA_PWD BIT(1)
127 /* CPLD Register 0 Client: used for I/O Control */
128 static int cpld_reg0_probe(struct i2c_client *client,
129 const struct i2c_device_id *id)
133 struct i2c_msg msg[2] = {
135 .addr = client->addr,
141 .addr = client->addr,
148 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
149 i2c_transfer(client->adapter, msg, 1);
150 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
151 i2c_transfer(client->adapter, msg + 1, 1);
157 static const struct i2c_device_id cpld_reg_ids[] = {
162 static struct i2c_driver dm6467evm_cpld_driver = {
163 .driver.name = "cpld_reg0",
164 .id_table = cpld_reg_ids,
165 .probe = cpld_reg0_probe,
170 static struct gpio_led evm_leds[] = {
171 { .name = "DS1", .active_low = 1, },
172 { .name = "DS2", .active_low = 1, },
173 { .name = "DS3", .active_low = 1, },
174 { .name = "DS4", .active_low = 1, },
177 static const struct gpio_led_platform_data evm_led_data = {
178 .num_leds = ARRAY_SIZE(evm_leds),
182 static struct platform_device *evm_led_dev;
184 static int evm_led_setup(struct i2c_client *client, int gpio,
185 unsigned int ngpio, void *c)
187 struct gpio_led *leds = evm_leds;
195 evm_led_dev = platform_device_alloc("leds-gpio", 0);
196 platform_device_add_data(evm_led_dev, &evm_led_data,
197 sizeof(evm_led_data));
199 evm_led_dev->dev.parent = &client->dev;
200 status = platform_device_add(evm_led_dev);
202 platform_device_put(evm_led_dev);
208 static int evm_led_teardown(struct i2c_client *client, int gpio,
209 unsigned ngpio, void *c)
212 platform_device_unregister(evm_led_dev);
218 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
220 static int evm_sw_setup(struct i2c_client *client, int gpio,
221 unsigned ngpio, void *c)
227 for (i = 0; i < 4; ++i) {
228 snprintf(label, 10, "user_sw%d", i);
229 status = gpio_request(gpio, label);
232 evm_sw_gpio[i] = gpio++;
234 status = gpio_direction_input(evm_sw_gpio[i]);
236 gpio_free(evm_sw_gpio[i]);
237 evm_sw_gpio[i] = -EINVAL;
241 status = gpio_export(evm_sw_gpio[i], 0);
243 gpio_free(evm_sw_gpio[i]);
244 evm_sw_gpio[i] = -EINVAL;
250 for (i = 0; i < 4; ++i) {
251 if (evm_sw_gpio[i] != -EINVAL) {
252 gpio_free(evm_sw_gpio[i]);
253 evm_sw_gpio[i] = -EINVAL;
259 static int evm_sw_teardown(struct i2c_client *client, int gpio,
260 unsigned ngpio, void *c)
264 for (i = 0; i < 4; ++i) {
265 if (evm_sw_gpio[i] != -EINVAL) {
266 gpio_unexport(evm_sw_gpio[i]);
267 gpio_free(evm_sw_gpio[i]);
268 evm_sw_gpio[i] = -EINVAL;
274 static int evm_pcf_setup(struct i2c_client *client, int gpio,
275 unsigned int ngpio, void *c)
282 status = evm_sw_setup(client, gpio, 4, c);
286 return evm_led_setup(client, gpio+4, 4, c);
289 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
290 unsigned int ngpio, void *c)
294 evm_sw_teardown(client, gpio, 4, c);
295 evm_led_teardown(client, gpio+4, 4, c);
300 static struct pcf857x_platform_data pcf_data = {
301 .gpio_base = DAVINCI_N_GPIO+1,
302 .setup = evm_pcf_setup,
303 .teardown = evm_pcf_teardown,
306 /* Most of this EEPROM is unused, but U-Boot uses some data:
307 * - 0x7f00, 6 bytes Ethernet Address
308 * - ... newer boards may have more
311 static struct at24_platform_data eeprom_info = {
312 .byte_len = (256*1024) / 8,
314 .flags = AT24_FLAG_ADDR16,
315 .setup = davinci_get_mac_addr,
316 .context = (void *)0x7f00,
319 static u8 dm646x_iis_serializer_direction[] = {
320 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
323 static u8 dm646x_dit_serializer_direction[] = {
327 static struct snd_platform_data dm646x_evm_snd_data[] = {
329 .tx_dma_offset = 0x400,
330 .rx_dma_offset = 0x400,
331 .op_mode = DAVINCI_MCASP_IIS_MODE,
332 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
334 .serial_dir = dm646x_iis_serializer_direction,
335 .asp_chan_q = EVENTQ_0,
338 .tx_dma_offset = 0x400,
340 .op_mode = DAVINCI_MCASP_DIT_MODE,
341 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
343 .serial_dir = dm646x_dit_serializer_direction,
344 .asp_chan_q = EVENTQ_0,
348 static struct i2c_client *cpld_client;
350 static int cpld_video_probe(struct i2c_client *client,
351 const struct i2c_device_id *id)
353 cpld_client = client;
357 static int cpld_video_remove(struct i2c_client *client)
363 static const struct i2c_device_id cpld_video_id[] = {
368 static struct i2c_driver cpld_video_driver = {
370 .name = "cpld_video",
372 .probe = cpld_video_probe,
373 .remove = cpld_video_remove,
374 .id_table = cpld_video_id,
377 static void evm_init_cpld(void)
379 i2c_add_driver(&cpld_video_driver);
382 static struct i2c_board_info __initdata i2c_info[] = {
384 I2C_BOARD_INFO("24c256", 0x50),
385 .platform_data = &eeprom_info,
388 I2C_BOARD_INFO("pcf8574a", 0x38),
389 .platform_data = &pcf_data,
392 I2C_BOARD_INFO("cpld_reg0", 0x3a),
395 I2C_BOARD_INFO("tlv320aic33", 0x18),
398 I2C_BOARD_INFO("cpld_video", 0x3b),
401 I2C_BOARD_INFO("cdce949", 0x6c),
405 static struct davinci_i2c_platform_data i2c_pdata = {
406 .bus_freq = 100 /* kHz */,
407 .bus_delay = 0 /* usec */,
410 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
411 #define VCH2CLK_SYSCLK8 (BIT(9))
412 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
413 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
414 #define VCH3CLK_SYSCLK8 (BIT(13))
415 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
417 #define VIDCH2CLK (BIT(10))
418 #define VIDCH3CLK (BIT(11))
419 #define VIDCH1CLK (BIT(4))
420 #define TVP7002_INPUT (BIT(4))
421 #define TVP5147_INPUT (~BIT(4))
422 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
423 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
424 #define TVP5147_CH0 "tvp514x-0"
425 #define TVP5147_CH1 "tvp514x-1"
427 /* spin lock for updating above registers */
428 static spinlock_t vpif_reg_lock;
430 static int set_vpif_clock(int mux_mode, int hd)
440 /* disable the clock */
441 spin_lock_irqsave(&vpif_reg_lock, flags);
442 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
443 value |= (VIDCH3CLK | VIDCH2CLK);
444 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
445 spin_unlock_irqrestore(&vpif_reg_lock, flags);
447 val = i2c_smbus_read_byte(cpld_client);
456 err = i2c_smbus_write_byte(cpld_client, val);
460 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
461 value &= ~(VCH2CLK_MASK);
462 value &= ~(VCH3CLK_MASK);
465 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
467 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
469 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
471 spin_lock_irqsave(&vpif_reg_lock, flags);
472 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
473 /* enable the clock */
474 value &= ~(VIDCH3CLK | VIDCH2CLK);
475 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
476 spin_unlock_irqrestore(&vpif_reg_lock, flags);
481 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
485 I2C_BOARD_INFO("adv7343", 0x2a),
491 I2C_BOARD_INFO("ths7303", 0x2c),
496 static const struct vpif_output dm6467_ch0_outputs[] = {
501 .type = V4L2_OUTPUT_TYPE_ANALOG,
502 .capabilities = V4L2_OUT_CAP_STD,
505 .subdev_name = "adv7343",
506 .output_route = ADV7343_COMPOSITE_ID,
512 .type = V4L2_OUTPUT_TYPE_ANALOG,
513 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
515 .subdev_name = "adv7343",
516 .output_route = ADV7343_COMPONENT_ID,
522 .type = V4L2_OUTPUT_TYPE_ANALOG,
523 .capabilities = V4L2_OUT_CAP_STD,
526 .subdev_name = "adv7343",
527 .output_route = ADV7343_SVIDEO_ID,
531 static struct vpif_display_config dm646x_vpif_display_config = {
532 .set_clock = set_vpif_clock,
533 .subdevinfo = dm646x_vpif_subdev,
534 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
536 .outputs = dm6467_ch0_outputs,
537 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
539 .card_name = "DM646x EVM",
543 * setup_vpif_input_path()
544 * @channel: channel id (0 - CH0, 1 - CH1)
545 * @sub_dev_name: ptr sub device name
547 * This will set vpif input to capture data from tvp514x or
550 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
555 /* for channel 1, we don't do anything */
562 val = i2c_smbus_read_byte(cpld_client);
566 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
567 !strcmp(sub_dev_name, TVP5147_CH1))
568 val &= TVP5147_INPUT;
570 val |= TVP7002_INPUT;
572 err = i2c_smbus_write_byte(cpld_client, val);
579 * setup_vpif_input_channel_mode()
580 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
582 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
584 static int setup_vpif_input_channel_mode(int mux_mode)
594 val = i2c_smbus_read_byte(cpld_client);
598 spin_lock_irqsave(&vpif_reg_lock, flags);
599 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
601 val &= VPIF_INPUT_TWO_CHANNEL;
604 val |= VPIF_INPUT_ONE_CHANNEL;
607 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
608 spin_unlock_irqrestore(&vpif_reg_lock, flags);
610 err = i2c_smbus_write_byte(cpld_client, val);
617 static struct tvp514x_platform_data tvp5146_pdata = {
623 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
625 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
629 I2C_BOARD_INFO("tvp5146", 0x5d),
630 .platform_data = &tvp5146_pdata,
636 I2C_BOARD_INFO("tvp5146", 0x5c),
637 .platform_data = &tvp5146_pdata,
642 static const struct vpif_input dm6467_ch0_inputs[] = {
647 .type = V4L2_INPUT_TYPE_CAMERA,
648 .capabilities = V4L2_IN_CAP_STD,
649 .std = TVP514X_STD_ALL,
651 .subdev_name = TVP5147_CH0,
652 .input_route = INPUT_CVBS_VI2B,
653 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
657 static const struct vpif_input dm6467_ch1_inputs[] = {
662 .type = V4L2_INPUT_TYPE_CAMERA,
663 .capabilities = V4L2_IN_CAP_STD,
664 .std = TVP514X_STD_ALL,
666 .subdev_name = TVP5147_CH1,
667 .input_route = INPUT_SVIDEO_VI2C_VI1C,
668 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
672 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
673 .setup_input_path = setup_vpif_input_path,
674 .setup_input_channel_mode = setup_vpif_input_channel_mode,
675 .subdev_info = vpif_capture_sdev_info,
676 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
678 .inputs = dm6467_ch0_inputs,
679 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
681 .if_type = VPIF_IF_BT656,
688 .inputs = dm6467_ch1_inputs,
689 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
691 .if_type = VPIF_IF_BT656,
699 static void __init evm_init_video(void)
701 spin_lock_init(&vpif_reg_lock);
703 dm646x_setup_vpif(&dm646x_vpif_display_config,
704 &dm646x_vpif_capture_cfg);
707 static void __init evm_init_i2c(void)
709 davinci_init_i2c(&i2c_pdata);
710 i2c_add_driver(&dm6467evm_cpld_driver);
711 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
716 #define CDCE949_XIN_RATE 27000000
718 /* CDCE949 support - "lpsc" field is overridden to work as clock number */
719 static struct clk cdce_clk_in = {
721 .rate = CDCE949_XIN_RATE,
724 static struct clk_lookup cdce_clks[] = {
725 CLK(NULL, "xin", &cdce_clk_in),
726 CLK(NULL, NULL, NULL),
729 static void __init cdce_clk_init(void)
731 struct clk_lookup *c;
734 for (c = cdce_clks; c->clk; c++) {
741 #define DM6467T_EVM_REF_FREQ 33000000
743 static void __init davinci_map_io(void)
747 if (machine_is_davinci_dm6467tevm())
748 davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
753 #define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
755 * The following EDMA channels/slots are not being used by drivers (for
756 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
757 * reserved for codecs on the DSP side.
759 static const s16 dm646x_dma_rsv_chans[][2] = {
760 /* (offset, number) */
769 static const s16 dm646x_dma_rsv_slots[][2] = {
770 /* (offset, number) */
780 static struct edma_rsv_info dm646x_edma_rsv[] = {
782 .rsv_chans = dm646x_dma_rsv_chans,
783 .rsv_slots = dm646x_dma_rsv_slots,
787 static __init void evm_init(void)
789 struct davinci_soc_info *soc_info = &davinci_soc_info;
792 davinci_serial_init(dm646x_serial_device);
793 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
794 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
796 if (machine_is_davinci_dm6467tevm())
797 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
799 platform_device_register(&davinci_nand_device);
801 dm646x_init_edma(dm646x_edma_rsv);
806 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
809 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
810 .atag_offset = 0x100,
811 .map_io = davinci_map_io,
812 .init_irq = davinci_irq_init,
813 .init_time = davinci_timer_init,
814 .init_machine = evm_init,
815 .init_late = davinci_init_late,
816 .dma_zone_size = SZ_128M,
817 .restart = davinci_restart,
820 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
821 .atag_offset = 0x100,
822 .map_io = davinci_map_io,
823 .init_irq = davinci_irq_init,
824 .init_time = davinci_timer_init,
825 .init_machine = evm_init,
826 .init_late = davinci_init_late,
827 .dma_zone_size = SZ_128M,
828 .restart = davinci_restart,