2 * TI DaVinci DM646X EVM board
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
7 * (C) 2007-2008, MontaVista Software, Inc.
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
15 /**************************************************************************
17 **************************************************************************/
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c/at24.h>
26 #include <linux/i2c/pcf857x.h>
28 #include <media/tvp514x.h>
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/nand.h>
32 #include <linux/mtd/partitions.h>
34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
37 #include <mach/dm646x.h>
38 #include <mach/common.h>
39 #include <mach/serial.h>
41 #include <mach/nand.h>
43 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
44 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
50 #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000
51 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000
53 #define NAND_BLOCK_SIZE SZ_128K
55 /* CPLD Register 0 bits to control ATA */
56 #define DM646X_EVM_ATA_RST BIT(0)
57 #define DM646X_EVM_ATA_PWD BIT(1)
59 #define DM646X_EVM_PHY_MASK (0x2)
60 #define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
62 #define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
63 #define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
64 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
65 #define VCH2CLK_SYSCLK8 (BIT(9))
66 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
67 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
68 #define VCH3CLK_SYSCLK8 (BIT(13))
69 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
71 #define VIDCH2CLK (BIT(10))
72 #define VIDCH3CLK (BIT(11))
73 #define VIDCH1CLK (BIT(4))
74 #define TVP7002_INPUT (BIT(4))
75 #define TVP5147_INPUT (~BIT(4))
76 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
77 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
78 #define TVP5147_CH0 "tvp514x-0"
79 #define TVP5147_CH1 "tvp514x-1"
81 static void __iomem *vpif_vidclkctl_reg;
82 static void __iomem *vpif_vsclkdis_reg;
83 /* spin lock for updating above registers */
84 static spinlock_t vpif_reg_lock;
86 static struct davinci_uart_config uart_config __initdata = {
87 .enabled_uarts = (1 << 0),
90 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
91 * and U-Boot environment this avoids dependency on any particular combination
92 * of UBL, U-Boot or flashing tools etc.
94 static struct mtd_partition davinci_nand_partitions[] = {
96 /* UBL, U-Boot with environment */
98 .offset = MTDPART_OFS_APPEND,
99 .size = 16 * NAND_BLOCK_SIZE,
100 .mask_flags = MTD_WRITEABLE, /* force read-only */
103 .offset = MTDPART_OFS_APPEND,
107 .name = "filesystem",
108 .offset = MTDPART_OFS_APPEND,
109 .size = MTDPART_SIZ_FULL,
114 static struct davinci_nand_pdata davinci_nand_data = {
117 .parts = davinci_nand_partitions,
118 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
119 .ecc_mode = NAND_ECC_HW,
123 static struct resource davinci_nand_resources[] = {
125 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
126 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
127 .flags = IORESOURCE_MEM,
129 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
130 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
131 .flags = IORESOURCE_MEM,
135 static struct platform_device davinci_nand_device = {
136 .name = "davinci_nand",
139 .num_resources = ARRAY_SIZE(davinci_nand_resources),
140 .resource = davinci_nand_resources,
143 .platform_data = &davinci_nand_data,
147 /* CPLD Register 0 Client: used for I/O Control */
148 static int cpld_reg0_probe(struct i2c_client *client,
149 const struct i2c_device_id *id)
153 struct i2c_msg msg[2] = {
155 .addr = client->addr,
161 .addr = client->addr,
168 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
169 i2c_transfer(client->adapter, msg, 1);
170 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
171 i2c_transfer(client->adapter, msg + 1, 1);
177 static const struct i2c_device_id cpld_reg_ids[] = {
182 static struct i2c_driver dm6467evm_cpld_driver = {
183 .driver.name = "cpld_reg0",
184 .id_table = cpld_reg_ids,
185 .probe = cpld_reg0_probe,
190 static struct gpio_led evm_leds[] = {
191 { .name = "DS1", .active_low = 1, },
192 { .name = "DS2", .active_low = 1, },
193 { .name = "DS3", .active_low = 1, },
194 { .name = "DS4", .active_low = 1, },
197 static const struct gpio_led_platform_data evm_led_data = {
198 .num_leds = ARRAY_SIZE(evm_leds),
202 static struct platform_device *evm_led_dev;
204 static int evm_led_setup(struct i2c_client *client, int gpio,
205 unsigned int ngpio, void *c)
207 struct gpio_led *leds = evm_leds;
215 evm_led_dev = platform_device_alloc("leds-gpio", 0);
216 platform_device_add_data(evm_led_dev, &evm_led_data,
217 sizeof(evm_led_data));
219 evm_led_dev->dev.parent = &client->dev;
220 status = platform_device_add(evm_led_dev);
222 platform_device_put(evm_led_dev);
228 static int evm_led_teardown(struct i2c_client *client, int gpio,
229 unsigned ngpio, void *c)
232 platform_device_unregister(evm_led_dev);
238 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
240 static int evm_sw_setup(struct i2c_client *client, int gpio,
241 unsigned ngpio, void *c)
247 for (i = 0; i < 4; ++i) {
248 snprintf(label, 10, "user_sw%d", i);
249 status = gpio_request(gpio, label);
252 evm_sw_gpio[i] = gpio++;
254 status = gpio_direction_input(evm_sw_gpio[i]);
256 gpio_free(evm_sw_gpio[i]);
257 evm_sw_gpio[i] = -EINVAL;
261 status = gpio_export(evm_sw_gpio[i], 0);
263 gpio_free(evm_sw_gpio[i]);
264 evm_sw_gpio[i] = -EINVAL;
270 for (i = 0; i < 4; ++i) {
271 if (evm_sw_gpio[i] != -EINVAL) {
272 gpio_free(evm_sw_gpio[i]);
273 evm_sw_gpio[i] = -EINVAL;
279 static int evm_sw_teardown(struct i2c_client *client, int gpio,
280 unsigned ngpio, void *c)
284 for (i = 0; i < 4; ++i) {
285 if (evm_sw_gpio[i] != -EINVAL) {
286 gpio_unexport(evm_sw_gpio[i]);
287 gpio_free(evm_sw_gpio[i]);
288 evm_sw_gpio[i] = -EINVAL;
294 static int evm_pcf_setup(struct i2c_client *client, int gpio,
295 unsigned int ngpio, void *c)
302 status = evm_sw_setup(client, gpio, 4, c);
306 return evm_led_setup(client, gpio+4, 4, c);
309 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
310 unsigned int ngpio, void *c)
314 evm_sw_teardown(client, gpio, 4, c);
315 evm_led_teardown(client, gpio+4, 4, c);
320 static struct pcf857x_platform_data pcf_data = {
321 .gpio_base = DAVINCI_N_GPIO+1,
322 .setup = evm_pcf_setup,
323 .teardown = evm_pcf_teardown,
326 /* Most of this EEPROM is unused, but U-Boot uses some data:
327 * - 0x7f00, 6 bytes Ethernet Address
328 * - ... newer boards may have more
331 static struct at24_platform_data eeprom_info = {
332 .byte_len = (256*1024) / 8,
334 .flags = AT24_FLAG_ADDR16,
335 .setup = davinci_get_mac_addr,
336 .context = (void *)0x7f00,
339 static u8 dm646x_iis_serializer_direction[] = {
340 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
343 static u8 dm646x_dit_serializer_direction[] = {
347 static struct snd_platform_data dm646x_evm_snd_data[] = {
349 .tx_dma_offset = 0x400,
350 .rx_dma_offset = 0x400,
351 .op_mode = DAVINCI_MCASP_IIS_MODE,
352 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
354 .serial_dir = dm646x_iis_serializer_direction,
355 .eventq_no = EVENTQ_0,
358 .tx_dma_offset = 0x400,
360 .op_mode = DAVINCI_MCASP_DIT_MODE,
361 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
363 .serial_dir = dm646x_dit_serializer_direction,
364 .eventq_no = EVENTQ_0,
368 static struct i2c_client *cpld_client;
370 static int cpld_video_probe(struct i2c_client *client,
371 const struct i2c_device_id *id)
373 cpld_client = client;
377 static int __devexit cpld_video_remove(struct i2c_client *client)
383 static const struct i2c_device_id cpld_video_id[] = {
388 static struct i2c_driver cpld_video_driver = {
390 .name = "cpld_video",
392 .probe = cpld_video_probe,
393 .remove = cpld_video_remove,
394 .id_table = cpld_video_id,
397 static void evm_init_cpld(void)
399 i2c_add_driver(&cpld_video_driver);
402 static struct i2c_board_info __initdata i2c_info[] = {
404 I2C_BOARD_INFO("24c256", 0x50),
405 .platform_data = &eeprom_info,
408 I2C_BOARD_INFO("pcf8574a", 0x38),
409 .platform_data = &pcf_data,
412 I2C_BOARD_INFO("cpld_reg0", 0x3a),
415 I2C_BOARD_INFO("tlv320aic33", 0x18),
418 I2C_BOARD_INFO("cpld_video", 0x3b),
422 static struct davinci_i2c_platform_data i2c_pdata = {
423 .bus_freq = 100 /* kHz */,
424 .bus_delay = 0 /* usec */,
427 static int set_vpif_clock(int mux_mode, int hd)
434 if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
437 /* disable the clock */
438 spin_lock_irqsave(&vpif_reg_lock, flags);
439 value = __raw_readl(vpif_vsclkdis_reg);
440 value |= (VIDCH3CLK | VIDCH2CLK);
441 __raw_writel(value, vpif_vsclkdis_reg);
442 spin_unlock_irqrestore(&vpif_reg_lock, flags);
444 val = i2c_smbus_read_byte(cpld_client);
453 err = i2c_smbus_write_byte(cpld_client, val);
457 value = __raw_readl(vpif_vidclkctl_reg);
458 value &= ~(VCH2CLK_MASK);
459 value &= ~(VCH3CLK_MASK);
462 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
464 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
466 __raw_writel(value, vpif_vidclkctl_reg);
468 spin_lock_irqsave(&vpif_reg_lock, flags);
469 value = __raw_readl(vpif_vsclkdis_reg);
470 /* enable the clock */
471 value &= ~(VIDCH3CLK | VIDCH2CLK);
472 __raw_writel(value, vpif_vsclkdis_reg);
473 spin_unlock_irqrestore(&vpif_reg_lock, flags);
478 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
482 I2C_BOARD_INFO("adv7343", 0x2a),
488 I2C_BOARD_INFO("ths7303", 0x2c),
493 static const char *output[] = {
499 static struct vpif_display_config dm646x_vpif_display_config = {
500 .set_clock = set_vpif_clock,
501 .subdevinfo = dm646x_vpif_subdev,
502 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
504 .output_count = ARRAY_SIZE(output),
505 .card_name = "DM646x EVM",
509 * setup_vpif_input_path()
510 * @channel: channel id (0 - CH0, 1 - CH1)
511 * @sub_dev_name: ptr sub device name
513 * This will set vpif input to capture data from tvp514x or
516 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
521 /* for channel 1, we don't do anything */
528 val = i2c_smbus_read_byte(cpld_client);
532 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
533 !strcmp(sub_dev_name, TVP5147_CH1))
534 val &= TVP5147_INPUT;
536 val |= TVP7002_INPUT;
538 err = i2c_smbus_write_byte(cpld_client, val);
545 * setup_vpif_input_channel_mode()
546 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
548 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
550 static int setup_vpif_input_channel_mode(int mux_mode)
557 if (!vpif_vsclkdis_reg || !cpld_client)
560 val = i2c_smbus_read_byte(cpld_client);
564 spin_lock_irqsave(&vpif_reg_lock, flags);
565 value = __raw_readl(vpif_vsclkdis_reg);
567 val &= VPIF_INPUT_TWO_CHANNEL;
570 val |= VPIF_INPUT_ONE_CHANNEL;
573 __raw_writel(value, vpif_vsclkdis_reg);
574 spin_unlock_irqrestore(&vpif_reg_lock, flags);
576 err = i2c_smbus_write_byte(cpld_client, val);
583 static struct tvp514x_platform_data tvp5146_pdata = {
589 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
591 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
595 I2C_BOARD_INFO("tvp5146", 0x5d),
596 .platform_data = &tvp5146_pdata,
598 .input = INPUT_CVBS_VI2B,
599 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
602 .if_type = VPIF_IF_BT656,
611 I2C_BOARD_INFO("tvp5146", 0x5c),
612 .platform_data = &tvp5146_pdata,
614 .input = INPUT_SVIDEO_VI2C_VI1C,
615 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
618 .if_type = VPIF_IF_BT656,
626 static const struct vpif_input dm6467_ch0_inputs[] = {
631 .type = V4L2_INPUT_TYPE_CAMERA,
632 .std = TVP514X_STD_ALL,
634 .subdev_name = TVP5147_CH0,
638 static const struct vpif_input dm6467_ch1_inputs[] = {
643 .type = V4L2_INPUT_TYPE_CAMERA,
644 .std = TVP514X_STD_ALL,
646 .subdev_name = TVP5147_CH1,
650 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
651 .setup_input_path = setup_vpif_input_path,
652 .setup_input_channel_mode = setup_vpif_input_channel_mode,
653 .subdev_info = vpif_capture_sdev_info,
654 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
656 .inputs = dm6467_ch0_inputs,
657 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
660 .inputs = dm6467_ch1_inputs,
661 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
665 static void __init evm_init_video(void)
667 vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
668 vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
669 if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
670 pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
673 spin_lock_init(&vpif_reg_lock);
675 dm646x_setup_vpif(&dm646x_vpif_display_config,
676 &dm646x_vpif_capture_cfg);
679 static void __init evm_init_i2c(void)
681 davinci_init_i2c(&i2c_pdata);
682 i2c_add_driver(&dm6467evm_cpld_driver);
683 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
688 static void __init davinci_map_io(void)
693 static __init void evm_init(void)
695 struct davinci_soc_info *soc_info = &davinci_soc_info;
698 davinci_serial_init(&uart_config);
699 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
700 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
702 platform_device_register(&davinci_nand_device);
707 soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK;
708 soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
711 static __init void davinci_dm646x_evm_irq_init(void)
716 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
718 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
719 .boot_params = (0x80000100),
720 .map_io = davinci_map_io,
721 .init_irq = davinci_dm646x_evm_irq_init,
722 .timer = &davinci_timer,
723 .init_machine = evm_init,