2 * TI DaVinci DM646X EVM board
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
7 * (C) 2007-2008, MontaVista Software, Inc.
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
15 /**************************************************************************
17 **************************************************************************/
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c/at24.h>
26 #include <linux/i2c/pcf857x.h>
28 #include <media/tvp514x.h>
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/nand.h>
32 #include <linux/mtd/partitions.h>
33 #include <linux/clk.h>
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
38 #include <mach/dm646x.h>
39 #include <mach/common.h>
40 #include <mach/serial.h>
42 #include <mach/nand.h>
43 #include <mach/clock.h>
44 #include <mach/cdce949.h>
48 #define NAND_BLOCK_SIZE SZ_128K
50 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
51 * and U-Boot environment this avoids dependency on any particular combination
52 * of UBL, U-Boot or flashing tools etc.
54 static struct mtd_partition davinci_nand_partitions[] = {
56 /* UBL, U-Boot with environment */
58 .offset = MTDPART_OFS_APPEND,
59 .size = 16 * NAND_BLOCK_SIZE,
60 .mask_flags = MTD_WRITEABLE, /* force read-only */
63 .offset = MTDPART_OFS_APPEND,
68 .offset = MTDPART_OFS_APPEND,
69 .size = MTDPART_SIZ_FULL,
74 static struct davinci_nand_pdata davinci_nand_data = {
77 .parts = davinci_nand_partitions,
78 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
79 .ecc_mode = NAND_ECC_HW,
83 #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000
84 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000
86 static struct resource davinci_nand_resources[] = {
88 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
89 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
90 .flags = IORESOURCE_MEM,
92 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
93 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
94 .flags = IORESOURCE_MEM,
98 static struct platform_device davinci_nand_device = {
99 .name = "davinci_nand",
102 .num_resources = ARRAY_SIZE(davinci_nand_resources),
103 .resource = davinci_nand_resources,
106 .platform_data = &davinci_nand_data,
110 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
111 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
117 /* CPLD Register 0 bits to control ATA */
118 #define DM646X_EVM_ATA_RST BIT(0)
119 #define DM646X_EVM_ATA_PWD BIT(1)
121 /* CPLD Register 0 Client: used for I/O Control */
122 static int cpld_reg0_probe(struct i2c_client *client,
123 const struct i2c_device_id *id)
127 struct i2c_msg msg[2] = {
129 .addr = client->addr,
135 .addr = client->addr,
142 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
143 i2c_transfer(client->adapter, msg, 1);
144 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
145 i2c_transfer(client->adapter, msg + 1, 1);
151 static const struct i2c_device_id cpld_reg_ids[] = {
156 static struct i2c_driver dm6467evm_cpld_driver = {
157 .driver.name = "cpld_reg0",
158 .id_table = cpld_reg_ids,
159 .probe = cpld_reg0_probe,
164 static struct gpio_led evm_leds[] = {
165 { .name = "DS1", .active_low = 1, },
166 { .name = "DS2", .active_low = 1, },
167 { .name = "DS3", .active_low = 1, },
168 { .name = "DS4", .active_low = 1, },
171 static const struct gpio_led_platform_data evm_led_data = {
172 .num_leds = ARRAY_SIZE(evm_leds),
176 static struct platform_device *evm_led_dev;
178 static int evm_led_setup(struct i2c_client *client, int gpio,
179 unsigned int ngpio, void *c)
181 struct gpio_led *leds = evm_leds;
189 evm_led_dev = platform_device_alloc("leds-gpio", 0);
190 platform_device_add_data(evm_led_dev, &evm_led_data,
191 sizeof(evm_led_data));
193 evm_led_dev->dev.parent = &client->dev;
194 status = platform_device_add(evm_led_dev);
196 platform_device_put(evm_led_dev);
202 static int evm_led_teardown(struct i2c_client *client, int gpio,
203 unsigned ngpio, void *c)
206 platform_device_unregister(evm_led_dev);
212 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
214 static int evm_sw_setup(struct i2c_client *client, int gpio,
215 unsigned ngpio, void *c)
221 for (i = 0; i < 4; ++i) {
222 snprintf(label, 10, "user_sw%d", i);
223 status = gpio_request(gpio, label);
226 evm_sw_gpio[i] = gpio++;
228 status = gpio_direction_input(evm_sw_gpio[i]);
230 gpio_free(evm_sw_gpio[i]);
231 evm_sw_gpio[i] = -EINVAL;
235 status = gpio_export(evm_sw_gpio[i], 0);
237 gpio_free(evm_sw_gpio[i]);
238 evm_sw_gpio[i] = -EINVAL;
244 for (i = 0; i < 4; ++i) {
245 if (evm_sw_gpio[i] != -EINVAL) {
246 gpio_free(evm_sw_gpio[i]);
247 evm_sw_gpio[i] = -EINVAL;
253 static int evm_sw_teardown(struct i2c_client *client, int gpio,
254 unsigned ngpio, void *c)
258 for (i = 0; i < 4; ++i) {
259 if (evm_sw_gpio[i] != -EINVAL) {
260 gpio_unexport(evm_sw_gpio[i]);
261 gpio_free(evm_sw_gpio[i]);
262 evm_sw_gpio[i] = -EINVAL;
268 static int evm_pcf_setup(struct i2c_client *client, int gpio,
269 unsigned int ngpio, void *c)
276 status = evm_sw_setup(client, gpio, 4, c);
280 return evm_led_setup(client, gpio+4, 4, c);
283 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
284 unsigned int ngpio, void *c)
288 evm_sw_teardown(client, gpio, 4, c);
289 evm_led_teardown(client, gpio+4, 4, c);
294 static struct pcf857x_platform_data pcf_data = {
295 .gpio_base = DAVINCI_N_GPIO+1,
296 .setup = evm_pcf_setup,
297 .teardown = evm_pcf_teardown,
300 /* Most of this EEPROM is unused, but U-Boot uses some data:
301 * - 0x7f00, 6 bytes Ethernet Address
302 * - ... newer boards may have more
305 static struct at24_platform_data eeprom_info = {
306 .byte_len = (256*1024) / 8,
308 .flags = AT24_FLAG_ADDR16,
309 .setup = davinci_get_mac_addr,
310 .context = (void *)0x7f00,
313 static u8 dm646x_iis_serializer_direction[] = {
314 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
317 static u8 dm646x_dit_serializer_direction[] = {
321 static struct snd_platform_data dm646x_evm_snd_data[] = {
323 .tx_dma_offset = 0x400,
324 .rx_dma_offset = 0x400,
325 .op_mode = DAVINCI_MCASP_IIS_MODE,
326 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
328 .serial_dir = dm646x_iis_serializer_direction,
329 .eventq_no = EVENTQ_0,
332 .tx_dma_offset = 0x400,
334 .op_mode = DAVINCI_MCASP_DIT_MODE,
335 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
337 .serial_dir = dm646x_dit_serializer_direction,
338 .eventq_no = EVENTQ_0,
342 static struct i2c_client *cpld_client;
344 static int cpld_video_probe(struct i2c_client *client,
345 const struct i2c_device_id *id)
347 cpld_client = client;
351 static int __devexit cpld_video_remove(struct i2c_client *client)
357 static const struct i2c_device_id cpld_video_id[] = {
362 static struct i2c_driver cpld_video_driver = {
364 .name = "cpld_video",
366 .probe = cpld_video_probe,
367 .remove = cpld_video_remove,
368 .id_table = cpld_video_id,
371 static void evm_init_cpld(void)
373 i2c_add_driver(&cpld_video_driver);
376 static struct i2c_board_info __initdata i2c_info[] = {
378 I2C_BOARD_INFO("24c256", 0x50),
379 .platform_data = &eeprom_info,
382 I2C_BOARD_INFO("pcf8574a", 0x38),
383 .platform_data = &pcf_data,
386 I2C_BOARD_INFO("cpld_reg0", 0x3a),
389 I2C_BOARD_INFO("tlv320aic33", 0x18),
392 I2C_BOARD_INFO("cpld_video", 0x3b),
395 I2C_BOARD_INFO("cdce949", 0x6c),
399 static struct davinci_i2c_platform_data i2c_pdata = {
400 .bus_freq = 100 /* kHz */,
401 .bus_delay = 0 /* usec */,
404 #define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
405 #define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
406 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
407 #define VCH2CLK_SYSCLK8 (BIT(9))
408 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
409 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
410 #define VCH3CLK_SYSCLK8 (BIT(13))
411 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
413 #define VIDCH2CLK (BIT(10))
414 #define VIDCH3CLK (BIT(11))
415 #define VIDCH1CLK (BIT(4))
416 #define TVP7002_INPUT (BIT(4))
417 #define TVP5147_INPUT (~BIT(4))
418 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
419 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
420 #define TVP5147_CH0 "tvp514x-0"
421 #define TVP5147_CH1 "tvp514x-1"
423 static void __iomem *vpif_vidclkctl_reg;
424 static void __iomem *vpif_vsclkdis_reg;
425 /* spin lock for updating above registers */
426 static spinlock_t vpif_reg_lock;
428 static int set_vpif_clock(int mux_mode, int hd)
435 if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
438 /* disable the clock */
439 spin_lock_irqsave(&vpif_reg_lock, flags);
440 value = __raw_readl(vpif_vsclkdis_reg);
441 value |= (VIDCH3CLK | VIDCH2CLK);
442 __raw_writel(value, vpif_vsclkdis_reg);
443 spin_unlock_irqrestore(&vpif_reg_lock, flags);
445 val = i2c_smbus_read_byte(cpld_client);
454 err = i2c_smbus_write_byte(cpld_client, val);
458 value = __raw_readl(vpif_vidclkctl_reg);
459 value &= ~(VCH2CLK_MASK);
460 value &= ~(VCH3CLK_MASK);
463 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
465 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
467 __raw_writel(value, vpif_vidclkctl_reg);
469 spin_lock_irqsave(&vpif_reg_lock, flags);
470 value = __raw_readl(vpif_vsclkdis_reg);
471 /* enable the clock */
472 value &= ~(VIDCH3CLK | VIDCH2CLK);
473 __raw_writel(value, vpif_vsclkdis_reg);
474 spin_unlock_irqrestore(&vpif_reg_lock, flags);
479 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
483 I2C_BOARD_INFO("adv7343", 0x2a),
489 I2C_BOARD_INFO("ths7303", 0x2c),
494 static const char *output[] = {
500 static struct vpif_display_config dm646x_vpif_display_config = {
501 .set_clock = set_vpif_clock,
502 .subdevinfo = dm646x_vpif_subdev,
503 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
505 .output_count = ARRAY_SIZE(output),
506 .card_name = "DM646x EVM",
510 * setup_vpif_input_path()
511 * @channel: channel id (0 - CH0, 1 - CH1)
512 * @sub_dev_name: ptr sub device name
514 * This will set vpif input to capture data from tvp514x or
517 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
522 /* for channel 1, we don't do anything */
529 val = i2c_smbus_read_byte(cpld_client);
533 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
534 !strcmp(sub_dev_name, TVP5147_CH1))
535 val &= TVP5147_INPUT;
537 val |= TVP7002_INPUT;
539 err = i2c_smbus_write_byte(cpld_client, val);
546 * setup_vpif_input_channel_mode()
547 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
549 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
551 static int setup_vpif_input_channel_mode(int mux_mode)
558 if (!vpif_vsclkdis_reg || !cpld_client)
561 val = i2c_smbus_read_byte(cpld_client);
565 spin_lock_irqsave(&vpif_reg_lock, flags);
566 value = __raw_readl(vpif_vsclkdis_reg);
568 val &= VPIF_INPUT_TWO_CHANNEL;
571 val |= VPIF_INPUT_ONE_CHANNEL;
574 __raw_writel(value, vpif_vsclkdis_reg);
575 spin_unlock_irqrestore(&vpif_reg_lock, flags);
577 err = i2c_smbus_write_byte(cpld_client, val);
584 static struct tvp514x_platform_data tvp5146_pdata = {
590 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
592 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
596 I2C_BOARD_INFO("tvp5146", 0x5d),
597 .platform_data = &tvp5146_pdata,
599 .input = INPUT_CVBS_VI2B,
600 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
603 .if_type = VPIF_IF_BT656,
612 I2C_BOARD_INFO("tvp5146", 0x5c),
613 .platform_data = &tvp5146_pdata,
615 .input = INPUT_SVIDEO_VI2C_VI1C,
616 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
619 .if_type = VPIF_IF_BT656,
627 static const struct vpif_input dm6467_ch0_inputs[] = {
632 .type = V4L2_INPUT_TYPE_CAMERA,
633 .std = TVP514X_STD_ALL,
635 .subdev_name = TVP5147_CH0,
639 static const struct vpif_input dm6467_ch1_inputs[] = {
644 .type = V4L2_INPUT_TYPE_CAMERA,
645 .std = TVP514X_STD_ALL,
647 .subdev_name = TVP5147_CH1,
651 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
652 .setup_input_path = setup_vpif_input_path,
653 .setup_input_channel_mode = setup_vpif_input_channel_mode,
654 .subdev_info = vpif_capture_sdev_info,
655 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
657 .inputs = dm6467_ch0_inputs,
658 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
661 .inputs = dm6467_ch1_inputs,
662 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
666 static void __init evm_init_video(void)
668 vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
669 vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
670 if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
671 pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
674 spin_lock_init(&vpif_reg_lock);
676 dm646x_setup_vpif(&dm646x_vpif_display_config,
677 &dm646x_vpif_capture_cfg);
680 static void __init evm_init_i2c(void)
682 davinci_init_i2c(&i2c_pdata);
683 i2c_add_driver(&dm6467evm_cpld_driver);
684 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
689 #define CDCE949_XIN_RATE 27000000
691 /* CDCE949 support - "lpsc" field is overridden to work as clock number */
692 static struct clk cdce_clk_in = {
694 .rate = CDCE949_XIN_RATE,
697 static struct clk_lookup cdce_clks[] = {
698 CLK(NULL, "xin", &cdce_clk_in),
699 CLK(NULL, NULL, NULL),
702 static void __init cdce_clk_init(void)
704 struct clk_lookup *c;
707 for (c = cdce_clks; c->clk; c++) {
714 static void __init davinci_map_io(void)
720 static struct davinci_uart_config uart_config __initdata = {
721 .enabled_uarts = (1 << 0),
724 #define DM646X_EVM_PHY_MASK (0x2)
725 #define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
727 static __init void evm_init(void)
729 struct davinci_soc_info *soc_info = &davinci_soc_info;
732 davinci_serial_init(&uart_config);
733 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
734 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
736 platform_device_register(&davinci_nand_device);
741 soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK;
742 soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
745 static __init void davinci_dm646x_evm_irq_init(void)
750 #define DM646X_EVM_REF_FREQ 27000000
751 #define DM6467T_EVM_REF_FREQ 33000000
753 void __init dm646x_board_setup_refclk(struct clk *clk)
755 if (machine_is_davinci_dm6467tevm())
756 clk->rate = DM6467T_EVM_REF_FREQ;
758 clk->rate = DM646X_EVM_REF_FREQ;
761 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
763 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
764 .boot_params = (0x80000100),
765 .map_io = davinci_map_io,
766 .init_irq = davinci_dm646x_evm_irq_init,
767 .timer = &davinci_timer,
768 .init_machine = evm_init,
771 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
773 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
774 .boot_params = (0x80000100),
775 .map_io = davinci_map_io,
776 .init_irq = davinci_dm646x_evm_irq_init,
777 .timer = &davinci_timer,
778 .init_machine = evm_init,