2 * arch/arm/mach-dove/common.c
4 * Core functions for Marvell Dove 88AP510 System On Chip
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/pci.h>
16 #include <linux/serial_8250.h>
17 #include <linux/clk.h>
18 #include <linux/mbus.h>
19 #include <linux/mv643xx_eth.h>
20 #include <linux/mv643xx_i2c.h>
21 #include <linux/ata_platform.h>
22 #include <linux/spi/orion_spi.h>
23 #include <linux/gpio.h>
25 #include <asm/setup.h>
26 #include <asm/timex.h>
27 #include <asm/hardware/cache-tauros2.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/time.h>
30 #include <asm/mach/pci.h>
31 #include <mach/dove.h>
32 #include <mach/bridge-regs.h>
33 #include <asm/mach/arch.h>
34 #include <linux/irq.h>
35 #include <plat/mv_xor.h>
36 #include <plat/ehci-orion.h>
37 #include <plat/time.h>
40 /*****************************************************************************
42 ****************************************************************************/
43 static struct map_desc dove_io_desc[] __initdata = {
45 .virtual = DOVE_SB_REGS_VIRT_BASE,
46 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
47 .length = DOVE_SB_REGS_SIZE,
50 .virtual = DOVE_NB_REGS_VIRT_BASE,
51 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
52 .length = DOVE_NB_REGS_SIZE,
55 .virtual = DOVE_PCIE0_IO_VIRT_BASE,
56 .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
57 .length = DOVE_PCIE0_IO_SIZE,
60 .virtual = DOVE_PCIE1_IO_VIRT_BASE,
61 .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
62 .length = DOVE_PCIE1_IO_SIZE,
67 void __init dove_map_io(void)
69 iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
72 /*****************************************************************************
74 ****************************************************************************/
75 static struct orion_ehci_data dove_ehci_data = {
76 .dram = &dove_mbus_dram_info,
77 .phy_version = EHCI_PHY_NA,
80 static u64 ehci_dmamask = DMA_BIT_MASK(32);
82 /*****************************************************************************
84 ****************************************************************************/
85 static struct resource dove_ehci0_resources[] = {
87 .start = DOVE_USB0_PHYS_BASE,
88 .end = DOVE_USB0_PHYS_BASE + SZ_4K - 1,
89 .flags = IORESOURCE_MEM,
91 .start = IRQ_DOVE_USB0,
93 .flags = IORESOURCE_IRQ,
97 static struct platform_device dove_ehci0 = {
101 .dma_mask = &ehci_dmamask,
102 .coherent_dma_mask = DMA_BIT_MASK(32),
103 .platform_data = &dove_ehci_data,
105 .resource = dove_ehci0_resources,
106 .num_resources = ARRAY_SIZE(dove_ehci0_resources),
109 void __init dove_ehci0_init(void)
111 platform_device_register(&dove_ehci0);
114 /*****************************************************************************
116 ****************************************************************************/
117 static struct resource dove_ehci1_resources[] = {
119 .start = DOVE_USB1_PHYS_BASE,
120 .end = DOVE_USB1_PHYS_BASE + SZ_4K - 1,
121 .flags = IORESOURCE_MEM,
123 .start = IRQ_DOVE_USB1,
124 .end = IRQ_DOVE_USB1,
125 .flags = IORESOURCE_IRQ,
129 static struct platform_device dove_ehci1 = {
130 .name = "orion-ehci",
133 .dma_mask = &ehci_dmamask,
134 .coherent_dma_mask = DMA_BIT_MASK(32),
135 .platform_data = &dove_ehci_data,
137 .resource = dove_ehci1_resources,
138 .num_resources = ARRAY_SIZE(dove_ehci1_resources),
141 void __init dove_ehci1_init(void)
143 platform_device_register(&dove_ehci1);
146 /*****************************************************************************
148 ****************************************************************************/
149 struct mv643xx_eth_shared_platform_data dove_ge00_shared_data = {
151 .dram = &dove_mbus_dram_info,
154 static struct resource dove_ge00_shared_resources[] = {
157 .start = DOVE_GE00_PHYS_BASE + 0x2000,
158 .end = DOVE_GE00_PHYS_BASE + SZ_16K - 1,
159 .flags = IORESOURCE_MEM,
163 static struct platform_device dove_ge00_shared = {
164 .name = MV643XX_ETH_SHARED_NAME,
167 .platform_data = &dove_ge00_shared_data,
170 .resource = dove_ge00_shared_resources,
173 static struct resource dove_ge00_resources[] = {
176 .start = IRQ_DOVE_GE00_SUM,
177 .end = IRQ_DOVE_GE00_SUM,
178 .flags = IORESOURCE_IRQ,
182 static struct platform_device dove_ge00 = {
183 .name = MV643XX_ETH_NAME,
186 .resource = dove_ge00_resources,
188 .coherent_dma_mask = 0xffffffff,
192 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
194 eth_data->shared = &dove_ge00_shared;
195 dove_ge00.dev.platform_data = eth_data;
197 platform_device_register(&dove_ge00_shared);
198 platform_device_register(&dove_ge00);
201 /*****************************************************************************
203 ****************************************************************************/
204 static struct resource dove_rtc_resource[] = {
206 .start = DOVE_RTC_PHYS_BASE,
207 .end = DOVE_RTC_PHYS_BASE + 32 - 1,
208 .flags = IORESOURCE_MEM,
210 .start = IRQ_DOVE_RTC,
211 .flags = IORESOURCE_IRQ,
215 void __init dove_rtc_init(void)
217 platform_device_register_simple("rtc-mv", -1, dove_rtc_resource, 2);
220 /*****************************************************************************
222 ****************************************************************************/
223 static struct resource dove_sata_resources[] = {
226 .start = DOVE_SATA_PHYS_BASE,
227 .end = DOVE_SATA_PHYS_BASE + 0x5000 - 1,
228 .flags = IORESOURCE_MEM,
231 .start = IRQ_DOVE_SATA,
232 .end = IRQ_DOVE_SATA,
233 .flags = IORESOURCE_IRQ,
237 static struct platform_device dove_sata = {
241 .coherent_dma_mask = DMA_BIT_MASK(32),
243 .num_resources = ARRAY_SIZE(dove_sata_resources),
244 .resource = dove_sata_resources,
247 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
249 sata_data->dram = &dove_mbus_dram_info;
250 dove_sata.dev.platform_data = sata_data;
251 platform_device_register(&dove_sata);
254 /*****************************************************************************
256 ****************************************************************************/
257 static struct plat_serial8250_port dove_uart0_data[] = {
259 .mapbase = DOVE_UART0_PHYS_BASE,
260 .membase = (char *)DOVE_UART0_VIRT_BASE,
261 .irq = IRQ_DOVE_UART_0,
262 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
270 static struct resource dove_uart0_resources[] = {
272 .start = DOVE_UART0_PHYS_BASE,
273 .end = DOVE_UART0_PHYS_BASE + SZ_256 - 1,
274 .flags = IORESOURCE_MEM,
276 .start = IRQ_DOVE_UART_0,
277 .end = IRQ_DOVE_UART_0,
278 .flags = IORESOURCE_IRQ,
282 static struct platform_device dove_uart0 = {
283 .name = "serial8250",
286 .platform_data = dove_uart0_data,
288 .resource = dove_uart0_resources,
289 .num_resources = ARRAY_SIZE(dove_uart0_resources),
292 void __init dove_uart0_init(void)
294 platform_device_register(&dove_uart0);
297 /*****************************************************************************
299 ****************************************************************************/
300 static struct plat_serial8250_port dove_uart1_data[] = {
302 .mapbase = DOVE_UART1_PHYS_BASE,
303 .membase = (char *)DOVE_UART1_VIRT_BASE,
304 .irq = IRQ_DOVE_UART_1,
305 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
313 static struct resource dove_uart1_resources[] = {
315 .start = DOVE_UART1_PHYS_BASE,
316 .end = DOVE_UART1_PHYS_BASE + SZ_256 - 1,
317 .flags = IORESOURCE_MEM,
319 .start = IRQ_DOVE_UART_1,
320 .end = IRQ_DOVE_UART_1,
321 .flags = IORESOURCE_IRQ,
325 static struct platform_device dove_uart1 = {
326 .name = "serial8250",
329 .platform_data = dove_uart1_data,
331 .resource = dove_uart1_resources,
332 .num_resources = ARRAY_SIZE(dove_uart1_resources),
335 void __init dove_uart1_init(void)
337 platform_device_register(&dove_uart1);
340 /*****************************************************************************
342 ****************************************************************************/
343 static struct plat_serial8250_port dove_uart2_data[] = {
345 .mapbase = DOVE_UART2_PHYS_BASE,
346 .membase = (char *)DOVE_UART2_VIRT_BASE,
347 .irq = IRQ_DOVE_UART_2,
348 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
356 static struct resource dove_uart2_resources[] = {
358 .start = DOVE_UART2_PHYS_BASE,
359 .end = DOVE_UART2_PHYS_BASE + SZ_256 - 1,
360 .flags = IORESOURCE_MEM,
362 .start = IRQ_DOVE_UART_2,
363 .end = IRQ_DOVE_UART_2,
364 .flags = IORESOURCE_IRQ,
368 static struct platform_device dove_uart2 = {
369 .name = "serial8250",
372 .platform_data = dove_uart2_data,
374 .resource = dove_uart2_resources,
375 .num_resources = ARRAY_SIZE(dove_uart2_resources),
378 void __init dove_uart2_init(void)
380 platform_device_register(&dove_uart2);
383 /*****************************************************************************
385 ****************************************************************************/
386 static struct plat_serial8250_port dove_uart3_data[] = {
388 .mapbase = DOVE_UART3_PHYS_BASE,
389 .membase = (char *)DOVE_UART3_VIRT_BASE,
390 .irq = IRQ_DOVE_UART_3,
391 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
399 static struct resource dove_uart3_resources[] = {
401 .start = DOVE_UART3_PHYS_BASE,
402 .end = DOVE_UART3_PHYS_BASE + SZ_256 - 1,
403 .flags = IORESOURCE_MEM,
405 .start = IRQ_DOVE_UART_3,
406 .end = IRQ_DOVE_UART_3,
407 .flags = IORESOURCE_IRQ,
411 static struct platform_device dove_uart3 = {
412 .name = "serial8250",
415 .platform_data = dove_uart3_data,
417 .resource = dove_uart3_resources,
418 .num_resources = ARRAY_SIZE(dove_uart3_resources),
421 void __init dove_uart3_init(void)
423 platform_device_register(&dove_uart3);
426 /*****************************************************************************
428 ****************************************************************************/
429 static struct orion_spi_info dove_spi0_data = {
433 static struct resource dove_spi0_resources[] = {
435 .start = DOVE_SPI0_PHYS_BASE,
436 .end = DOVE_SPI0_PHYS_BASE + SZ_512 - 1,
437 .flags = IORESOURCE_MEM,
439 .start = IRQ_DOVE_SPI0,
440 .end = IRQ_DOVE_SPI0,
441 .flags = IORESOURCE_IRQ,
445 static struct platform_device dove_spi0 = {
448 .resource = dove_spi0_resources,
450 .platform_data = &dove_spi0_data,
452 .num_resources = ARRAY_SIZE(dove_spi0_resources),
455 void __init dove_spi0_init(void)
457 platform_device_register(&dove_spi0);
460 /*****************************************************************************
462 ****************************************************************************/
463 static struct orion_spi_info dove_spi1_data = {
467 static struct resource dove_spi1_resources[] = {
469 .start = DOVE_SPI1_PHYS_BASE,
470 .end = DOVE_SPI1_PHYS_BASE + SZ_512 - 1,
471 .flags = IORESOURCE_MEM,
473 .start = IRQ_DOVE_SPI1,
474 .end = IRQ_DOVE_SPI1,
475 .flags = IORESOURCE_IRQ,
479 static struct platform_device dove_spi1 = {
482 .resource = dove_spi1_resources,
484 .platform_data = &dove_spi1_data,
486 .num_resources = ARRAY_SIZE(dove_spi1_resources),
489 void __init dove_spi1_init(void)
491 platform_device_register(&dove_spi1);
494 /*****************************************************************************
496 ****************************************************************************/
497 static struct mv64xxx_i2c_pdata dove_i2c_data = {
498 .freq_m = 10, /* assumes 166 MHz TCLK gets 94.3kHz */
500 .timeout = 1000, /* Default timeout of 1 second */
503 static struct resource dove_i2c_resources[] = {
506 .start = DOVE_I2C_PHYS_BASE,
507 .end = DOVE_I2C_PHYS_BASE + 0x20 - 1,
508 .flags = IORESOURCE_MEM,
511 .start = IRQ_DOVE_I2C,
513 .flags = IORESOURCE_IRQ,
517 static struct platform_device dove_i2c = {
518 .name = MV64XXX_I2C_CTLR_NAME,
520 .num_resources = ARRAY_SIZE(dove_i2c_resources),
521 .resource = dove_i2c_resources,
523 .platform_data = &dove_i2c_data,
527 void __init dove_i2c_init(void)
529 platform_device_register(&dove_i2c);
532 /*****************************************************************************
534 ****************************************************************************/
535 static int get_tclk(void)
537 /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
541 static void dove_timer_init(void)
543 orion_time_init(IRQ_DOVE_BRIDGE, get_tclk());
546 struct sys_timer dove_timer = {
547 .init = dove_timer_init,
550 /*****************************************************************************
552 ****************************************************************************/
553 static struct mv_xor_platform_shared_data dove_xor_shared_data = {
554 .dram = &dove_mbus_dram_info,
557 /*****************************************************************************
559 ****************************************************************************/
560 static u64 dove_xor0_dmamask = DMA_BIT_MASK(32);
562 static struct resource dove_xor0_shared_resources[] = {
565 .start = DOVE_XOR0_PHYS_BASE,
566 .end = DOVE_XOR0_PHYS_BASE + 0xff,
567 .flags = IORESOURCE_MEM,
569 .name = "xor 0 high",
570 .start = DOVE_XOR0_HIGH_PHYS_BASE,
571 .end = DOVE_XOR0_HIGH_PHYS_BASE + 0xff,
572 .flags = IORESOURCE_MEM,
576 static struct platform_device dove_xor0_shared = {
577 .name = MV_XOR_SHARED_NAME,
580 .platform_data = &dove_xor_shared_data,
582 .num_resources = ARRAY_SIZE(dove_xor0_shared_resources),
583 .resource = dove_xor0_shared_resources,
586 static struct resource dove_xor00_resources[] = {
588 .start = IRQ_DOVE_XOR_00,
589 .end = IRQ_DOVE_XOR_00,
590 .flags = IORESOURCE_IRQ,
594 static struct mv_xor_platform_data dove_xor00_data = {
595 .shared = &dove_xor0_shared,
597 .pool_size = PAGE_SIZE,
600 static struct platform_device dove_xor00_channel = {
603 .num_resources = ARRAY_SIZE(dove_xor00_resources),
604 .resource = dove_xor00_resources,
606 .dma_mask = &dove_xor0_dmamask,
607 .coherent_dma_mask = DMA_BIT_MASK(64),
608 .platform_data = (void *)&dove_xor00_data,
612 static struct resource dove_xor01_resources[] = {
614 .start = IRQ_DOVE_XOR_01,
615 .end = IRQ_DOVE_XOR_01,
616 .flags = IORESOURCE_IRQ,
620 static struct mv_xor_platform_data dove_xor01_data = {
621 .shared = &dove_xor0_shared,
623 .pool_size = PAGE_SIZE,
626 static struct platform_device dove_xor01_channel = {
629 .num_resources = ARRAY_SIZE(dove_xor01_resources),
630 .resource = dove_xor01_resources,
632 .dma_mask = &dove_xor0_dmamask,
633 .coherent_dma_mask = DMA_BIT_MASK(64),
634 .platform_data = (void *)&dove_xor01_data,
638 void __init dove_xor0_init(void)
640 platform_device_register(&dove_xor0_shared);
643 * two engines can't do memset simultaneously, this limitation
644 * satisfied by removing memset support from one of the engines.
646 dma_cap_set(DMA_MEMCPY, dove_xor00_data.cap_mask);
647 dma_cap_set(DMA_XOR, dove_xor00_data.cap_mask);
648 platform_device_register(&dove_xor00_channel);
650 dma_cap_set(DMA_MEMCPY, dove_xor01_data.cap_mask);
651 dma_cap_set(DMA_MEMSET, dove_xor01_data.cap_mask);
652 dma_cap_set(DMA_XOR, dove_xor01_data.cap_mask);
653 platform_device_register(&dove_xor01_channel);
656 /*****************************************************************************
658 ****************************************************************************/
659 static u64 dove_xor1_dmamask = DMA_BIT_MASK(32);
661 static struct resource dove_xor1_shared_resources[] = {
664 .start = DOVE_XOR1_PHYS_BASE,
665 .end = DOVE_XOR1_PHYS_BASE + 0xff,
666 .flags = IORESOURCE_MEM,
668 .name = "xor 0 high",
669 .start = DOVE_XOR1_HIGH_PHYS_BASE,
670 .end = DOVE_XOR1_HIGH_PHYS_BASE + 0xff,
671 .flags = IORESOURCE_MEM,
675 static struct platform_device dove_xor1_shared = {
676 .name = MV_XOR_SHARED_NAME,
679 .platform_data = &dove_xor_shared_data,
681 .num_resources = ARRAY_SIZE(dove_xor1_shared_resources),
682 .resource = dove_xor1_shared_resources,
685 static struct resource dove_xor10_resources[] = {
687 .start = IRQ_DOVE_XOR_10,
688 .end = IRQ_DOVE_XOR_10,
689 .flags = IORESOURCE_IRQ,
693 static struct mv_xor_platform_data dove_xor10_data = {
694 .shared = &dove_xor1_shared,
696 .pool_size = PAGE_SIZE,
699 static struct platform_device dove_xor10_channel = {
702 .num_resources = ARRAY_SIZE(dove_xor10_resources),
703 .resource = dove_xor10_resources,
705 .dma_mask = &dove_xor1_dmamask,
706 .coherent_dma_mask = DMA_BIT_MASK(64),
707 .platform_data = (void *)&dove_xor10_data,
711 static struct resource dove_xor11_resources[] = {
713 .start = IRQ_DOVE_XOR_11,
714 .end = IRQ_DOVE_XOR_11,
715 .flags = IORESOURCE_IRQ,
719 static struct mv_xor_platform_data dove_xor11_data = {
720 .shared = &dove_xor1_shared,
722 .pool_size = PAGE_SIZE,
725 static struct platform_device dove_xor11_channel = {
728 .num_resources = ARRAY_SIZE(dove_xor11_resources),
729 .resource = dove_xor11_resources,
731 .dma_mask = &dove_xor1_dmamask,
732 .coherent_dma_mask = DMA_BIT_MASK(64),
733 .platform_data = (void *)&dove_xor11_data,
737 void __init dove_xor1_init(void)
739 platform_device_register(&dove_xor1_shared);
742 * two engines can't do memset simultaneously, this limitation
743 * satisfied by removing memset support from one of the engines.
745 dma_cap_set(DMA_MEMCPY, dove_xor10_data.cap_mask);
746 dma_cap_set(DMA_XOR, dove_xor10_data.cap_mask);
747 platform_device_register(&dove_xor10_channel);
749 dma_cap_set(DMA_MEMCPY, dove_xor11_data.cap_mask);
750 dma_cap_set(DMA_MEMSET, dove_xor11_data.cap_mask);
751 dma_cap_set(DMA_XOR, dove_xor11_data.cap_mask);
752 platform_device_register(&dove_xor11_channel);
755 void __init dove_init(void)
761 printk(KERN_INFO "Dove 88AP510 SoC, ");
762 printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
764 #ifdef CONFIG_CACHE_TAUROS2
767 dove_setup_cpu_mbus();
769 dove_ge00_shared_data.t_clk = tclk;
770 dove_uart0_data[0].uartclk = tclk;
771 dove_uart1_data[0].uartclk = tclk;
772 dove_uart2_data[0].uartclk = tclk;
773 dove_uart3_data[0].uartclk = tclk;
774 dove_spi0_data.tclk = tclk;
775 dove_spi1_data.tclk = tclk;
777 /* internal devices that every board has */