2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/timex.h>
25 #include <linux/irq.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/i2c.h>
33 #include <linux/i2c-gpio.h>
34 #include <linux/spi/spi.h>
36 #include <mach/hardware.h>
38 #include <mach/ep93xx_keypad.h>
39 #include <mach/ep93xx_spi.h>
41 #include <asm/mach/map.h>
42 #include <asm/mach/time.h>
44 #include <asm/hardware/vic.h>
47 /*************************************************************************
48 * Static I/O mappings that are needed for all EP93xx platforms
49 *************************************************************************/
50 static struct map_desc ep93xx_io_desc[] __initdata = {
52 .virtual = EP93XX_AHB_VIRT_BASE,
53 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
54 .length = EP93XX_AHB_SIZE,
57 .virtual = EP93XX_APB_VIRT_BASE,
58 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
59 .length = EP93XX_APB_SIZE,
64 void __init ep93xx_map_io(void)
66 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
70 /*************************************************************************
71 * Timer handling for EP93xx
72 *************************************************************************
73 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
74 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
75 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
76 * is free-running, and can't generate interrupts.
78 * The 508 kHz timers are ideal for use for the timer interrupt, as the
79 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
80 * bit timers (timer 1) since we don't need more than 16 bits of reload
81 * value as long as HZ >= 8.
83 * The higher clock rate of timer 4 makes it a better choice than the
84 * other timers for use in gettimeoffset(), while the fact that it can't
85 * generate interrupts means we don't have to worry about not being able
86 * to use this timer for something else. We also use timer 4 for keeping
87 * track of lost jiffies.
89 #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
90 #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
91 #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
92 #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
93 #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
94 #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
95 #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
96 #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
97 #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
98 #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
99 #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
100 #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
101 #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
102 #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
103 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
104 #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
105 #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
106 #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
107 #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
109 #define EP93XX_TIMER123_CLOCK 508469
110 #define EP93XX_TIMER4_CLOCK 983040
112 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
113 #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
115 static unsigned int last_jiffy_time;
117 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
119 /* Writing any value clears the timer interrupt */
120 __raw_writel(1, EP93XX_TIMER1_CLEAR);
122 /* Recover lost jiffies */
124 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
125 >= TIMER4_TICKS_PER_JIFFY) {
126 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
133 static struct irqaction ep93xx_timer_irq = {
134 .name = "ep93xx timer",
135 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
136 .handler = ep93xx_timer_interrupt,
139 static void __init ep93xx_timer_init(void)
141 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
142 EP93XX_TIMER123_CONTROL_CLKSEL;
144 /* Enable periodic HZ timer. */
145 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
146 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
147 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
148 EP93XX_TIMER1_CONTROL);
150 /* Enable lost jiffy timer. */
151 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
152 EP93XX_TIMER4_VALUE_HIGH);
154 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
157 static unsigned long ep93xx_gettimeoffset(void)
161 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
163 /* Calculate (1000000 / 983040) * offset. */
164 return offset + (53 * offset / 3072);
167 struct sys_timer ep93xx_timer = {
168 .init = ep93xx_timer_init,
169 .offset = ep93xx_gettimeoffset,
173 /*************************************************************************
174 * EP93xx IRQ handling
175 *************************************************************************/
176 extern void ep93xx_gpio_init_irq(void);
178 void __init ep93xx_init_irq(void)
180 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
181 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
183 ep93xx_gpio_init_irq();
187 /*************************************************************************
188 * EP93xx System Controller Software Locked register handling
189 *************************************************************************/
192 * syscon_swlock prevents anything else from writing to the syscon
193 * block while a software locked register is being written.
195 static DEFINE_SPINLOCK(syscon_swlock);
197 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
201 spin_lock_irqsave(&syscon_swlock, flags);
203 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
204 __raw_writel(val, reg);
206 spin_unlock_irqrestore(&syscon_swlock, flags);
208 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
210 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
215 spin_lock_irqsave(&syscon_swlock, flags);
217 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
220 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
221 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
223 spin_unlock_irqrestore(&syscon_swlock, flags);
225 EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
228 * ep93xx_chip_revision() - returns the EP93xx chip revision
230 * See <mach/platform.h> for more information.
232 unsigned int ep93xx_chip_revision(void)
236 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
237 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
238 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
242 /*************************************************************************
243 * EP93xx peripheral handling
244 *************************************************************************/
245 #define EP93XX_UART_MCR_OFFSET (0x0100)
247 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
248 void __iomem *base, unsigned int mctrl)
253 if (!(mctrl & TIOCM_RTS))
255 if (!(mctrl & TIOCM_DTR))
258 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
261 static struct amba_pl010_data ep93xx_uart_data = {
262 .set_mctrl = ep93xx_uart_set_mctrl,
265 static struct amba_device uart1_device = {
267 .init_name = "apb:uart1",
268 .platform_data = &ep93xx_uart_data,
271 .start = EP93XX_UART1_PHYS_BASE,
272 .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
273 .flags = IORESOURCE_MEM,
275 .irq = { IRQ_EP93XX_UART1, NO_IRQ },
276 .periphid = 0x00041010,
279 static struct amba_device uart2_device = {
281 .init_name = "apb:uart2",
282 .platform_data = &ep93xx_uart_data,
285 .start = EP93XX_UART2_PHYS_BASE,
286 .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
287 .flags = IORESOURCE_MEM,
289 .irq = { IRQ_EP93XX_UART2, NO_IRQ },
290 .periphid = 0x00041010,
293 static struct amba_device uart3_device = {
295 .init_name = "apb:uart3",
296 .platform_data = &ep93xx_uart_data,
299 .start = EP93XX_UART3_PHYS_BASE,
300 .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
301 .flags = IORESOURCE_MEM,
303 .irq = { IRQ_EP93XX_UART3, NO_IRQ },
304 .periphid = 0x00041010,
308 static struct resource ep93xx_rtc_resource[] = {
310 .start = EP93XX_RTC_PHYS_BASE,
311 .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
312 .flags = IORESOURCE_MEM,
316 static struct platform_device ep93xx_rtc_device = {
317 .name = "ep93xx-rtc",
319 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
320 .resource = ep93xx_rtc_resource,
324 static struct resource ep93xx_ohci_resources[] = {
326 .start = EP93XX_USB_PHYS_BASE,
327 .end = EP93XX_USB_PHYS_BASE + 0x0fff,
328 .flags = IORESOURCE_MEM,
331 .start = IRQ_EP93XX_USB,
332 .end = IRQ_EP93XX_USB,
333 .flags = IORESOURCE_IRQ,
338 static struct platform_device ep93xx_ohci_device = {
339 .name = "ep93xx-ohci",
342 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
343 .coherent_dma_mask = DMA_BIT_MASK(32),
345 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
346 .resource = ep93xx_ohci_resources,
350 /*************************************************************************
351 * EP93xx ethernet peripheral handling
352 *************************************************************************/
353 static struct ep93xx_eth_data ep93xx_eth_data;
355 static struct resource ep93xx_eth_resource[] = {
357 .start = EP93XX_ETHERNET_PHYS_BASE,
358 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
359 .flags = IORESOURCE_MEM,
361 .start = IRQ_EP93XX_ETHERNET,
362 .end = IRQ_EP93XX_ETHERNET,
363 .flags = IORESOURCE_IRQ,
367 static struct platform_device ep93xx_eth_device = {
368 .name = "ep93xx-eth",
371 .platform_data = &ep93xx_eth_data,
373 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
374 .resource = ep93xx_eth_resource,
378 * ep93xx_register_eth - Register the built-in ethernet platform device.
379 * @data: platform specific ethernet configuration (__initdata)
380 * @copy_addr: flag indicating that the MAC address should be copied
381 * from the IndAd registers (as programmed by the bootloader)
383 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
386 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
388 ep93xx_eth_data = *data;
389 platform_device_register(&ep93xx_eth_device);
393 /*************************************************************************
394 * EP93xx i2c peripheral handling
395 *************************************************************************/
396 static struct i2c_gpio_platform_data ep93xx_i2c_data;
398 static struct platform_device ep93xx_i2c_device = {
402 .platform_data = &ep93xx_i2c_data,
407 * ep93xx_register_i2c - Register the i2c platform device.
408 * @data: platform specific i2c-gpio configuration (__initdata)
409 * @devices: platform specific i2c bus device information (__initdata)
410 * @num: the number of devices on the i2c bus
412 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
413 struct i2c_board_info *devices, int num)
416 * Set the EEPROM interface pin drive type control.
417 * Defines the driver type for the EECLK and EEDAT pins as either
418 * open drain, which will require an external pull-up, or a normal
421 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
422 pr_warning("sda != EEDAT, open drain has no effect\n");
423 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
424 pr_warning("scl != EECLK, open drain has no effect\n");
426 __raw_writel((data->sda_is_open_drain << 1) |
427 (data->scl_is_open_drain << 0),
428 EP93XX_GPIO_EEDRIVE);
430 ep93xx_i2c_data = *data;
431 i2c_register_board_info(0, devices, num);
432 platform_device_register(&ep93xx_i2c_device);
435 /*************************************************************************
436 * EP93xx SPI peripheral handling
437 *************************************************************************/
438 static struct ep93xx_spi_info ep93xx_spi_master_data;
440 static struct resource ep93xx_spi_resources[] = {
442 .start = EP93XX_SPI_PHYS_BASE,
443 .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
444 .flags = IORESOURCE_MEM,
447 .start = IRQ_EP93XX_SSP,
448 .end = IRQ_EP93XX_SSP,
449 .flags = IORESOURCE_IRQ,
453 static struct platform_device ep93xx_spi_device = {
454 .name = "ep93xx-spi",
457 .platform_data = &ep93xx_spi_master_data,
459 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
460 .resource = ep93xx_spi_resources,
464 * ep93xx_register_spi() - registers spi platform device
465 * @info: ep93xx board specific spi master info (__initdata)
466 * @devices: SPI devices to register (__initdata)
467 * @num: number of SPI devices to register
469 * This function registers platform device for the EP93xx SPI controller and
470 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
472 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
473 struct spi_board_info *devices, int num)
476 * When SPI is used, we need to make sure that I2S is muxed off from
479 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
481 ep93xx_spi_master_data = *info;
482 spi_register_board_info(devices, num);
483 platform_device_register(&ep93xx_spi_device);
486 /*************************************************************************
488 *************************************************************************/
489 static struct gpio_led ep93xx_led_pins[] = {
491 .name = "platform:grled",
492 .gpio = EP93XX_GPIO_LINE_GRLED,
494 .name = "platform:rdled",
495 .gpio = EP93XX_GPIO_LINE_RDLED,
499 static struct gpio_led_platform_data ep93xx_led_data = {
500 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
501 .leds = ep93xx_led_pins,
504 static struct platform_device ep93xx_leds = {
508 .platform_data = &ep93xx_led_data,
513 /*************************************************************************
514 * EP93xx pwm peripheral handling
515 *************************************************************************/
516 static struct resource ep93xx_pwm0_resource[] = {
518 .start = EP93XX_PWM_PHYS_BASE,
519 .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
520 .flags = IORESOURCE_MEM,
524 static struct platform_device ep93xx_pwm0_device = {
525 .name = "ep93xx-pwm",
527 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
528 .resource = ep93xx_pwm0_resource,
531 static struct resource ep93xx_pwm1_resource[] = {
533 .start = EP93XX_PWM_PHYS_BASE + 0x20,
534 .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
535 .flags = IORESOURCE_MEM,
539 static struct platform_device ep93xx_pwm1_device = {
540 .name = "ep93xx-pwm",
542 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
543 .resource = ep93xx_pwm1_resource,
546 void __init ep93xx_register_pwm(int pwm0, int pwm1)
549 platform_device_register(&ep93xx_pwm0_device);
551 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
553 platform_device_register(&ep93xx_pwm1_device);
556 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
562 } else if (pdev->id == 1) {
563 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
564 dev_name(&pdev->dev));
567 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
571 /* PWM 1 output on EGPIO[14] */
572 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
580 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
583 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
585 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
588 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
589 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
591 /* EGPIO[14] used for GPIO */
592 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
595 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
598 /*************************************************************************
599 * EP93xx video peripheral handling
600 *************************************************************************/
601 static struct ep93xxfb_mach_info ep93xxfb_data;
603 static struct resource ep93xx_fb_resource[] = {
605 .start = EP93XX_RASTER_PHYS_BASE,
606 .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
607 .flags = IORESOURCE_MEM,
611 static struct platform_device ep93xx_fb_device = {
615 .platform_data = &ep93xxfb_data,
616 .coherent_dma_mask = DMA_BIT_MASK(32),
617 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
619 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
620 .resource = ep93xx_fb_resource,
624 * ep93xx_register_fb - Register the framebuffer platform device.
625 * @data: platform specific framebuffer configuration (__initdata)
627 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
629 ep93xxfb_data = *data;
630 platform_device_register(&ep93xx_fb_device);
634 /*************************************************************************
635 * EP93xx matrix keypad peripheral handling
636 *************************************************************************/
637 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
639 static struct resource ep93xx_keypad_resource[] = {
641 .start = EP93XX_KEY_MATRIX_PHYS_BASE,
642 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
643 .flags = IORESOURCE_MEM,
645 .start = IRQ_EP93XX_KEY,
646 .end = IRQ_EP93XX_KEY,
647 .flags = IORESOURCE_IRQ,
651 static struct platform_device ep93xx_keypad_device = {
652 .name = "ep93xx-keypad",
655 .platform_data = &ep93xx_keypad_data,
657 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
658 .resource = ep93xx_keypad_resource,
662 * ep93xx_register_keypad - Register the keypad platform device.
663 * @data: platform specific keypad configuration (__initdata)
665 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
667 ep93xx_keypad_data = *data;
668 platform_device_register(&ep93xx_keypad_device);
671 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
676 for (i = 0; i < 8; i++) {
677 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
680 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
685 /* Enable the keypad controller; GPIO ports C and D used for keypad */
686 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
687 EP93XX_SYSCON_DEVCFG_GONK);
692 gpio_free(EP93XX_GPIO_LINE_C(i));
694 for ( ; i >= 0; --i) {
695 gpio_free(EP93XX_GPIO_LINE_C(i));
696 gpio_free(EP93XX_GPIO_LINE_D(i));
700 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
702 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
706 for (i = 0; i < 8; i++) {
707 gpio_free(EP93XX_GPIO_LINE_C(i));
708 gpio_free(EP93XX_GPIO_LINE_D(i));
711 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
712 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
713 EP93XX_SYSCON_DEVCFG_GONK);
715 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
718 extern void ep93xx_gpio_init(void);
720 void __init ep93xx_init_devices(void)
722 /* Disallow access to MaverickCrunch initially */
723 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
727 amba_device_register(&uart1_device, &iomem_resource);
728 amba_device_register(&uart2_device, &iomem_resource);
729 amba_device_register(&uart3_device, &iomem_resource);
731 platform_device_register(&ep93xx_rtc_device);
732 platform_device_register(&ep93xx_ohci_device);
733 platform_device_register(&ep93xx_leds);