2 * SAMSUNG EXYNOS Flattened Device Tree enabled machine
4 * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/serial_s3c.h>
17 #include <linux/of_address.h>
18 #include <linux/of_fdt.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_device.h>
21 #include <linux/pm_domain.h>
23 #include <asm/cacheflush.h>
24 #include <asm/hardware/cache-l2x0.h>
25 #include <asm/mach/arch.h>
26 #include <asm/mach/map.h>
27 #include <asm/memory.h>
33 static struct map_desc exynos4_iodesc[] __initdata = {
35 .virtual = (unsigned long)S3C_VA_SYS,
36 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON),
40 .virtual = (unsigned long)S3C_VA_TIMER,
41 .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER),
45 .virtual = (unsigned long)S3C_VA_WATCHDOG,
46 .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG),
50 .virtual = (unsigned long)S5P_VA_SROMC,
51 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
55 .virtual = (unsigned long)S5P_VA_SYSTIMER,
56 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
60 .virtual = (unsigned long)S5P_VA_PMU,
61 .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
65 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
66 .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
70 .virtual = (unsigned long)S5P_VA_GIC_CPU,
71 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
75 .virtual = (unsigned long)S5P_VA_GIC_DIST,
76 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
80 .virtual = (unsigned long)S5P_VA_CMU,
81 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
85 .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
86 .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
90 .virtual = (unsigned long)S5P_VA_L2CC,
91 .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
95 .virtual = (unsigned long)S5P_VA_DMC0,
96 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
100 .virtual = (unsigned long)S5P_VA_DMC1,
101 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1),
105 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
106 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
112 static struct map_desc exynos5_iodesc[] __initdata = {
114 .virtual = (unsigned long)S3C_VA_SYS,
115 .pfn = __phys_to_pfn(EXYNOS5_PA_SYSCON),
119 .virtual = (unsigned long)S3C_VA_TIMER,
120 .pfn = __phys_to_pfn(EXYNOS5_PA_TIMER),
124 .virtual = (unsigned long)S3C_VA_WATCHDOG,
125 .pfn = __phys_to_pfn(EXYNOS5_PA_WATCHDOG),
129 .virtual = (unsigned long)S5P_VA_SROMC,
130 .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC),
134 .virtual = (unsigned long)S5P_VA_CMU,
135 .pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
136 .length = 144 * SZ_1K,
139 .virtual = (unsigned long)S5P_VA_PMU,
140 .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
146 void exynos_restart(enum reboot_mode mode, const char *cmd)
148 struct device_node *np;
150 void __iomem *addr = EXYNOS_SWRESET;
152 if (of_machine_is_compatible("samsung,exynos5440")) {
154 np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock");
156 addr = of_iomap(np, 0) + 0xbc;
157 status = __raw_readl(addr);
159 addr = of_iomap(np, 0) + 0xcc;
160 val = __raw_readl(addr);
162 val = (val & 0xffff0000) | (status & 0xffff);
165 __raw_writel(val, addr);
168 static struct platform_device exynos_cpuidle = {
169 .name = "exynos_cpuidle",
170 .dev.platform_data = exynos_enter_aftr,
174 void __init exynos_cpuidle_init(void)
176 if (soc_is_exynos4210() || soc_is_exynos5250())
177 platform_device_register(&exynos_cpuidle);
180 void __init exynos_cpufreq_init(void)
182 platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
185 void __iomem *sysram_base_addr;
186 void __iomem *sysram_ns_base_addr;
188 void __init exynos_sysram_init(void)
190 struct device_node *node;
192 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
193 if (!of_device_is_available(node))
195 sysram_base_addr = of_iomap(node, 0);
199 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
200 if (!of_device_is_available(node))
202 sysram_ns_base_addr = of_iomap(node, 0);
207 void __init exynos_init_late(void)
209 if (of_machine_is_compatible("samsung,exynos5440"))
210 /* to be supported later */
213 pm_genpd_poweroff_unused();
217 static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
218 int depth, void *data)
220 struct map_desc iodesc;
224 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
225 !of_flat_dt_is_compatible(node, "samsung,exynos5440-clock"))
228 reg = of_get_flat_dt_prop(node, "reg", &len);
229 if (reg == NULL || len != (sizeof(unsigned long) * 2))
232 iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
233 iodesc.length = be32_to_cpu(reg[1]) - 1;
234 iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
235 iodesc.type = MT_DEVICE;
236 iotable_init(&iodesc, 1);
243 * register the standard cpu IO areas
245 static void __init exynos_map_io(void)
247 if (soc_is_exynos4())
248 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
250 if (soc_is_exynos5())
251 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
254 void __init exynos_init_io(void)
258 of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
260 /* detect cpu id and rev. */
261 s5p_init_cpu(S5P_VA_CHIPID);
266 static void __init exynos_dt_machine_init(void)
268 struct device_node *i2c_np;
269 const char *i2c_compat = "samsung,s3c2440-i2c";
274 * Exynos5's legacy i2c controller and new high speed i2c
275 * controller have muxed interrupt sources. By default the
276 * interrupts for 4-channel HS-I2C controller are enabled.
277 * If node for first four channels of legacy i2c controller
278 * are available then re-configure the interrupts via the
281 if (soc_is_exynos5()) {
282 for_each_compatible_node(i2c_np, NULL, i2c_compat) {
283 if (of_device_is_available(i2c_np)) {
284 id = of_alias_get_id(i2c_np, "i2c");
286 tmp = readl(EXYNOS5_SYS_I2C_CFG);
287 writel(tmp & ~(0x1 << id),
288 EXYNOS5_SYS_I2C_CFG);
295 * This is called from smp_prepare_cpus if we've built for SMP, but
296 * we still need to set it up for PM and firmware ops if not.
298 if (!IS_ENABLED(CONFIG_SMP))
299 exynos_sysram_init();
301 exynos_cpuidle_init();
302 exynos_cpufreq_init();
304 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
307 static char const *exynos_dt_compat[] __initconst = {
309 "samsung,exynos3250",
311 "samsung,exynos4210",
312 "samsung,exynos4212",
313 "samsung,exynos4412",
315 "samsung,exynos5250",
316 "samsung,exynos5260",
317 "samsung,exynos5420",
318 "samsung,exynos5440",
322 static void __init exynos_reserve(void)
324 #ifdef CONFIG_S5P_DEV_MFC
332 for (i = 0; i < ARRAY_SIZE(mfc_mem); i++)
333 if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i]))
338 static void __init exynos_dt_fixup(void)
341 * Some versions of uboot pass garbage entries in the memory node,
342 * use the old CONFIG_ARM_NR_BANKS
344 of_fdt_limit_memory(8);
347 DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
348 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
349 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
350 .l2c_aux_val = 0x3c400001,
351 .l2c_aux_mask = 0xc20fffff,
352 .smp = smp_ops(exynos_smp_ops),
353 .map_io = exynos_init_io,
354 .init_early = exynos_firmware_init,
355 .init_machine = exynos_dt_machine_init,
356 .init_late = exynos_init_late,
357 .dt_compat = exynos_dt_compat,
358 .restart = exynos_restart,
359 .reserve = exynos_reserve,
360 .dt_fixup = exynos_dt_fixup,