arch/arm/mach-exynos/mach-smdkv310.c

   1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/delay.h>
  13 #include <linux/gpio.h>
  14 #include <linux/lcd.h>
  15 #include <linux/mmc/host.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/smsc911x.h>
  18 #include <linux/io.h>
  19 #include <linux/i2c.h>
  20 #include <linux/input.h>
  21 #include <linux/pwm_backlight.h>
  22
  23 #include <asm/mach/arch.h>
  24 #include <asm/hardware/gic.h>
  25 #include <asm/mach-types.h>
  26
  27 #include <video/platform_lcd.h>
  28 #include <plat/regs-serial.h>
  29 #include <plat/regs-srom.h>
  30 #include <plat/regs-fb-v4.h>
  31 #include <plat/cpu.h>
  32 #include <plat/devs.h>
  33 #include <plat/fb.h>
  34 #include <plat/keypad.h>
  35 #include <plat/sdhci.h>
  36 #include <plat/iic.h>
  37 #include <plat/pd.h>
  38 #include <plat/gpio-cfg.h>
  39 #include <plat/backlight.h>
  40 #include <plat/mfc.h>
  41 #include <plat/ehci.h>
  42 #include <plat/clock.h>
  43
  44 #include <mach/map.h>
  45 #include <mach/ohci.h>
  46
  47 #include <drm/exynos_drm.h>
  48 #include "common.h"
  49
  50 /* Following are default values for UCON, ULCON and UFCON UART registers */
  51 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  52                                  S3C2410_UCON_RXILEVEL |        \
  53                                  S3C2410_UCON_TXIRQMODE |       \
  54                                  S3C2410_UCON_RXIRQMODE |       \
  55                                  S3C2410_UCON_RXFIFO_TOI |      \
  56                                  S3C2443_UCON_RXERR_IRQEN)
  57
  58 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  59
  60 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  61                                  S5PV210_UFCON_TXTRIG4 |        \
  62                                  S5PV210_UFCON_RXTRIG4)
  63
  64 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  65         [0] = {
  66                 .hwport         = 0,
  67                 .flags          = 0,
  68                 .ucon           = SMDKV310_UCON_DEFAULT,
  69                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  70                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  71         },
  72         [1] = {
  73                 .hwport         = 1,
  74                 .flags          = 0,
  75                 .ucon           = SMDKV310_UCON_DEFAULT,
  76                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  77                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  78         },
  79         [2] = {
  80                 .hwport         = 2,
  81                 .flags          = 0,
  82                 .ucon           = SMDKV310_UCON_DEFAULT,
  83                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  84                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  85         },
  86         [3] = {
  87                 .hwport         = 3,
  88                 .flags          = 0,
  89                 .ucon           = SMDKV310_UCON_DEFAULT,
  90                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  91                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  92         },
  93 };
  94
  95 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  96         .cd_type                = S3C_SDHCI_CD_INTERNAL,
  97 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  98         .max_width              = 8,
  99         .host_caps              = MMC_CAP_8_BIT_DATA,
 100 #endif
 101 };
 102
 103 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
 104         .cd_type                = S3C_SDHCI_CD_GPIO,
 105         .ext_cd_gpio            = EXYNOS4_GPK0(2),
 106         .ext_cd_gpio_invert     = 1,
 107 };
 108
 109 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
 110         .cd_type                = S3C_SDHCI_CD_INTERNAL,
 111 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
 112         .max_width              = 8,
 113         .host_caps              = MMC_CAP_8_BIT_DATA,
 114 #endif
 115 };
 116
 117 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 118         .cd_type                = S3C_SDHCI_CD_GPIO,
 119         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 120         .ext_cd_gpio_invert     = 1,
 121 };
 122
 123 static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
 124                                    unsigned int power)
 125 {
 126         if (power) {
 127 #if !defined(CONFIG_BACKLIGHT_PWM)
 128                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
 129                 gpio_free(EXYNOS4_GPD0(1));
 130 #endif
 131                 /* fire nRESET on power up */
 132                 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
 133                 mdelay(100);
 134
 135                 gpio_set_value(EXYNOS4_GPX0(6), 0);
 136                 mdelay(10);
 137
 138                 gpio_set_value(EXYNOS4_GPX0(6), 1);
 139                 mdelay(10);
 140
 141                 gpio_free(EXYNOS4_GPX0(6));
 142         } else {
 143 #if !defined(CONFIG_BACKLIGHT_PWM)
 144                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
 145                 gpio_free(EXYNOS4_GPD0(1));
 146 #endif
 147         }
 148 }
 149
 150 static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
 151         .set_power              = lcd_lte480wv_set_power,
 152 };
 153
 154 static struct platform_device smdkv310_lcd_lte480wv = {
 155         .name                   = "platform-lcd",
 156         .dev.parent             = &s5p_device_fimd0.dev,
 157         .dev.platform_data      = &smdkv310_lcd_lte480wv_data,
 158 };
 159
 160 #ifdef CONFIG_DRM_EXYNOS
 161 static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
 162         .panel  = {
 163                 .timing = {
 164                         .left_margin    = 13,
 165                         .right_margin   = 8,
 166                         .upper_margin   = 7,
 167                         .lower_margin   = 5,
 168                         .hsync_len      = 3,
 169                         .vsync_len      = 1,
 170                         .xres           = 800,
 171                         .yres           = 480,
 172                 },
 173         },
 174         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 175         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 176         .default_win    = 0,
 177         .bpp            = 32,
 178 };
 179 #else
 180 static struct s3c_fb_pd_win smdkv310_fb_win0 = {
 181         .win_mode = {
 182                 .left_margin    = 13,
 183                 .right_margin   = 8,
 184                 .upper_margin   = 7,
 185                 .lower_margin   = 5,
 186                 .hsync_len      = 3,
 187                 .vsync_len      = 1,
 188                 .xres           = 800,
 189                 .yres           = 480,
 190         },
 191         .max_bpp                = 32,
 192         .default_bpp            = 24,
 193 };
 194
 195 static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
 196         .win[0]         = &smdkv310_fb_win0,
 197         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 198         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 199         .setup_gpio     = exynos4_fimd0_gpio_setup_24bpp,
 200 };
 201 #endif
 202
 203 static struct resource smdkv310_smsc911x_resources[] = {
 204         [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
 205         [1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
 206                                                 | IRQF_TRIGGER_LOW),
 207 };
 208
 209 static struct smsc911x_platform_config smsc9215_config = {
 210         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 211         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 212         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 213         .phy_interface  = PHY_INTERFACE_MODE_MII,
 214         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 215 };
 216
 217 static struct platform_device smdkv310_smsc911x = {
 218         .name           = "smsc911x",
 219         .id             = -1,
 220         .num_resources  = ARRAY_SIZE(smdkv310_smsc911x_resources),
 221         .resource       = smdkv310_smsc911x_resources,
 222         .dev            = {
 223                 .platform_data  = &smsc9215_config,
 224         },
 225 };
 226
 227 static uint32_t smdkv310_keymap[] __initdata = {
 228         /* KEY(row, col, keycode) */
 229         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 230         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 231         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 232         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 233 };
 234
 235 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
 236         .keymap         = smdkv310_keymap,
 237         .keymap_size    = ARRAY_SIZE(smdkv310_keymap),
 238 };
 239
 240 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
 241         .keymap_data    = &smdkv310_keymap_data,
 242         .rows           = 2,
 243         .cols           = 8,
 244 };
 245
 246 static struct i2c_board_info i2c_devs1[] __initdata = {
 247         {I2C_BOARD_INFO("wm8994", 0x1a),},
 248 };
 249
 250 /* USB EHCI */
 251 static struct s5p_ehci_platdata smdkv310_ehci_pdata;
 252
 253 static void __init smdkv310_ehci_init(void)
 254 {
 255         struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
 256
 257         s5p_ehci_set_platdata(pdata);
 258 }
 259
 260 /* USB OHCI */
 261 static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
 262
 263 static void __init smdkv310_ohci_init(void)
 264 {
 265         struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
 266
 267         exynos4_ohci_set_platdata(pdata);
 268 }
 269
 270 static struct platform_device *smdkv310_devices[] __initdata = {
 271         &s3c_device_hsmmc0,
 272         &s3c_device_hsmmc1,
 273         &s3c_device_hsmmc2,
 274         &s3c_device_hsmmc3,
 275         &s3c_device_i2c1,
 276         &s5p_device_i2c_hdmiphy,
 277         &s3c_device_rtc,
 278         &s3c_device_wdt,
 279         &s5p_device_ehci,
 280         &s5p_device_fimc0,
 281         &s5p_device_fimc1,
 282         &s5p_device_fimc2,
 283         &s5p_device_fimc3,
 284         &s5p_device_fimc_md,
 285         &s5p_device_g2d,
 286         &s5p_device_jpeg,
 287 #ifdef CONFIG_DRM_EXYNOS
 288         &exynos_device_drm,
 289 #endif
 290         &exynos4_device_ac97,
 291         &exynos4_device_i2s0,
 292         &exynos4_device_ohci,
 293         &samsung_device_keypad,
 294         &s5p_device_mfc,
 295         &s5p_device_mfc_l,
 296         &s5p_device_mfc_r,
 297         &exynos4_device_spdif,
 298         &samsung_asoc_dma,
 299         &samsung_asoc_idma,
 300         &s5p_device_fimd0,
 301         &smdkv310_lcd_lte480wv,
 302         &smdkv310_smsc911x,
 303         &exynos4_device_ahci,
 304         &s5p_device_hdmi,
 305         &s5p_device_mixer,
 306 };
 307
 308 static void __init smdkv310_smsc911x_init(void)
 309 {
 310         u32 cs1;
 311
 312         /* configure nCS1 width to 16 bits */
 313         cs1 = __raw_readl(S5P_SROM_BW) &
 314                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 315         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 316                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 317                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 318                 S5P_SROM_BW__NCS1__SHIFT;
 319         __raw_writel(cs1, S5P_SROM_BW);
 320
 321         /* set timing for nCS1 suitable for ethernet chip */
 322         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 323                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 324                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 325                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 326                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 327                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 328                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 329 }
 330
 331 /* LCD Backlight data */
 332 static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
 333         .no = EXYNOS4_GPD0(1),
 334         .func = S3C_GPIO_SFN(2),
 335 };
 336
 337 static struct platform_pwm_backlight_data smdkv310_bl_data = {
 338         .pwm_id = 1,
 339         .pwm_period_ns  = 1000,
 340 };
 341
 342 static void s5p_tv_setup(void)
 343 {
 344         /* direct HPD to HDMI chip */
 345         WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
 346         s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
 347         s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
 348 }
 349
 350 static void __init smdkv310_map_io(void)
 351 {
 352         exynos_init_io(NULL, 0);
 353         s3c24xx_init_clocks(24000000);
 354         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 355 }
 356
 357 static void __init smdkv310_reserve(void)
 358 {
 359         s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
 360 }
 361
 362 static void __init smdkv310_machine_init(void)
 363 {
 364         s3c_i2c1_set_platdata(NULL);
 365         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 366
 367         smdkv310_smsc911x_init();
 368
 369         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 370         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 371         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 372         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 373
 374         s5p_tv_setup();
 375         s5p_i2c_hdmiphy_set_platdata(NULL);
 376
 377         samsung_keypad_set_platdata(&smdkv310_keypad_data);
 378
 379         samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
 380 #ifdef CONFIG_DRM_EXYNOS
 381         s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
 382         exynos4_fimd0_gpio_setup_24bpp();
 383 #else
 384         s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
 385 #endif
 386
 387         smdkv310_ehci_init();
 388         smdkv310_ohci_init();
 389         clk_xusbxti.rate = 24000000;
 390
 391         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 392 }
 393
 394 MACHINE_START(SMDKV310, "SMDKV310")
 395         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 396         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 397         .atag_offset    = 0x100,
 398         .init_irq       = exynos4_init_irq,
 399         .map_io         = smdkv310_map_io,
 400         .handle_irq     = gic_handle_irq,
 401         .init_machine   = smdkv310_machine_init,
 402         .timer          = &exynos4_timer,
 403         .reserve        = &smdkv310_reserve,
 404         .restart        = exynos4_restart,
 405 MACHINE_END
 406
 407 MACHINE_START(SMDKC210, "SMDKC210")
 408         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 409         .atag_offset    = 0x100,
 410         .init_irq       = exynos4_init_irq,
 411         .map_io         = smdkv310_map_io,
 412         .handle_irq     = gic_handle_irq,
 413         .init_machine   = smdkv310_machine_init,
 414         .timer          = &exynos4_timer,
 415         .restart        = exynos4_restart,
 416 MACHINE_END