arch/arm/mach-exynos/mach-smdkv310.c

   1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/delay.h>
  13 #include <linux/gpio.h>
  14 #include <linux/lcd.h>
  15 #include <linux/mmc/host.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/smsc911x.h>
  18 #include <linux/io.h>
  19 #include <linux/i2c.h>
  20 #include <linux/input.h>
  21 #include <linux/pwm_backlight.h>
  22
  23 #include <asm/mach/arch.h>
  24 #include <asm/mach-types.h>
  25
  26 #include <video/platform_lcd.h>
  27 #include <plat/regs-serial.h>
  28 #include <plat/regs-srom.h>
  29 #include <plat/regs-fb-v4.h>
  30 #include <plat/cpu.h>
  31 #include <plat/devs.h>
  32 #include <plat/fb.h>
  33 #include <plat/keypad.h>
  34 #include <plat/sdhci.h>
  35 #include <plat/iic.h>
  36 #include <plat/pd.h>
  37 #include <plat/gpio-cfg.h>
  38 #include <plat/backlight.h>
  39 #include <plat/mfc.h>
  40 #include <plat/ehci.h>
  41 #include <plat/clock.h>
  42
  43 #include <mach/map.h>
  44
  45 #include "common.h"
  46
  47 /* Following are default values for UCON, ULCON and UFCON UART registers */
  48 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  49                                  S3C2410_UCON_RXILEVEL |        \
  50                                  S3C2410_UCON_TXIRQMODE |       \
  51                                  S3C2410_UCON_RXIRQMODE |       \
  52                                  S3C2410_UCON_RXFIFO_TOI |      \
  53                                  S3C2443_UCON_RXERR_IRQEN)
  54
  55 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  56
  57 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  58                                  S5PV210_UFCON_TXTRIG4 |        \
  59                                  S5PV210_UFCON_RXTRIG4)
  60
  61 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  62         [0] = {
  63                 .hwport         = 0,
  64                 .flags          = 0,
  65                 .ucon           = SMDKV310_UCON_DEFAULT,
  66                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  67                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  68         },
  69         [1] = {
  70                 .hwport         = 1,
  71                 .flags          = 0,
  72                 .ucon           = SMDKV310_UCON_DEFAULT,
  73                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  74                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  75         },
  76         [2] = {
  77                 .hwport         = 2,
  78                 .flags          = 0,
  79                 .ucon           = SMDKV310_UCON_DEFAULT,
  80                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  81                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  82         },
  83         [3] = {
  84                 .hwport         = 3,
  85                 .flags          = 0,
  86                 .ucon           = SMDKV310_UCON_DEFAULT,
  87                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  88                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  89         },
  90 };
  91
  92 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  93         .cd_type                = S3C_SDHCI_CD_INTERNAL,
  94         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  95 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  96         .max_width              = 8,
  97         .host_caps              = MMC_CAP_8_BIT_DATA,
  98 #endif
  99 };
 100
 101 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
 102         .cd_type                = S3C_SDHCI_CD_GPIO,
 103         .ext_cd_gpio            = EXYNOS4_GPK0(2),
 104         .ext_cd_gpio_invert     = 1,
 105         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 106 };
 107
 108 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
 109         .cd_type                = S3C_SDHCI_CD_INTERNAL,
 110         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 111 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
 112         .max_width              = 8,
 113         .host_caps              = MMC_CAP_8_BIT_DATA,
 114 #endif
 115 };
 116
 117 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 118         .cd_type                = S3C_SDHCI_CD_GPIO,
 119         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 120         .ext_cd_gpio_invert     = 1,
 121         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 122 };
 123
 124 static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
 125                                    unsigned int power)
 126 {
 127         if (power) {
 128 #if !defined(CONFIG_BACKLIGHT_PWM)
 129                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
 130                 gpio_free(EXYNOS4_GPD0(1));
 131 #endif
 132                 /* fire nRESET on power up */
 133                 gpio_request(EXYNOS4_GPX0(6), "GPX0");
 134
 135                 gpio_direction_output(EXYNOS4_GPX0(6), 1);
 136                 mdelay(100);
 137
 138                 gpio_set_value(EXYNOS4_GPX0(6), 0);
 139                 mdelay(10);
 140
 141                 gpio_set_value(EXYNOS4_GPX0(6), 1);
 142                 mdelay(10);
 143
 144                 gpio_free(EXYNOS4_GPX0(6));
 145         } else {
 146 #if !defined(CONFIG_BACKLIGHT_PWM)
 147                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
 148                 gpio_free(EXYNOS4_GPD0(1));
 149 #endif
 150         }
 151 }
 152
 153 static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
 154         .set_power              = lcd_lte480wv_set_power,
 155 };
 156
 157 static struct platform_device smdkv310_lcd_lte480wv = {
 158         .name                   = "platform-lcd",
 159         .dev.parent             = &s5p_device_fimd0.dev,
 160         .dev.platform_data      = &smdkv310_lcd_lte480wv_data,
 161 };
 162
 163 static struct s3c_fb_pd_win smdkv310_fb_win0 = {
 164         .win_mode = {
 165                 .left_margin    = 13,
 166                 .right_margin   = 8,
 167                 .upper_margin   = 7,
 168                 .lower_margin   = 5,
 169                 .hsync_len      = 3,
 170                 .vsync_len      = 1,
 171                 .xres           = 800,
 172                 .yres           = 480,
 173         },
 174         .max_bpp                = 32,
 175         .default_bpp            = 24,
 176 };
 177
 178 static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
 179         .win[0]         = &smdkv310_fb_win0,
 180         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 181         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 182         .setup_gpio     = exynos4_fimd0_gpio_setup_24bpp,
 183 };
 184
 185 static struct resource smdkv310_smsc911x_resources[] = {
 186         [0] = {
 187                 .start  = EXYNOS4_PA_SROM_BANK(1),
 188                 .end    = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
 189                 .flags  = IORESOURCE_MEM,
 190         },
 191         [1] = {
 192                 .start  = IRQ_EINT(5),
 193                 .end    = IRQ_EINT(5),
 194                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 195         },
 196 };
 197
 198 static struct smsc911x_platform_config smsc9215_config = {
 199         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 200         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 201         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 202         .phy_interface  = PHY_INTERFACE_MODE_MII,
 203         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 204 };
 205
 206 static struct platform_device smdkv310_smsc911x = {
 207         .name           = "smsc911x",
 208         .id             = -1,
 209         .num_resources  = ARRAY_SIZE(smdkv310_smsc911x_resources),
 210         .resource       = smdkv310_smsc911x_resources,
 211         .dev            = {
 212                 .platform_data  = &smsc9215_config,
 213         },
 214 };
 215
 216 static uint32_t smdkv310_keymap[] __initdata = {
 217         /* KEY(row, col, keycode) */
 218         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 219         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 220         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 221         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 222 };
 223
 224 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
 225         .keymap         = smdkv310_keymap,
 226         .keymap_size    = ARRAY_SIZE(smdkv310_keymap),
 227 };
 228
 229 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
 230         .keymap_data    = &smdkv310_keymap_data,
 231         .rows           = 2,
 232         .cols           = 8,
 233 };
 234
 235 static struct i2c_board_info i2c_devs1[] __initdata = {
 236         {I2C_BOARD_INFO("wm8994", 0x1a),},
 237 };
 238
 239 /* USB EHCI */
 240 static struct s5p_ehci_platdata smdkv310_ehci_pdata;
 241
 242 static void __init smdkv310_ehci_init(void)
 243 {
 244         struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
 245
 246         s5p_ehci_set_platdata(pdata);
 247 }
 248
 249 static struct platform_device *smdkv310_devices[] __initdata = {
 250         &s3c_device_hsmmc0,
 251         &s3c_device_hsmmc1,
 252         &s3c_device_hsmmc2,
 253         &s3c_device_hsmmc3,
 254         &s3c_device_i2c1,
 255         &s5p_device_i2c_hdmiphy,
 256         &s3c_device_rtc,
 257         &s3c_device_wdt,
 258         &s5p_device_ehci,
 259         &s5p_device_fimc0,
 260         &s5p_device_fimc1,
 261         &s5p_device_fimc2,
 262         &s5p_device_fimc3,
 263         &exynos4_device_ac97,
 264         &exynos4_device_i2s0,
 265         &samsung_device_keypad,
 266         &s5p_device_mfc,
 267         &s5p_device_mfc_l,
 268         &s5p_device_mfc_r,
 269         &exynos4_device_pd[PD_MFC],
 270         &exynos4_device_pd[PD_G3D],
 271         &exynos4_device_pd[PD_LCD0],
 272         &exynos4_device_pd[PD_LCD1],
 273         &exynos4_device_pd[PD_CAM],
 274         &exynos4_device_pd[PD_TV],
 275         &exynos4_device_pd[PD_GPS],
 276         &exynos4_device_spdif,
 277         &exynos4_device_sysmmu,
 278         &samsung_asoc_dma,
 279         &samsung_asoc_idma,
 280         &s5p_device_fimd0,
 281         &smdkv310_lcd_lte480wv,
 282         &smdkv310_smsc911x,
 283         &exynos4_device_ahci,
 284         &s5p_device_hdmi,
 285         &s5p_device_mixer,
 286 };
 287
 288 static void __init smdkv310_smsc911x_init(void)
 289 {
 290         u32 cs1;
 291
 292         /* configure nCS1 width to 16 bits */
 293         cs1 = __raw_readl(S5P_SROM_BW) &
 294                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 295         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 296                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 297                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 298                 S5P_SROM_BW__NCS1__SHIFT;
 299         __raw_writel(cs1, S5P_SROM_BW);
 300
 301         /* set timing for nCS1 suitable for ethernet chip */
 302         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 303                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 304                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 305                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 306                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 307                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 308                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 309 }
 310
 311 /* LCD Backlight data */
 312 static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
 313         .no = EXYNOS4_GPD0(1),
 314         .func = S3C_GPIO_SFN(2),
 315 };
 316
 317 static struct platform_pwm_backlight_data smdkv310_bl_data = {
 318         .pwm_id = 1,
 319         .pwm_period_ns  = 1000,
 320 };
 321
 322 static void s5p_tv_setup(void)
 323 {
 324         /* direct HPD to HDMI chip */
 325         WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
 326         s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
 327         s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
 328
 329         /* setup dependencies between TV devices */
 330         s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
 331         s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
 332 }
 333
 334 static void __init smdkv310_map_io(void)
 335 {
 336         exynos_init_io(NULL, 0);
 337         s3c24xx_init_clocks(24000000);
 338         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 339 }
 340
 341 static void __init smdkv310_reserve(void)
 342 {
 343         s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
 344 }
 345
 346 static void __init smdkv310_machine_init(void)
 347 {
 348         s3c_i2c1_set_platdata(NULL);
 349         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 350
 351         smdkv310_smsc911x_init();
 352
 353         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 354         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 355         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 356         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 357
 358         s5p_tv_setup();
 359         s5p_i2c_hdmiphy_set_platdata(NULL);
 360
 361         samsung_keypad_set_platdata(&smdkv310_keypad_data);
 362
 363         samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
 364         s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
 365
 366         smdkv310_ehci_init();
 367         clk_xusbxti.rate = 24000000;
 368
 369         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 370         s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
 371 }
 372
 373 MACHINE_START(SMDKV310, "SMDKV310")
 374         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 375         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 376         .atag_offset    = 0x100,
 377         .init_irq       = exynos4_init_irq,
 378         .map_io         = smdkv310_map_io,
 379         .init_machine   = smdkv310_machine_init,
 380         .timer          = &exynos4_timer,
 381         .reserve        = &smdkv310_reserve,
 382 MACHINE_END
 383
 384 MACHINE_START(SMDKC210, "SMDKC210")
 385         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 386         .atag_offset    = 0x100,
 387         .init_irq       = exynos4_init_irq,
 388         .map_io         = smdkv310_map_io,
 389         .init_machine   = smdkv310_machine_init,
 390         .timer          = &exynos4_timer,
 391 MACHINE_END