arch/arm/mach-exynos/mach-smdkv310.c

   1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/delay.h>
  13 #include <linux/gpio.h>
  14 #include <linux/lcd.h>
  15 #include <linux/mmc/host.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/smsc911x.h>
  18 #include <linux/io.h>
  19 #include <linux/i2c.h>
  20 #include <linux/input.h>
  21 #include <linux/pwm_backlight.h>
  22
  23 #include <asm/mach/arch.h>
  24 #include <asm/hardware/gic.h>
  25 #include <asm/mach-types.h>
  26
  27 #include <video/platform_lcd.h>
  28 #include <plat/regs-serial.h>
  29 #include <plat/regs-srom.h>
  30 #include <plat/regs-fb-v4.h>
  31 #include <plat/cpu.h>
  32 #include <plat/devs.h>
  33 #include <plat/fb.h>
  34 #include <plat/keypad.h>
  35 #include <plat/sdhci.h>
  36 #include <plat/iic.h>
  37 #include <plat/pd.h>
  38 #include <plat/gpio-cfg.h>
  39 #include <plat/backlight.h>
  40 #include <plat/mfc.h>
  41 #include <plat/ehci.h>
  42 #include <plat/clock.h>
  43
  44 #include <mach/map.h>
  45 #include <mach/ohci.h>
  46
  47 #include "common.h"
  48
  49 /* Following are default values for UCON, ULCON and UFCON UART registers */
  50 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  51                                  S3C2410_UCON_RXILEVEL |        \
  52                                  S3C2410_UCON_TXIRQMODE |       \
  53                                  S3C2410_UCON_RXIRQMODE |       \
  54                                  S3C2410_UCON_RXFIFO_TOI |      \
  55                                  S3C2443_UCON_RXERR_IRQEN)
  56
  57 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  58
  59 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  60                                  S5PV210_UFCON_TXTRIG4 |        \
  61                                  S5PV210_UFCON_RXTRIG4)
  62
  63 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  64         [0] = {
  65                 .hwport         = 0,
  66                 .flags          = 0,
  67                 .ucon           = SMDKV310_UCON_DEFAULT,
  68                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  69                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  70         },
  71         [1] = {
  72                 .hwport         = 1,
  73                 .flags          = 0,
  74                 .ucon           = SMDKV310_UCON_DEFAULT,
  75                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  76                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  77         },
  78         [2] = {
  79                 .hwport         = 2,
  80                 .flags          = 0,
  81                 .ucon           = SMDKV310_UCON_DEFAULT,
  82                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  83                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  84         },
  85         [3] = {
  86                 .hwport         = 3,
  87                 .flags          = 0,
  88                 .ucon           = SMDKV310_UCON_DEFAULT,
  89                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  90                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  91         },
  92 };
  93
  94 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  95         .cd_type                = S3C_SDHCI_CD_INTERNAL,
  96 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  97         .max_width              = 8,
  98         .host_caps              = MMC_CAP_8_BIT_DATA,
  99 #endif
 100 };
 101
 102 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
 103         .cd_type                = S3C_SDHCI_CD_GPIO,
 104         .ext_cd_gpio            = EXYNOS4_GPK0(2),
 105         .ext_cd_gpio_invert     = 1,
 106 };
 107
 108 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
 109         .cd_type                = S3C_SDHCI_CD_INTERNAL,
 110 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
 111         .max_width              = 8,
 112         .host_caps              = MMC_CAP_8_BIT_DATA,
 113 #endif
 114 };
 115
 116 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 117         .cd_type                = S3C_SDHCI_CD_GPIO,
 118         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 119         .ext_cd_gpio_invert     = 1,
 120 };
 121
 122 static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
 123                                    unsigned int power)
 124 {
 125         if (power) {
 126 #if !defined(CONFIG_BACKLIGHT_PWM)
 127                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
 128                 gpio_free(EXYNOS4_GPD0(1));
 129 #endif
 130                 /* fire nRESET on power up */
 131                 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
 132                 mdelay(100);
 133
 134                 gpio_set_value(EXYNOS4_GPX0(6), 0);
 135                 mdelay(10);
 136
 137                 gpio_set_value(EXYNOS4_GPX0(6), 1);
 138                 mdelay(10);
 139
 140                 gpio_free(EXYNOS4_GPX0(6));
 141         } else {
 142 #if !defined(CONFIG_BACKLIGHT_PWM)
 143                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
 144                 gpio_free(EXYNOS4_GPD0(1));
 145 #endif
 146         }
 147 }
 148
 149 static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
 150         .set_power              = lcd_lte480wv_set_power,
 151 };
 152
 153 static struct platform_device smdkv310_lcd_lte480wv = {
 154         .name                   = "platform-lcd",
 155         .dev.parent             = &s5p_device_fimd0.dev,
 156         .dev.platform_data      = &smdkv310_lcd_lte480wv_data,
 157 };
 158
 159 static struct s3c_fb_pd_win smdkv310_fb_win0 = {
 160         .win_mode = {
 161                 .left_margin    = 13,
 162                 .right_margin   = 8,
 163                 .upper_margin   = 7,
 164                 .lower_margin   = 5,
 165                 .hsync_len      = 3,
 166                 .vsync_len      = 1,
 167                 .xres           = 800,
 168                 .yres           = 480,
 169         },
 170         .max_bpp                = 32,
 171         .default_bpp            = 24,
 172 };
 173
 174 static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
 175         .win[0]         = &smdkv310_fb_win0,
 176         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 177         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 178         .setup_gpio     = exynos4_fimd0_gpio_setup_24bpp,
 179 };
 180
 181 static struct resource smdkv310_smsc911x_resources[] = {
 182         [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
 183         [1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
 184                                                 | IRQF_TRIGGER_LOW),
 185 };
 186
 187 static struct smsc911x_platform_config smsc9215_config = {
 188         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 189         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 190         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 191         .phy_interface  = PHY_INTERFACE_MODE_MII,
 192         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 193 };
 194
 195 static struct platform_device smdkv310_smsc911x = {
 196         .name           = "smsc911x",
 197         .id             = -1,
 198         .num_resources  = ARRAY_SIZE(smdkv310_smsc911x_resources),
 199         .resource       = smdkv310_smsc911x_resources,
 200         .dev            = {
 201                 .platform_data  = &smsc9215_config,
 202         },
 203 };
 204
 205 static uint32_t smdkv310_keymap[] __initdata = {
 206         /* KEY(row, col, keycode) */
 207         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 208         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 209         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 210         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 211 };
 212
 213 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
 214         .keymap         = smdkv310_keymap,
 215         .keymap_size    = ARRAY_SIZE(smdkv310_keymap),
 216 };
 217
 218 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
 219         .keymap_data    = &smdkv310_keymap_data,
 220         .rows           = 2,
 221         .cols           = 8,
 222 };
 223
 224 static struct i2c_board_info i2c_devs1[] __initdata = {
 225         {I2C_BOARD_INFO("wm8994", 0x1a),},
 226 };
 227
 228 /* USB EHCI */
 229 static struct s5p_ehci_platdata smdkv310_ehci_pdata;
 230
 231 static void __init smdkv310_ehci_init(void)
 232 {
 233         struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
 234
 235         s5p_ehci_set_platdata(pdata);
 236 }
 237
 238 /* USB OHCI */
 239 static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
 240
 241 static void __init smdkv310_ohci_init(void)
 242 {
 243         struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
 244
 245         exynos4_ohci_set_platdata(pdata);
 246 }
 247
 248 static struct platform_device *smdkv310_devices[] __initdata = {
 249         &s3c_device_hsmmc0,
 250         &s3c_device_hsmmc1,
 251         &s3c_device_hsmmc2,
 252         &s3c_device_hsmmc3,
 253         &s3c_device_i2c1,
 254         &s5p_device_i2c_hdmiphy,
 255         &s3c_device_rtc,
 256         &s3c_device_wdt,
 257         &s5p_device_ehci,
 258         &s5p_device_fimc0,
 259         &s5p_device_fimc1,
 260         &s5p_device_fimc2,
 261         &s5p_device_fimc3,
 262         &s5p_device_fimc_md,
 263         &s5p_device_g2d,
 264         &s5p_device_jpeg,
 265         &exynos4_device_ac97,
 266         &exynos4_device_i2s0,
 267         &exynos4_device_ohci,
 268         &samsung_device_keypad,
 269         &s5p_device_mfc,
 270         &s5p_device_mfc_l,
 271         &s5p_device_mfc_r,
 272         &exynos4_device_spdif,
 273         &exynos4_device_sysmmu,
 274         &samsung_asoc_dma,
 275         &samsung_asoc_idma,
 276         &s5p_device_fimd0,
 277         &smdkv310_lcd_lte480wv,
 278         &smdkv310_smsc911x,
 279         &exynos4_device_ahci,
 280         &s5p_device_hdmi,
 281         &s5p_device_mixer,
 282 };
 283
 284 static void __init smdkv310_smsc911x_init(void)
 285 {
 286         u32 cs1;
 287
 288         /* configure nCS1 width to 16 bits */
 289         cs1 = __raw_readl(S5P_SROM_BW) &
 290                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 291         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 292                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 293                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 294                 S5P_SROM_BW__NCS1__SHIFT;
 295         __raw_writel(cs1, S5P_SROM_BW);
 296
 297         /* set timing for nCS1 suitable for ethernet chip */
 298         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 299                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 300                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 301                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 302                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 303                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 304                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 305 }
 306
 307 /* LCD Backlight data */
 308 static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
 309         .no = EXYNOS4_GPD0(1),
 310         .func = S3C_GPIO_SFN(2),
 311 };
 312
 313 static struct platform_pwm_backlight_data smdkv310_bl_data = {
 314         .pwm_id = 1,
 315         .pwm_period_ns  = 1000,
 316 };
 317
 318 static void s5p_tv_setup(void)
 319 {
 320         /* direct HPD to HDMI chip */
 321         WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
 322         s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
 323         s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
 324 }
 325
 326 static void __init smdkv310_map_io(void)
 327 {
 328         exynos_init_io(NULL, 0);
 329         s3c24xx_init_clocks(24000000);
 330         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 331 }
 332
 333 static void __init smdkv310_reserve(void)
 334 {
 335         s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
 336 }
 337
 338 static void __init smdkv310_machine_init(void)
 339 {
 340         s3c_i2c1_set_platdata(NULL);
 341         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 342
 343         smdkv310_smsc911x_init();
 344
 345         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 346         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 347         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 348         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 349
 350         s5p_tv_setup();
 351         s5p_i2c_hdmiphy_set_platdata(NULL);
 352
 353         samsung_keypad_set_platdata(&smdkv310_keypad_data);
 354
 355         samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
 356         s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
 357
 358         smdkv310_ehci_init();
 359         smdkv310_ohci_init();
 360         clk_xusbxti.rate = 24000000;
 361
 362         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 363 }
 364
 365 MACHINE_START(SMDKV310, "SMDKV310")
 366         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 367         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 368         .atag_offset    = 0x100,
 369         .init_irq       = exynos4_init_irq,
 370         .map_io         = smdkv310_map_io,
 371         .handle_irq     = gic_handle_irq,
 372         .init_machine   = smdkv310_machine_init,
 373         .timer          = &exynos4_timer,
 374         .reserve        = &smdkv310_reserve,
 375         .restart        = exynos4_restart,
 376 MACHINE_END
 377
 378 MACHINE_START(SMDKC210, "SMDKC210")
 379         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 380         .atag_offset    = 0x100,
 381         .init_irq       = exynos4_init_irq,
 382         .map_io         = smdkv310_map_io,
 383         .handle_irq     = gic_handle_irq,
 384         .init_machine   = smdkv310_machine_init,
 385         .timer          = &exynos4_timer,
 386         .restart        = exynos4_restart,
 387 MACHINE_END