1 /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
10 #include <linux/platform_device.h>
11 #include <linux/serial_core.h>
12 #include <linux/input.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
18 #include <linux/mfd/max8998.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/regulator/fixed.h>
21 #include <linux/regulator/max8952.h>
22 #include <linux/mmc/host.h>
23 #include <linux/i2c-gpio.h>
24 #include <linux/i2c/mcs.h>
25 #include <linux/i2c/atmel_mxt_ts.h>
26 #include <linux/platform_data/s3c-hsotg.h>
27 #include <drm/exynos_drm.h>
29 #include <asm/mach/arch.h>
30 #include <asm/hardware/gic.h>
31 #include <asm/mach-types.h>
33 #include <plat/regs-serial.h>
34 #include <plat/clock.h>
36 #include <plat/devs.h>
38 #include <plat/gpio-cfg.h>
41 #include <plat/sdhci.h>
43 #include <plat/regs-fb-v4.h>
44 #include <plat/fimc-core.h>
45 #include <plat/s5p-time.h>
46 #include <plat/camport.h>
47 #include <plat/mipi_csis.h>
51 #include <media/v4l2-mediabus.h>
52 #include <media/s5p_fimc.h>
53 #include <media/m5mols.h>
54 #include <media/s5k6aa.h>
58 /* Following are default values for UCON, ULCON and UFCON UART registers */
59 #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
60 S3C2410_UCON_RXILEVEL | \
61 S3C2410_UCON_TXIRQMODE | \
62 S3C2410_UCON_RXIRQMODE | \
63 S3C2410_UCON_RXFIFO_TOI | \
64 S3C2443_UCON_RXERR_IRQEN)
66 #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
68 #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
69 S5PV210_UFCON_TXTRIG256 | \
70 S5PV210_UFCON_RXTRIG256)
72 static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
75 .ucon = UNIVERSAL_UCON_DEFAULT,
76 .ulcon = UNIVERSAL_ULCON_DEFAULT,
77 .ufcon = UNIVERSAL_UFCON_DEFAULT,
81 .ucon = UNIVERSAL_UCON_DEFAULT,
82 .ulcon = UNIVERSAL_ULCON_DEFAULT,
83 .ufcon = UNIVERSAL_UFCON_DEFAULT,
87 .ucon = UNIVERSAL_UCON_DEFAULT,
88 .ulcon = UNIVERSAL_ULCON_DEFAULT,
89 .ufcon = UNIVERSAL_UFCON_DEFAULT,
93 .ucon = UNIVERSAL_UCON_DEFAULT,
94 .ulcon = UNIVERSAL_ULCON_DEFAULT,
95 .ufcon = UNIVERSAL_UFCON_DEFAULT,
99 static struct regulator_consumer_supply max8952_consumer =
100 REGULATOR_SUPPLY("vdd_arm", NULL);
102 static struct max8952_platform_data universal_max8952_pdata __initdata = {
103 .gpio_vid0 = EXYNOS4_GPX0(3),
104 .gpio_vid1 = EXYNOS4_GPX0(4),
105 .gpio_en = -1, /* Not controllable, set "Always High" */
106 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
107 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
108 .sync_freq = 0, /* default: fastest */
109 .ramp_speed = 0, /* default: fastest */
116 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
120 .num_consumer_supplies = 1,
121 .consumer_supplies = &max8952_consumer,
125 static struct regulator_consumer_supply lp3974_buck1_consumer =
126 REGULATOR_SUPPLY("vdd_int", NULL);
128 static struct regulator_consumer_supply lp3974_buck2_consumer =
129 REGULATOR_SUPPLY("vddg3d", NULL);
131 static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
132 REGULATOR_SUPPLY("vdet", "s5p-sdo"),
133 REGULATOR_SUPPLY("vdd_reg", "0-003c"),
136 static struct regulator_init_data lp3974_buck1_data = {
141 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
142 REGULATOR_CHANGE_STATUS,
148 .num_consumer_supplies = 1,
149 .consumer_supplies = &lp3974_buck1_consumer,
152 static struct regulator_init_data lp3974_buck2_data = {
157 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
158 REGULATOR_CHANGE_STATUS,
164 .num_consumer_supplies = 1,
165 .consumer_supplies = &lp3974_buck2_consumer,
168 static struct regulator_init_data lp3974_buck3_data = {
179 .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
180 .consumer_supplies = lp3974_buck3_consumer,
183 static struct regulator_init_data lp3974_buck4_data = {
188 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
196 static struct regulator_init_data lp3974_ldo2_data = {
198 .name = "VALIVE_1.2V",
209 static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
210 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
211 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
212 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
213 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
216 static struct regulator_init_data lp3974_ldo3_data = {
218 .name = "VUSB+MIPI_1.1V",
222 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
227 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
228 .consumer_supplies = lp3974_ldo3_consumer,
231 static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
232 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
235 static struct regulator_init_data lp3974_ldo4_data = {
241 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
246 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
247 .consumer_supplies = lp3974_ldo4_consumer,
250 static struct regulator_init_data lp3974_ldo5_data = {
256 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
263 static struct regulator_init_data lp3974_ldo6_data = {
269 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
276 static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
277 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
280 static struct regulator_init_data lp3974_ldo7_data = {
282 .name = "VLCD+VMIPI_1.8V",
286 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
291 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
292 .consumer_supplies = lp3974_ldo7_consumer,
295 static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
296 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
297 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
300 static struct regulator_init_data lp3974_ldo8_data = {
302 .name = "VUSB+VDAC_3.3V",
306 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
311 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
312 .consumer_supplies = lp3974_ldo8_consumer,
315 static struct regulator_consumer_supply lp3974_ldo9_consumer =
316 REGULATOR_SUPPLY("vddio", "0-003c");
318 static struct regulator_init_data lp3974_ldo9_data = {
329 .num_consumer_supplies = 1,
330 .consumer_supplies = &lp3974_ldo9_consumer,
333 static struct regulator_init_data lp3974_ldo10_data = {
340 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
347 static struct regulator_consumer_supply lp3974_ldo11_consumer =
348 REGULATOR_SUPPLY("dig_28", "0-001f");
350 static struct regulator_init_data lp3974_ldo11_data = {
352 .name = "CAM_AF_3.3V",
356 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
361 .num_consumer_supplies = 1,
362 .consumer_supplies = &lp3974_ldo11_consumer,
365 static struct regulator_init_data lp3974_ldo12_data = {
371 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
378 static struct regulator_init_data lp3974_ldo13_data = {
384 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
391 static struct regulator_consumer_supply lp3974_ldo14_consumer =
392 REGULATOR_SUPPLY("dig_18", "0-001f");
394 static struct regulator_init_data lp3974_ldo14_data = {
396 .name = "CAM_I_HOST_1.8V",
400 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
405 .num_consumer_supplies = 1,
406 .consumer_supplies = &lp3974_ldo14_consumer,
410 static struct regulator_consumer_supply lp3974_ldo15_consumer =
411 REGULATOR_SUPPLY("dig_12", "0-001f");
413 static struct regulator_init_data lp3974_ldo15_data = {
415 .name = "CAM_S_DIG+FM33_CORE_1.2V",
419 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
424 .num_consumer_supplies = 1,
425 .consumer_supplies = &lp3974_ldo15_consumer,
428 static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
429 REGULATOR_SUPPLY("vdda", "0-003c"),
430 REGULATOR_SUPPLY("a_sensor", "0-001f"),
433 static struct regulator_init_data lp3974_ldo16_data = {
435 .name = "CAM_S_ANA_2.8V",
439 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
444 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
445 .consumer_supplies = lp3974_ldo16_consumer,
448 static struct regulator_init_data lp3974_ldo17_data = {
450 .name = "VCC_3.0V_LCD",
454 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
462 static struct regulator_init_data lp3974_32khz_ap_data = {
472 static struct regulator_init_data lp3974_32khz_cp_data = {
481 static struct regulator_init_data lp3974_vichg_data = {
490 static struct regulator_init_data lp3974_esafeout1_data = {
495 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
503 static struct regulator_init_data lp3974_esafeout2_data = {
507 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
514 static struct max8998_regulator_data lp3974_regulators[] = {
515 { MAX8998_LDO2, &lp3974_ldo2_data },
516 { MAX8998_LDO3, &lp3974_ldo3_data },
517 { MAX8998_LDO4, &lp3974_ldo4_data },
518 { MAX8998_LDO5, &lp3974_ldo5_data },
519 { MAX8998_LDO6, &lp3974_ldo6_data },
520 { MAX8998_LDO7, &lp3974_ldo7_data },
521 { MAX8998_LDO8, &lp3974_ldo8_data },
522 { MAX8998_LDO9, &lp3974_ldo9_data },
523 { MAX8998_LDO10, &lp3974_ldo10_data },
524 { MAX8998_LDO11, &lp3974_ldo11_data },
525 { MAX8998_LDO12, &lp3974_ldo12_data },
526 { MAX8998_LDO13, &lp3974_ldo13_data },
527 { MAX8998_LDO14, &lp3974_ldo14_data },
528 { MAX8998_LDO15, &lp3974_ldo15_data },
529 { MAX8998_LDO16, &lp3974_ldo16_data },
530 { MAX8998_LDO17, &lp3974_ldo17_data },
531 { MAX8998_BUCK1, &lp3974_buck1_data },
532 { MAX8998_BUCK2, &lp3974_buck2_data },
533 { MAX8998_BUCK3, &lp3974_buck3_data },
534 { MAX8998_BUCK4, &lp3974_buck4_data },
535 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
536 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
537 { MAX8998_ENVICHG, &lp3974_vichg_data },
538 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
539 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
542 static struct max8998_platform_data universal_lp3974_pdata = {
543 .num_regulators = ARRAY_SIZE(lp3974_regulators),
544 .regulators = lp3974_regulators,
545 .buck1_voltage1 = 1100000, /* INT */
546 .buck1_voltage2 = 1000000,
547 .buck1_voltage3 = 1100000,
548 .buck1_voltage4 = 1000000,
549 .buck1_set1 = EXYNOS4_GPX0(5),
550 .buck1_set2 = EXYNOS4_GPX0(6),
551 .buck2_voltage1 = 1200000, /* G3D */
552 .buck2_voltage2 = 1100000,
553 .buck1_default_idx = 0,
554 .buck2_set3 = EXYNOS4_GPE2(0),
555 .buck2_default_idx = 0,
560 enum fixed_regulator_id {
562 FIXED_REG_ID_HDMI_5V,
563 FIXED_REG_ID_CAM_S_IF,
564 FIXED_REG_ID_CAM_I_CORE,
565 FIXED_REG_ID_CAM_VT_DIO,
568 static struct regulator_consumer_supply hdmi_fixed_consumer =
569 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
571 static struct regulator_init_data hdmi_fixed_voltage_init_data = {
574 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
576 .num_consumer_supplies = 1,
577 .consumer_supplies = &hdmi_fixed_consumer,
580 static struct fixed_voltage_config hdmi_fixed_voltage_config = {
581 .supply_name = "HDMI_EN1",
582 .microvolts = 5000000,
583 .gpio = EXYNOS4_GPE0(1),
585 .init_data = &hdmi_fixed_voltage_init_data,
588 static struct platform_device hdmi_fixed_voltage = {
589 .name = "reg-fixed-voltage",
590 .id = FIXED_REG_ID_HDMI_5V,
592 .platform_data = &hdmi_fixed_voltage_config,
596 /* GPIO I2C 5 (PMIC) */
597 static struct i2c_board_info i2c5_devs[] __initdata = {
599 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
600 .platform_data = &universal_max8952_pdata,
602 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
603 .platform_data = &universal_lp3974_pdata,
608 static struct mxt_platform_data qt602240_platform_data = {
615 .voltage = 2800000, /* 2.8V */
616 .orient = MXT_DIAGONAL,
617 .irqflags = IRQF_TRIGGER_FALLING,
620 static struct i2c_board_info i2c3_devs[] __initdata = {
622 I2C_BOARD_INFO("qt602240_ts", 0x4a),
623 .platform_data = &qt602240_platform_data,
627 static void __init universal_tsp_init(void)
631 /* TSP_LDO_ON: XMDMADDR_11 */
632 gpio = EXYNOS4_GPE2(3);
633 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
634 gpio_export(gpio, 0);
636 /* TSP_INT: XMDMADDR_7 */
637 gpio = EXYNOS4_GPE1(7);
638 gpio_request(gpio, "TSP_INT");
640 s5p_register_gpio_interrupt(gpio);
641 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
642 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
643 i2c3_devs[0].irq = gpio_to_irq(gpio);
647 /* GPIO I2C 12 (3 Touchkey) */
648 static uint32_t touchkey_keymap[] = {
649 /* MCS_KEY_MAP(value, keycode) */
650 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
651 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
654 static struct mcs_platform_data touchkey_data = {
655 .keymap = touchkey_keymap,
656 .keymap_size = ARRAY_SIZE(touchkey_keymap),
660 /* GPIO I2C 3_TOUCH 2.8V */
661 #define I2C_GPIO_BUS_12 12
662 static struct i2c_gpio_platform_data i2c_gpio12_data = {
663 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
664 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
667 static struct platform_device i2c_gpio12 = {
669 .id = I2C_GPIO_BUS_12,
671 .platform_data = &i2c_gpio12_data,
675 static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
677 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
678 .platform_data = &touchkey_data,
682 static void __init universal_touchkey_init(void)
686 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
687 gpio_request(gpio, "3_TOUCH_INT");
688 s5p_register_gpio_interrupt(gpio);
689 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
690 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
692 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
693 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
696 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
697 .frequency = 300 * 1000,
702 static struct gpio_keys_button universal_gpio_keys_tables[] = {
704 .code = KEY_VOLUMEUP,
705 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
706 .desc = "gpio-keys: KEY_VOLUMEUP",
709 .debounce_interval = 1,
711 .code = KEY_VOLUMEDOWN,
712 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
713 .desc = "gpio-keys: KEY_VOLUMEDOWN",
716 .debounce_interval = 1,
719 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
720 .desc = "gpio-keys: KEY_CONFIG",
723 .debounce_interval = 1,
726 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
727 .desc = "gpio-keys: KEY_CAMERA",
730 .debounce_interval = 1,
733 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
734 .desc = "gpio-keys: KEY_OK",
737 .debounce_interval = 1,
741 static struct gpio_keys_platform_data universal_gpio_keys_data = {
742 .buttons = universal_gpio_keys_tables,
743 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
746 static struct platform_device universal_gpio_keys = {
749 .platform_data = &universal_gpio_keys_data,
754 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
756 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
757 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
758 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
759 .cd_type = S3C_SDHCI_CD_PERMANENT,
762 static struct regulator_consumer_supply mmc0_supplies[] = {
763 REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
766 static struct regulator_init_data mmc0_fixed_voltage_init_data = {
768 .name = "VMEM_VDD_2.8V",
769 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
771 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
772 .consumer_supplies = mmc0_supplies,
775 static struct fixed_voltage_config mmc0_fixed_voltage_config = {
776 .supply_name = "MASSMEMORY_EN",
777 .microvolts = 2800000,
778 .gpio = EXYNOS4_GPE1(3),
780 .init_data = &mmc0_fixed_voltage_init_data,
783 static struct platform_device mmc0_fixed_voltage = {
784 .name = "reg-fixed-voltage",
785 .id = FIXED_REG_ID_MMC0,
787 .platform_data = &mmc0_fixed_voltage_config,
792 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
794 .host_caps = MMC_CAP_4_BIT_DATA |
795 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
796 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
797 .ext_cd_gpio_invert = 1,
798 .cd_type = S3C_SDHCI_CD_GPIO,
802 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
804 .host_caps = MMC_CAP_4_BIT_DATA |
805 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
806 .cd_type = S3C_SDHCI_CD_EXTERNAL,
809 static void __init universal_sdhci_init(void)
811 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
812 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
813 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
817 static struct i2c_board_info i2c1_devs[] __initdata = {
818 /* Gyro, To be updated */
821 #ifdef CONFIG_DRM_EXYNOS
822 static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
836 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
838 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
839 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
845 static struct s3c_fb_pd_win universal_fb_win0 = {
860 .virtual_y = 2 * 800,
863 static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
864 .win[0] = &universal_fb_win0,
865 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
867 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
868 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
869 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
873 static struct regulator_consumer_supply cam_vt_dio_supply =
874 REGULATOR_SUPPLY("vdd_core", "0-003c");
876 static struct regulator_init_data cam_vt_dio_reg_init_data = {
877 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
878 .num_consumer_supplies = 1,
879 .consumer_supplies = &cam_vt_dio_supply,
882 static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
883 .supply_name = "CAM_VT_D_IO",
884 .microvolts = 2800000,
885 .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
887 .init_data = &cam_vt_dio_reg_init_data,
890 static struct platform_device cam_vt_dio_fixed_reg_dev = {
891 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
892 .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
895 static struct regulator_consumer_supply cam_i_core_supply =
896 REGULATOR_SUPPLY("core", "0-001f");
898 static struct regulator_init_data cam_i_core_reg_init_data = {
899 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
900 .num_consumer_supplies = 1,
901 .consumer_supplies = &cam_i_core_supply,
904 static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
905 .supply_name = "CAM_I_CORE_1.2V",
906 .microvolts = 1200000,
907 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
909 .init_data = &cam_i_core_reg_init_data,
912 static struct platform_device cam_i_core_fixed_reg_dev = {
913 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
914 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
917 static struct regulator_consumer_supply cam_s_if_supply =
918 REGULATOR_SUPPLY("d_sensor", "0-001f");
920 static struct regulator_init_data cam_s_if_reg_init_data = {
921 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
922 .num_consumer_supplies = 1,
923 .consumer_supplies = &cam_s_if_supply,
926 static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
927 .supply_name = "CAM_S_IF_1.8V",
928 .microvolts = 1800000,
929 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
931 .init_data = &cam_s_if_reg_init_data,
934 static struct platform_device cam_s_if_fixed_reg_dev = {
935 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
936 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
939 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
940 .clk_rate = 166000000UL,
944 .phy_enable = s5p_csis_phy_enable,
947 #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
948 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
949 #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
950 #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
951 #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
953 static int s5k6aa_set_power(int on)
955 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
959 static struct s5k6aa_platform_data s5k6aa_platdata = {
960 .mclk_frequency = 21600000UL,
961 .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
962 .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
963 .bus_type = V4L2_MBUS_PARALLEL,
965 .set_power = s5k6aa_set_power,
968 static struct i2c_board_info s5k6aa_board_info = {
969 I2C_BOARD_INFO("S5K6AA", 0x3C),
970 .platform_data = &s5k6aa_platdata,
973 static int m5mols_set_power(struct device *dev, int on)
975 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
976 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
980 static struct m5mols_platform_data m5mols_platdata = {
981 .gpio_reset = GPIO_CAM_MEGA_nRST,
983 .set_power = m5mols_set_power,
986 static struct i2c_board_info m5mols_board_info = {
987 I2C_BOARD_INFO("M5MOLS", 0x1F),
988 .platform_data = &m5mols_platdata,
991 static struct s5p_fimc_isp_info universal_camera_sensors[] = {
994 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
995 V4L2_MBUS_VSYNC_ACTIVE_LOW,
996 .bus_type = FIMC_ITU_601,
997 .board_info = &s5k6aa_board_info,
999 .clk_frequency = 24000000UL,
1002 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
1003 V4L2_MBUS_VSYNC_ACTIVE_LOW,
1004 .bus_type = FIMC_MIPI_CSI2,
1005 .board_info = &m5mols_board_info,
1007 .clk_frequency = 24000000UL,
1008 .csi_data_align = 32,
1012 static struct s5p_platform_fimc fimc_md_platdata = {
1013 .isp_info = universal_camera_sensors,
1014 .num_clients = ARRAY_SIZE(universal_camera_sensors),
1017 static struct gpio universal_camera_gpios[] = {
1018 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
1019 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
1020 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
1021 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
1022 { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
1023 { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
1027 static struct s3c_hsotg_plat universal_hsotg_pdata;
1029 static void __init universal_camera_init(void)
1031 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
1032 &s5p_device_mipi_csis0);
1033 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
1034 &s5p_device_fimc_md);
1036 if (gpio_request_array(universal_camera_gpios,
1037 ARRAY_SIZE(universal_camera_gpios))) {
1038 pr_err("%s: GPIO request failed\n", __func__);
1042 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
1043 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
1045 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1047 /* Free GPIOs controlled directly by the sensor drivers. */
1048 gpio_free(GPIO_CAM_MEGA_nRST);
1049 gpio_free(GPIO_CAM_8M_ISP_INT);
1050 gpio_free(GPIO_CAM_VGA_NRST);
1051 gpio_free(GPIO_CAM_VGA_NSTBY);
1053 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
1054 pr_err("Camera port A setup failed\n");
1057 static struct platform_device *universal_devices[] __initdata = {
1058 /* Samsung Platform Devices */
1059 &s5p_device_mipi_csis0,
1065 &mmc0_fixed_voltage,
1072 &s5p_device_i2c_hdmiphy,
1073 &hdmi_fixed_voltage,
1078 /* Universal Devices */
1080 &universal_gpio_keys,
1081 &s5p_device_onenand,
1084 #ifdef CONFIG_DRM_EXYNOS
1087 &s3c_device_usb_hsotg,
1091 &cam_vt_dio_fixed_reg_dev,
1092 &cam_i_core_fixed_reg_dev,
1093 &cam_s_if_fixed_reg_dev,
1094 &s5p_device_fimc_md,
1097 static void __init universal_map_io(void)
1099 clk_xusbxti.rate = 24000000;
1100 exynos_init_io(NULL, 0);
1101 s3c24xx_init_clocks(24000000);
1102 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1103 s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
1106 static void s5p_tv_setup(void)
1108 /* direct HPD to HDMI chip */
1109 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1110 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1111 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1114 static void __init universal_reserve(void)
1116 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1119 static void __init universal_machine_init(void)
1121 universal_sdhci_init();
1124 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
1125 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1127 universal_tsp_init();
1128 s3c_i2c3_set_platdata(NULL);
1129 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1131 s3c_i2c5_set_platdata(NULL);
1132 s5p_i2c_hdmiphy_set_platdata(NULL);
1133 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1135 #ifdef CONFIG_DRM_EXYNOS
1136 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
1137 exynos4_fimd0_gpio_setup_24bpp();
1139 s5p_fimd0_set_platdata(&universal_lcd_pdata);
1142 universal_touchkey_init();
1143 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1144 ARRAY_SIZE(i2c_gpio12_devs));
1146 s3c_hsotg_set_platdata(&universal_hsotg_pdata);
1147 universal_camera_init();
1150 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
1153 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1154 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1155 .atag_offset = 0x100,
1156 .init_irq = exynos4_init_irq,
1157 .map_io = universal_map_io,
1158 .handle_irq = gic_handle_irq,
1159 .init_machine = universal_machine_init,
1160 .timer = &s5p_timer,
1161 .reserve = &universal_reserve,
1162 .restart = exynos4_restart,