2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2012 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
16 #include <linux/slab.h>
17 #include <linux/err.h>
21 * struct clk_pfd - IMX PFD clock
22 * @clk_hw: clock source
23 * @reg: PFD register address
24 * @idx: the index of PFD encoded in the register
26 * PFD clock found on i.MX6 series. Each register for PFD has 4 clk_pfd
27 * data encoded, and member idx is used to specify the one. And each
28 * register has SET, CLR and TOG registers at offset 0x4 0x8 and 0xc.
36 #define to_clk_pfd(_hw) container_of(_hw, struct clk_pfd, hw)
42 static int clk_pfd_enable(struct clk_hw *hw)
44 struct clk_pfd *pfd = to_clk_pfd(hw);
46 writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + CLR);
51 static void clk_pfd_disable(struct clk_hw *hw)
53 struct clk_pfd *pfd = to_clk_pfd(hw);
55 writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + SET);
58 static unsigned long clk_pfd_recalc_rate(struct clk_hw *hw,
59 unsigned long parent_rate)
61 struct clk_pfd *pfd = to_clk_pfd(hw);
62 u64 tmp = parent_rate;
63 u8 frac = (readl_relaxed(pfd->reg) >> (pfd->idx * 8)) & 0x3f;
71 static long clk_pfd_round_rate(struct clk_hw *hw, unsigned long rate,
77 tmp = tmp * 18 + rate / 2;
91 static int clk_pfd_set_rate(struct clk_hw *hw, unsigned long rate,
92 unsigned long parent_rate)
94 struct clk_pfd *pfd = to_clk_pfd(hw);
95 u64 tmp = parent_rate;
98 tmp = tmp * 18 + rate / 2;
106 writel_relaxed(0x3f << (pfd->idx * 8), pfd->reg + CLR);
107 writel_relaxed(frac << (pfd->idx * 8), pfd->reg + SET);
112 static const struct clk_ops clk_pfd_ops = {
113 .enable = clk_pfd_enable,
114 .disable = clk_pfd_disable,
115 .recalc_rate = clk_pfd_recalc_rate,
116 .round_rate = clk_pfd_round_rate,
117 .set_rate = clk_pfd_set_rate,
120 struct clk *imx_clk_pfd(const char *name, const char *parent_name,
121 void __iomem *reg, u8 idx)
125 struct clk_init_data init;
127 pfd = kzalloc(sizeof(*pfd), GFP_KERNEL);
129 return ERR_PTR(-ENOMEM);
135 init.ops = &clk_pfd_ops;
137 init.parent_names = &parent_name;
138 init.num_parents = 1;
140 pfd->hw.init = &init;
142 clk = clk_register(NULL, &pfd->hw);