2 #include <linux/module.h>
5 #include <linux/slab.h>
6 #include <linux/sys_soc.h>
11 unsigned int __mxc_cpu_type;
12 EXPORT_SYMBOL(__mxc_cpu_type);
14 static unsigned int imx_soc_revision;
16 void mxc_set_cpu_type(unsigned int type)
18 __mxc_cpu_type = type;
21 void imx_set_soc_revision(unsigned int rev)
23 imx_soc_revision = rev;
26 unsigned int imx_get_soc_revision(void)
28 return imx_soc_revision;
31 void imx_print_silicon_rev(const char *cpu, int srev)
33 if (srev == IMX_CHIP_REVISION_UNKNOWN)
34 pr_info("CPU identified as %s, unknown revision\n", cpu);
36 pr_info("CPU identified as %s, silicon rev %d.%d\n",
37 cpu, (srev >> 4) & 0xf, srev & 0xf);
40 void __init imx_set_aips(void __iomem *base)
44 * Set all MPROTx to be non-bufferable, trusted for R/W,
45 * not forced to user-mode.
47 __raw_writel(0x77777777, base + 0x0);
48 __raw_writel(0x77777777, base + 0x4);
51 * Set all OPACRx to be non-bufferable, to not require
52 * supervisor privilege level for access, allow for
53 * write access and untrusted master access.
55 __raw_writel(0x0, base + 0x40);
56 __raw_writel(0x0, base + 0x44);
57 __raw_writel(0x0, base + 0x48);
58 __raw_writel(0x0, base + 0x4C);
59 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
60 __raw_writel(reg, base + 0x50);
63 struct device * __init imx_soc_device_init(void)
65 struct soc_device_attribute *soc_dev_attr;
66 struct soc_device *soc_dev;
67 struct device_node *root;
71 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
75 soc_dev_attr->family = "Freescale i.MX";
77 root = of_find_node_by_path("/");
78 ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
83 switch (__mxc_cpu_type) {
120 soc_dev_attr->soc_id = soc_id;
122 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
123 (imx_soc_revision >> 4) & 0xf,
124 imx_soc_revision & 0xf);
125 if (!soc_dev_attr->revision)
128 soc_dev = soc_device_register(soc_dev_attr);
132 return soc_device_to_device(soc_dev);
135 kfree(soc_dev_attr->revision);