arch/arm/mach-imx/mach-imx6q.c

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/clk.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/cpuidle.h>
  16 #include <linux/delay.h>
  17 #include <linux/export.h>
  18 #include <linux/init.h>
  19 #include <linux/io.h>
  20 #include <linux/irq.h>
  21 #include <linux/of.h>
  22 #include <linux/of_address.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/of_platform.h>
  25 #include <linux/pinctrl/machine.h>
  26 #include <linux/phy.h>
  27 #include <linux/regmap.h>
  28 #include <linux/micrel_phy.h>
  29 #include <linux/mfd/syscon.h>
  30 #include <asm/cpuidle.h>
  31 #include <asm/smp_twd.h>
  32 #include <asm/hardware/cache-l2x0.h>
  33 #include <asm/hardware/gic.h>
  34 #include <asm/mach/arch.h>
  35 #include <asm/mach/time.h>
  36 #include <asm/system_misc.h>
  37 #include <mach/common.h>
  38 #include <mach/cpuidle.h>
  39 #include <mach/hardware.h>
  40
  41
  42 void imx6q_restart(char mode, const char *cmd)
  43 {
  44         struct device_node *np;
  45         void __iomem *wdog_base;
  46
  47         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
  48         wdog_base = of_iomap(np, 0);
  49         if (!wdog_base)
  50                 goto soft;
  51
  52         imx_src_prepare_restart();
  53
  54         /* enable wdog */
  55         writew_relaxed(1 << 2, wdog_base);
  56         /* write twice to ensure the request will not get ignored */
  57         writew_relaxed(1 << 2, wdog_base);
  58
  59         /* wait for reset to assert ... */
  60         mdelay(500);
  61
  62         pr_err("Watchdog reset failed to assert reset\n");
  63
  64         /* delay to allow the serial port to show the message */
  65         mdelay(50);
  66
  67 soft:
  68         /* we'll take a jump through zero as a poor second */
  69         soft_restart(0);
  70 }
  71
  72 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
  73 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
  74 {
  75         if (IS_ENABLED(CONFIG_PHYLIB)) {
  76                 /* min rx data delay */
  77                 phy_write(phydev, 0x0b, 0x8105);
  78                 phy_write(phydev, 0x0c, 0x0000);
  79
  80                 /* max rx/tx clock delay, min rx/tx control delay */
  81                 phy_write(phydev, 0x0b, 0x8104);
  82                 phy_write(phydev, 0x0c, 0xf0f0);
  83                 phy_write(phydev, 0x0b, 0x104);
  84         }
  85
  86         return 0;
  87 }
  88
  89 static void __init imx6q_sabrelite_cko1_setup(void)
  90 {
  91         struct clk *cko1_sel, *ahb, *cko1;
  92         unsigned long rate;
  93
  94         cko1_sel = clk_get_sys(NULL, "cko1_sel");
  95         ahb = clk_get_sys(NULL, "ahb");
  96         cko1 = clk_get_sys(NULL, "cko1");
  97         if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
  98                 pr_err("cko1 setup failed!\n");
  99                 goto put_clk;
 100         }
 101         clk_set_parent(cko1_sel, ahb);
 102         rate = clk_round_rate(cko1, 16000000);
 103         clk_set_rate(cko1, rate);
 104         clk_register_clkdev(cko1, NULL, "0-000a");
 105 put_clk:
 106         if (!IS_ERR(cko1_sel))
 107                 clk_put(cko1_sel);
 108         if (!IS_ERR(ahb))
 109                 clk_put(ahb);
 110         if (!IS_ERR(cko1))
 111                 clk_put(cko1);
 112 }
 113
 114 static void __init imx6q_sabrelite_init(void)
 115 {
 116         if (IS_ENABLED(CONFIG_PHYLIB))
 117                 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 118                                 ksz9021rn_phy_fixup);
 119         imx6q_sabrelite_cko1_setup();
 120 }
 121
 122 static void __init imx6q_usb_init(void)
 123 {
 124         struct regmap *anatop;
 125
 126 #define HW_ANADIG_USB1_CHRG_DETECT              0x000001b0
 127 #define HW_ANADIG_USB2_CHRG_DETECT              0x00000210
 128
 129 #define BM_ANADIG_USB_CHRG_DETECT_EN_B          0x00100000
 130 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B    0x00080000
 131
 132         anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
 133         if (!IS_ERR(anatop)) {
 134                 /*
 135                  * The external charger detector needs to be disabled,
 136                  * or the signal at DP will be poor
 137                  */
 138                 regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
 139                                 BM_ANADIG_USB_CHRG_DETECT_EN_B
 140                                 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
 141                 regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
 142                                 BM_ANADIG_USB_CHRG_DETECT_EN_B |
 143                                 BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
 144         } else {
 145                 pr_warn("failed to find fsl,imx6q-anatop regmap\n");
 146         }
 147 }
 148
 149 static void __init imx6q_init_machine(void)
 150 {
 151         /*
 152          * This should be removed when all imx6q boards have pinctrl
 153          * states for devices defined in device tree.
 154          */
 155         pinctrl_provide_dummies();
 156
 157         if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
 158                 imx6q_sabrelite_init();
 159
 160         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 161
 162         imx6q_pm_init();
 163         imx6q_usb_init();
 164 }
 165
 166 static struct cpuidle_driver imx6q_cpuidle_driver = {
 167         .name                   = "imx6q_cpuidle",
 168         .owner                  = THIS_MODULE,
 169         .en_core_tk_irqen       = 1,
 170         .states[0]              = ARM_CPUIDLE_WFI_STATE,
 171         .state_count            = 1,
 172 };
 173
 174 static void __init imx6q_init_late(void)
 175 {
 176         imx_cpuidle_init(&imx6q_cpuidle_driver);
 177 }
 178
 179 static void __init imx6q_map_io(void)
 180 {
 181         imx_lluart_map_io();
 182         imx_scu_map_io();
 183         imx6q_clock_map_io();
 184 }
 185
 186 static const struct of_device_id imx6q_irq_match[] __initconst = {
 187         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
 188         { /* sentinel */ }
 189 };
 190
 191 static void __init imx6q_init_irq(void)
 192 {
 193         l2x0_of_init(0, ~0UL);
 194         imx_src_init();
 195         imx_gpc_init();
 196         of_irq_init(imx6q_irq_match);
 197 }
 198
 199 static void __init imx6q_timer_init(void)
 200 {
 201         mx6q_clocks_init();
 202         twd_local_timer_of_register();
 203 }
 204
 205 static struct sys_timer imx6q_timer = {
 206         .init = imx6q_timer_init,
 207 };
 208
 209 static const char *imx6q_dt_compat[] __initdata = {
 210         "fsl,imx6q-arm2",
 211         "fsl,imx6q-sabrelite",
 212         "fsl,imx6q-sabresd",
 213         "fsl,imx6q",
 214         NULL,
 215 };
 216
 217 DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
 218         .map_io         = imx6q_map_io,
 219         .init_irq       = imx6q_init_irq,
 220         .handle_irq     = imx6q_handle_irq,
 221         .timer          = &imx6q_timer,
 222         .init_machine   = imx6q_init_machine,
 223         .init_late      = imx6q_init_late,
 224         .dt_compat      = imx6q_dt_compat,
 225         .restart        = imx6q_restart,
 226 MACHINE_END