2 * arch/arm/mach-kirkwood/common.c
4 * Core functions for Marvell Kirkwood SoCs
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/mbus.h>
16 #include <linux/mv643xx_eth.h>
17 #include <linux/mv643xx_i2c.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/spi/orion_spi.h>
23 #include <asm/timex.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/time.h>
26 #include <mach/kirkwood.h>
27 #include <mach/bridge-regs.h>
28 #include <plat/cache-feroceon-l2.h>
29 #include <plat/ehci-orion.h>
30 #include <plat/mvsdio.h>
31 #include <plat/mv_xor.h>
32 #include <plat/orion_nand.h>
33 #include <plat/orion_wdt.h>
34 #include <plat/time.h>
37 /*****************************************************************************
39 ****************************************************************************/
40 static struct map_desc kirkwood_io_desc[] __initdata = {
42 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
43 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
44 .length = KIRKWOOD_PCIE_IO_SIZE,
47 .virtual = KIRKWOOD_REGS_VIRT_BASE,
48 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
49 .length = KIRKWOOD_REGS_SIZE,
54 void __init kirkwood_map_io(void)
56 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
60 * Default clock control bits. Any bit _not_ set in this variable
61 * will be cleared from the hardware after platform devices have been
62 * registered. Some reserved bits must be set to 1.
64 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
67 /*****************************************************************************
69 ****************************************************************************/
70 static struct orion_ehci_data kirkwood_ehci_data = {
71 .dram = &kirkwood_mbus_dram_info,
72 .phy_version = EHCI_PHY_NA,
75 static u64 ehci_dmamask = 0xffffffffUL;
78 /*****************************************************************************
80 ****************************************************************************/
81 static struct resource kirkwood_ehci_resources[] = {
83 .start = USB_PHYS_BASE,
84 .end = USB_PHYS_BASE + 0x0fff,
85 .flags = IORESOURCE_MEM,
87 .start = IRQ_KIRKWOOD_USB,
88 .end = IRQ_KIRKWOOD_USB,
89 .flags = IORESOURCE_IRQ,
93 static struct platform_device kirkwood_ehci = {
97 .dma_mask = &ehci_dmamask,
98 .coherent_dma_mask = 0xffffffff,
99 .platform_data = &kirkwood_ehci_data,
101 .resource = kirkwood_ehci_resources,
102 .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
105 void __init kirkwood_ehci_init(void)
107 kirkwood_clk_ctrl |= CGC_USB0;
108 platform_device_register(&kirkwood_ehci);
112 /*****************************************************************************
114 ****************************************************************************/
115 struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
116 .dram = &kirkwood_mbus_dram_info,
119 static struct resource kirkwood_ge00_shared_resources[] = {
122 .start = GE00_PHYS_BASE + 0x2000,
123 .end = GE00_PHYS_BASE + 0x3fff,
124 .flags = IORESOURCE_MEM,
126 .name = "ge00 err irq",
127 .start = IRQ_KIRKWOOD_GE00_ERR,
128 .end = IRQ_KIRKWOOD_GE00_ERR,
129 .flags = IORESOURCE_IRQ,
133 static struct platform_device kirkwood_ge00_shared = {
134 .name = MV643XX_ETH_SHARED_NAME,
137 .platform_data = &kirkwood_ge00_shared_data,
139 .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
140 .resource = kirkwood_ge00_shared_resources,
143 static struct resource kirkwood_ge00_resources[] = {
146 .start = IRQ_KIRKWOOD_GE00_SUM,
147 .end = IRQ_KIRKWOOD_GE00_SUM,
148 .flags = IORESOURCE_IRQ,
152 static struct platform_device kirkwood_ge00 = {
153 .name = MV643XX_ETH_NAME,
156 .resource = kirkwood_ge00_resources,
158 .coherent_dma_mask = 0xffffffff,
162 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
164 kirkwood_clk_ctrl |= CGC_GE0;
165 eth_data->shared = &kirkwood_ge00_shared;
166 kirkwood_ge00.dev.platform_data = eth_data;
168 platform_device_register(&kirkwood_ge00_shared);
169 platform_device_register(&kirkwood_ge00);
173 /*****************************************************************************
175 ****************************************************************************/
176 struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
177 .dram = &kirkwood_mbus_dram_info,
178 .shared_smi = &kirkwood_ge00_shared,
181 static struct resource kirkwood_ge01_shared_resources[] = {
184 .start = GE01_PHYS_BASE + 0x2000,
185 .end = GE01_PHYS_BASE + 0x3fff,
186 .flags = IORESOURCE_MEM,
188 .name = "ge01 err irq",
189 .start = IRQ_KIRKWOOD_GE01_ERR,
190 .end = IRQ_KIRKWOOD_GE01_ERR,
191 .flags = IORESOURCE_IRQ,
195 static struct platform_device kirkwood_ge01_shared = {
196 .name = MV643XX_ETH_SHARED_NAME,
199 .platform_data = &kirkwood_ge01_shared_data,
201 .num_resources = ARRAY_SIZE(kirkwood_ge01_shared_resources),
202 .resource = kirkwood_ge01_shared_resources,
205 static struct resource kirkwood_ge01_resources[] = {
208 .start = IRQ_KIRKWOOD_GE01_SUM,
209 .end = IRQ_KIRKWOOD_GE01_SUM,
210 .flags = IORESOURCE_IRQ,
214 static struct platform_device kirkwood_ge01 = {
215 .name = MV643XX_ETH_NAME,
218 .resource = kirkwood_ge01_resources,
220 .coherent_dma_mask = 0xffffffff,
224 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
226 kirkwood_clk_ctrl |= CGC_GE1;
227 eth_data->shared = &kirkwood_ge01_shared;
228 kirkwood_ge01.dev.platform_data = eth_data;
230 platform_device_register(&kirkwood_ge01_shared);
231 platform_device_register(&kirkwood_ge01);
235 /*****************************************************************************
237 ****************************************************************************/
238 static struct resource kirkwood_switch_resources[] = {
242 .flags = IORESOURCE_IRQ,
246 static struct platform_device kirkwood_switch_device = {
250 .resource = kirkwood_switch_resources,
253 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
258 kirkwood_switch_resources[0].start = irq;
259 kirkwood_switch_resources[0].end = irq;
260 kirkwood_switch_device.num_resources = 1;
263 d->netdev = &kirkwood_ge00.dev;
264 for (i = 0; i < d->nr_chips; i++)
265 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
266 kirkwood_switch_device.dev.platform_data = d;
268 platform_device_register(&kirkwood_switch_device);
272 /*****************************************************************************
274 ****************************************************************************/
275 static struct resource kirkwood_nand_resource = {
276 .flags = IORESOURCE_MEM,
277 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
278 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
279 KIRKWOOD_NAND_MEM_SIZE - 1,
282 static struct orion_nand_data kirkwood_nand_data = {
288 static struct platform_device kirkwood_nand_flash = {
289 .name = "orion_nand",
292 .platform_data = &kirkwood_nand_data,
294 .resource = &kirkwood_nand_resource,
298 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
301 kirkwood_clk_ctrl |= CGC_RUNIT;
302 kirkwood_nand_data.parts = parts;
303 kirkwood_nand_data.nr_parts = nr_parts;
304 kirkwood_nand_data.chip_delay = chip_delay;
305 platform_device_register(&kirkwood_nand_flash);
308 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
309 int (*dev_ready)(struct mtd_info *))
311 kirkwood_clk_ctrl |= CGC_RUNIT;
312 kirkwood_nand_data.parts = parts;
313 kirkwood_nand_data.nr_parts = nr_parts;
314 kirkwood_nand_data.dev_ready = dev_ready;
315 platform_device_register(&kirkwood_nand_flash);
318 /*****************************************************************************
320 ****************************************************************************/
321 static struct resource kirkwood_rtc_resource = {
322 .start = RTC_PHYS_BASE,
323 .end = RTC_PHYS_BASE + SZ_16 - 1,
324 .flags = IORESOURCE_MEM,
327 static void __init kirkwood_rtc_init(void)
329 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
333 /*****************************************************************************
335 ****************************************************************************/
336 static struct resource kirkwood_sata_resources[] = {
339 .start = SATA_PHYS_BASE,
340 .end = SATA_PHYS_BASE + 0x5000 - 1,
341 .flags = IORESOURCE_MEM,
344 .start = IRQ_KIRKWOOD_SATA,
345 .end = IRQ_KIRKWOOD_SATA,
346 .flags = IORESOURCE_IRQ,
350 static struct platform_device kirkwood_sata = {
354 .coherent_dma_mask = 0xffffffff,
356 .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
357 .resource = kirkwood_sata_resources,
360 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
362 kirkwood_clk_ctrl |= CGC_SATA0;
363 if (sata_data->n_ports > 1)
364 kirkwood_clk_ctrl |= CGC_SATA1;
365 sata_data->dram = &kirkwood_mbus_dram_info;
366 kirkwood_sata.dev.platform_data = sata_data;
367 platform_device_register(&kirkwood_sata);
371 /*****************************************************************************
373 ****************************************************************************/
374 static struct resource mvsdio_resources[] = {
376 .start = SDIO_PHYS_BASE,
377 .end = SDIO_PHYS_BASE + SZ_1K - 1,
378 .flags = IORESOURCE_MEM,
381 .start = IRQ_KIRKWOOD_SDIO,
382 .end = IRQ_KIRKWOOD_SDIO,
383 .flags = IORESOURCE_IRQ,
387 static u64 mvsdio_dmamask = 0xffffffffUL;
389 static struct platform_device kirkwood_sdio = {
393 .dma_mask = &mvsdio_dmamask,
394 .coherent_dma_mask = 0xffffffff,
396 .num_resources = ARRAY_SIZE(mvsdio_resources),
397 .resource = mvsdio_resources,
400 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
404 kirkwood_pcie_id(&dev, &rev);
405 if (rev == 0) /* catch all Kirkwood Z0's */
406 mvsdio_data->clock = 100000000;
408 mvsdio_data->clock = 200000000;
409 mvsdio_data->dram = &kirkwood_mbus_dram_info;
410 kirkwood_clk_ctrl |= CGC_SDIO;
411 kirkwood_sdio.dev.platform_data = mvsdio_data;
412 platform_device_register(&kirkwood_sdio);
416 /*****************************************************************************
418 ****************************************************************************/
419 static struct orion_spi_info kirkwood_spi_plat_data = {
422 static struct resource kirkwood_spi_resources[] = {
424 .start = SPI_PHYS_BASE,
425 .end = SPI_PHYS_BASE + SZ_512 - 1,
426 .flags = IORESOURCE_MEM,
430 static struct platform_device kirkwood_spi = {
433 .resource = kirkwood_spi_resources,
435 .platform_data = &kirkwood_spi_plat_data,
437 .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
440 void __init kirkwood_spi_init()
442 kirkwood_clk_ctrl |= CGC_RUNIT;
443 platform_device_register(&kirkwood_spi);
447 /*****************************************************************************
449 ****************************************************************************/
450 static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
451 .freq_m = 8, /* assumes 166 MHz TCLK */
453 .timeout = 1000, /* Default timeout of 1 second */
456 static struct resource kirkwood_i2c_resources[] = {
458 .start = I2C_PHYS_BASE,
459 .end = I2C_PHYS_BASE + 0x1f,
460 .flags = IORESOURCE_MEM,
462 .start = IRQ_KIRKWOOD_TWSI,
463 .end = IRQ_KIRKWOOD_TWSI,
464 .flags = IORESOURCE_IRQ,
468 static struct platform_device kirkwood_i2c = {
469 .name = MV64XXX_I2C_CTLR_NAME,
471 .num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
472 .resource = kirkwood_i2c_resources,
474 .platform_data = &kirkwood_i2c_pdata,
478 void __init kirkwood_i2c_init(void)
480 platform_device_register(&kirkwood_i2c);
484 /*****************************************************************************
486 ****************************************************************************/
487 static struct plat_serial8250_port kirkwood_uart0_data[] = {
489 .mapbase = UART0_PHYS_BASE,
490 .membase = (char *)UART0_VIRT_BASE,
491 .irq = IRQ_KIRKWOOD_UART_0,
492 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
500 static struct resource kirkwood_uart0_resources[] = {
502 .start = UART0_PHYS_BASE,
503 .end = UART0_PHYS_BASE + 0xff,
504 .flags = IORESOURCE_MEM,
506 .start = IRQ_KIRKWOOD_UART_0,
507 .end = IRQ_KIRKWOOD_UART_0,
508 .flags = IORESOURCE_IRQ,
512 static struct platform_device kirkwood_uart0 = {
513 .name = "serial8250",
516 .platform_data = kirkwood_uart0_data,
518 .resource = kirkwood_uart0_resources,
519 .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
522 void __init kirkwood_uart0_init(void)
524 platform_device_register(&kirkwood_uart0);
528 /*****************************************************************************
530 ****************************************************************************/
531 static struct plat_serial8250_port kirkwood_uart1_data[] = {
533 .mapbase = UART1_PHYS_BASE,
534 .membase = (char *)UART1_VIRT_BASE,
535 .irq = IRQ_KIRKWOOD_UART_1,
536 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
544 static struct resource kirkwood_uart1_resources[] = {
546 .start = UART1_PHYS_BASE,
547 .end = UART1_PHYS_BASE + 0xff,
548 .flags = IORESOURCE_MEM,
550 .start = IRQ_KIRKWOOD_UART_1,
551 .end = IRQ_KIRKWOOD_UART_1,
552 .flags = IORESOURCE_IRQ,
556 static struct platform_device kirkwood_uart1 = {
557 .name = "serial8250",
560 .platform_data = kirkwood_uart1_data,
562 .resource = kirkwood_uart1_resources,
563 .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
566 void __init kirkwood_uart1_init(void)
568 platform_device_register(&kirkwood_uart1);
572 /*****************************************************************************
573 * Cryptographic Engines and Security Accelerator (CESA)
574 ****************************************************************************/
576 static struct resource kirkwood_crypto_res[] = {
579 .start = CRYPTO_PHYS_BASE,
580 .end = CRYPTO_PHYS_BASE + 0xffff,
581 .flags = IORESOURCE_MEM,
584 .start = KIRKWOOD_SRAM_PHYS_BASE,
585 .end = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
586 .flags = IORESOURCE_MEM,
588 .name = "crypto interrupt",
589 .start = IRQ_KIRKWOOD_CRYPTO,
590 .end = IRQ_KIRKWOOD_CRYPTO,
591 .flags = IORESOURCE_IRQ,
595 static struct platform_device kirkwood_crypto_device = {
598 .num_resources = ARRAY_SIZE(kirkwood_crypto_res),
599 .resource = kirkwood_crypto_res,
602 void __init kirkwood_crypto_init(void)
604 kirkwood_clk_ctrl |= CGC_CRYPTO;
605 platform_device_register(&kirkwood_crypto_device);
609 /*****************************************************************************
611 ****************************************************************************/
612 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
613 .dram = &kirkwood_mbus_dram_info,
616 static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
619 /*****************************************************************************
621 ****************************************************************************/
622 static struct resource kirkwood_xor0_shared_resources[] = {
625 .start = XOR0_PHYS_BASE,
626 .end = XOR0_PHYS_BASE + 0xff,
627 .flags = IORESOURCE_MEM,
629 .name = "xor 0 high",
630 .start = XOR0_HIGH_PHYS_BASE,
631 .end = XOR0_HIGH_PHYS_BASE + 0xff,
632 .flags = IORESOURCE_MEM,
636 static struct platform_device kirkwood_xor0_shared = {
637 .name = MV_XOR_SHARED_NAME,
640 .platform_data = &kirkwood_xor_shared_data,
642 .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
643 .resource = kirkwood_xor0_shared_resources,
646 static struct resource kirkwood_xor00_resources[] = {
648 .start = IRQ_KIRKWOOD_XOR_00,
649 .end = IRQ_KIRKWOOD_XOR_00,
650 .flags = IORESOURCE_IRQ,
654 static struct mv_xor_platform_data kirkwood_xor00_data = {
655 .shared = &kirkwood_xor0_shared,
657 .pool_size = PAGE_SIZE,
660 static struct platform_device kirkwood_xor00_channel = {
663 .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
664 .resource = kirkwood_xor00_resources,
666 .dma_mask = &kirkwood_xor_dmamask,
667 .coherent_dma_mask = DMA_BIT_MASK(64),
668 .platform_data = &kirkwood_xor00_data,
672 static struct resource kirkwood_xor01_resources[] = {
674 .start = IRQ_KIRKWOOD_XOR_01,
675 .end = IRQ_KIRKWOOD_XOR_01,
676 .flags = IORESOURCE_IRQ,
680 static struct mv_xor_platform_data kirkwood_xor01_data = {
681 .shared = &kirkwood_xor0_shared,
683 .pool_size = PAGE_SIZE,
686 static struct platform_device kirkwood_xor01_channel = {
689 .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
690 .resource = kirkwood_xor01_resources,
692 .dma_mask = &kirkwood_xor_dmamask,
693 .coherent_dma_mask = DMA_BIT_MASK(64),
694 .platform_data = &kirkwood_xor01_data,
698 static void __init kirkwood_xor0_init(void)
700 kirkwood_clk_ctrl |= CGC_XOR0;
701 platform_device_register(&kirkwood_xor0_shared);
704 * two engines can't do memset simultaneously, this limitation
705 * satisfied by removing memset support from one of the engines.
707 dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
708 dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
709 platform_device_register(&kirkwood_xor00_channel);
711 dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
712 dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
713 dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
714 platform_device_register(&kirkwood_xor01_channel);
718 /*****************************************************************************
720 ****************************************************************************/
721 static struct resource kirkwood_xor1_shared_resources[] = {
724 .start = XOR1_PHYS_BASE,
725 .end = XOR1_PHYS_BASE + 0xff,
726 .flags = IORESOURCE_MEM,
728 .name = "xor 1 high",
729 .start = XOR1_HIGH_PHYS_BASE,
730 .end = XOR1_HIGH_PHYS_BASE + 0xff,
731 .flags = IORESOURCE_MEM,
735 static struct platform_device kirkwood_xor1_shared = {
736 .name = MV_XOR_SHARED_NAME,
739 .platform_data = &kirkwood_xor_shared_data,
741 .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
742 .resource = kirkwood_xor1_shared_resources,
745 static struct resource kirkwood_xor10_resources[] = {
747 .start = IRQ_KIRKWOOD_XOR_10,
748 .end = IRQ_KIRKWOOD_XOR_10,
749 .flags = IORESOURCE_IRQ,
753 static struct mv_xor_platform_data kirkwood_xor10_data = {
754 .shared = &kirkwood_xor1_shared,
756 .pool_size = PAGE_SIZE,
759 static struct platform_device kirkwood_xor10_channel = {
762 .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
763 .resource = kirkwood_xor10_resources,
765 .dma_mask = &kirkwood_xor_dmamask,
766 .coherent_dma_mask = DMA_BIT_MASK(64),
767 .platform_data = &kirkwood_xor10_data,
771 static struct resource kirkwood_xor11_resources[] = {
773 .start = IRQ_KIRKWOOD_XOR_11,
774 .end = IRQ_KIRKWOOD_XOR_11,
775 .flags = IORESOURCE_IRQ,
779 static struct mv_xor_platform_data kirkwood_xor11_data = {
780 .shared = &kirkwood_xor1_shared,
782 .pool_size = PAGE_SIZE,
785 static struct platform_device kirkwood_xor11_channel = {
788 .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
789 .resource = kirkwood_xor11_resources,
791 .dma_mask = &kirkwood_xor_dmamask,
792 .coherent_dma_mask = DMA_BIT_MASK(64),
793 .platform_data = &kirkwood_xor11_data,
797 static void __init kirkwood_xor1_init(void)
799 kirkwood_clk_ctrl |= CGC_XOR1;
800 platform_device_register(&kirkwood_xor1_shared);
803 * two engines can't do memset simultaneously, this limitation
804 * satisfied by removing memset support from one of the engines.
806 dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
807 dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
808 platform_device_register(&kirkwood_xor10_channel);
810 dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
811 dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
812 dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
813 platform_device_register(&kirkwood_xor11_channel);
817 /*****************************************************************************
819 ****************************************************************************/
820 static struct orion_wdt_platform_data kirkwood_wdt_data = {
824 static struct platform_device kirkwood_wdt_device = {
828 .platform_data = &kirkwood_wdt_data,
833 static void __init kirkwood_wdt_init(void)
835 kirkwood_wdt_data.tclk = kirkwood_tclk;
836 platform_device_register(&kirkwood_wdt_device);
840 /*****************************************************************************
842 ****************************************************************************/
845 int __init kirkwood_find_tclk(void)
849 kirkwood_pcie_id(&dev, &rev);
850 if (dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 ||
851 rev == MV88F6281_REV_A1))
857 static void __init kirkwood_timer_init(void)
859 kirkwood_tclk = kirkwood_find_tclk();
860 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
863 struct sys_timer kirkwood_timer = {
864 .init = kirkwood_timer_init,
868 /*****************************************************************************
870 ****************************************************************************/
872 * Identify device ID and revision.
874 static char * __init kirkwood_id(void)
878 kirkwood_pcie_id(&dev, &rev);
880 if (dev == MV88F6281_DEV_ID) {
881 if (rev == MV88F6281_REV_Z0)
882 return "MV88F6281-Z0";
883 else if (rev == MV88F6281_REV_A0)
884 return "MV88F6281-A0";
885 else if (rev == MV88F6281_REV_A1)
886 return "MV88F6281-A1";
888 return "MV88F6281-Rev-Unsupported";
889 } else if (dev == MV88F6192_DEV_ID) {
890 if (rev == MV88F6192_REV_Z0)
891 return "MV88F6192-Z0";
892 else if (rev == MV88F6192_REV_A0)
893 return "MV88F6192-A0";
895 return "MV88F6192-Rev-Unsupported";
896 } else if (dev == MV88F6180_DEV_ID) {
897 if (rev == MV88F6180_REV_A0)
898 return "MV88F6180-Rev-A0";
900 return "MV88F6180-Rev-Unsupported";
902 return "Device-Unknown";
906 static void __init kirkwood_l2_init(void)
908 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
909 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
912 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
917 void __init kirkwood_init(void)
919 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
920 kirkwood_id(), kirkwood_tclk);
921 kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
922 kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
923 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
924 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
925 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
928 * Disable propagation of mbus errors to the CPU local bus,
929 * as this causes mbus errors (which can occur for example
930 * for PCI aborts) to throw CPU aborts, which we're not set
933 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
935 kirkwood_setup_cpu_mbus();
937 #ifdef CONFIG_CACHE_FEROCEON_L2
941 /* internal devices that every board has */
944 kirkwood_xor0_init();
945 kirkwood_xor1_init();
946 kirkwood_crypto_init();
949 static int __init kirkwood_clock_gate(void)
951 unsigned int curr = readl(CLOCK_GATING_CTRL);
953 printk(KERN_DEBUG "Gating clock of unused units\n");
954 printk(KERN_DEBUG "before: 0x%08x\n", curr);
956 /* Make sure those units are accessible */
957 writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0, CLOCK_GATING_CTRL);
959 /* For SATA: first shutdown the phy */
960 if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
961 /* Disable PLL and IVREF */
962 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
964 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
966 if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
967 /* Disable PLL and IVREF */
968 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
970 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
973 /* For PCIe: first shutdown the phy */
974 if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
975 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
977 if (readl(PCIE_STATUS) & 0x1)
979 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
982 /* Now gate clock the required units */
983 writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
984 printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
988 late_initcall(kirkwood_clock_gate);