1 /* linux/arch/arm/mach-msm/devices.c
3 * Copyright (C) 2008 Google, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
16 #include <linux/kernel.h>
17 #include <linux/platform_device.h>
19 #include <mach/irqs.h>
20 #include <mach/msm_iomap.h>
23 #include <asm/mach/flash.h>
24 #include <linux/mtd/nand.h>
25 #include <linux/mtd/partitions.h>
31 static struct resource resources_uart1[] = {
35 .flags = IORESOURCE_IRQ,
38 .start = MSM_UART1_PHYS,
39 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
40 .flags = IORESOURCE_MEM,
44 static struct resource resources_uart2[] = {
48 .flags = IORESOURCE_IRQ,
51 .start = MSM_UART2_PHYS,
52 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
53 .flags = IORESOURCE_MEM,
57 static struct resource resources_uart3[] = {
61 .flags = IORESOURCE_IRQ,
64 .start = MSM_UART3_PHYS,
65 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
66 .flags = IORESOURCE_MEM,
70 struct platform_device msm_device_uart1 = {
73 .num_resources = ARRAY_SIZE(resources_uart1),
74 .resource = resources_uart1,
77 struct platform_device msm_device_uart2 = {
80 .num_resources = ARRAY_SIZE(resources_uart2),
81 .resource = resources_uart2,
84 struct platform_device msm_device_uart3 = {
87 .num_resources = ARRAY_SIZE(resources_uart3),
88 .resource = resources_uart3,
91 static struct resource resources_i2c[] = {
93 .start = MSM_I2C_PHYS,
94 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
95 .flags = IORESOURCE_MEM,
100 .flags = IORESOURCE_IRQ,
104 struct platform_device msm_device_i2c = {
107 .num_resources = ARRAY_SIZE(resources_i2c),
108 .resource = resources_i2c,
111 static struct resource resources_hsusb[] = {
113 .start = MSM_HSUSB_PHYS,
114 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
115 .flags = IORESOURCE_MEM,
120 .flags = IORESOURCE_IRQ,
124 struct platform_device msm_device_hsusb = {
127 .num_resources = ARRAY_SIZE(resources_hsusb),
128 .resource = resources_hsusb,
130 .coherent_dma_mask = 0xffffffff,
134 struct flash_platform_data msm_nand_data = {
139 static struct resource resources_nand[] = {
143 .flags = IORESOURCE_DMA,
147 struct platform_device msm_device_nand = {
150 .num_resources = ARRAY_SIZE(resources_nand),
151 .resource = resources_nand,
153 .platform_data = &msm_nand_data,
157 struct platform_device msm_device_smd = {
162 static struct resource resources_sdc1[] = {
164 .start = MSM_SDC1_PHYS,
165 .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
166 .flags = IORESOURCE_MEM,
171 .flags = IORESOURCE_IRQ,
177 .flags = IORESOURCE_IRQ,
181 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
187 .flags = IORESOURCE_DMA,
191 static struct resource resources_sdc2[] = {
193 .start = MSM_SDC2_PHYS,
194 .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
195 .flags = IORESOURCE_MEM,
200 .flags = IORESOURCE_IRQ,
206 .flags = IORESOURCE_IRQ,
210 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
216 .flags = IORESOURCE_DMA,
220 static struct resource resources_sdc3[] = {
222 .start = MSM_SDC3_PHYS,
223 .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
224 .flags = IORESOURCE_MEM,
229 .flags = IORESOURCE_IRQ,
235 .flags = IORESOURCE_IRQ,
239 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
245 .flags = IORESOURCE_DMA,
249 static struct resource resources_sdc4[] = {
251 .start = MSM_SDC4_PHYS,
252 .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
253 .flags = IORESOURCE_MEM,
258 .flags = IORESOURCE_IRQ,
264 .flags = IORESOURCE_IRQ,
268 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
274 .flags = IORESOURCE_DMA,
278 struct platform_device msm_device_sdc1 = {
281 .num_resources = ARRAY_SIZE(resources_sdc1),
282 .resource = resources_sdc1,
284 .coherent_dma_mask = 0xffffffff,
288 struct platform_device msm_device_sdc2 = {
291 .num_resources = ARRAY_SIZE(resources_sdc2),
292 .resource = resources_sdc2,
294 .coherent_dma_mask = 0xffffffff,
298 struct platform_device msm_device_sdc3 = {
301 .num_resources = ARRAY_SIZE(resources_sdc3),
302 .resource = resources_sdc3,
304 .coherent_dma_mask = 0xffffffff,
308 struct platform_device msm_device_sdc4 = {
311 .num_resources = ARRAY_SIZE(resources_sdc4),
312 .resource = resources_sdc4,
314 .coherent_dma_mask = 0xffffffff,
318 static struct platform_device *msm_sdcc_devices[] __initdata = {
325 int __init msm_add_sdcc(unsigned int controller,
326 struct msm_mmc_platform_data *plat,
327 unsigned int stat_irq, unsigned long stat_irq_flags)
329 struct platform_device *pdev;
330 struct resource *res;
332 if (controller < 1 || controller > 4)
335 pdev = msm_sdcc_devices[controller-1];
336 pdev->dev.platform_data = plat;
338 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
342 res->start = res->end = stat_irq;
343 res->flags &= ~IORESOURCE_DISABLED;
344 res->flags |= stat_irq_flags;
347 return platform_device_register(pdev);
350 struct clk msm_clocks_7x01a[] = {
351 CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
352 CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
353 CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, 0),
354 CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
355 CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
356 CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF),
357 CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
358 CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, OFF),
359 CLK_PCOM("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0),
360 CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
361 CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
362 CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
363 CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
364 CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
365 CLK_PCOM("pbus_clk", PBUS_CLK, NULL, 0),
366 CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
367 CLK_PCOM("pmdh_clk", PMDH_CLK, NULL, OFF ),
368 CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
369 CLK_PCOM("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF),
370 CLK_PCOM("sdc_pclk", SDC1_P_CLK, &msm_device_sdc1.dev, OFF),
371 CLK_PCOM("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF),
372 CLK_PCOM("sdc_pclk", SDC2_P_CLK, &msm_device_sdc2.dev, OFF),
373 CLK_PCOM("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF),
374 CLK_PCOM("sdc_pclk", SDC3_P_CLK, &msm_device_sdc3.dev, OFF),
375 CLK_PCOM("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF),
376 CLK_PCOM("sdc_pclk", SDC4_P_CLK, &msm_device_sdc4.dev, OFF),
377 CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
378 CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
379 CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
380 CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
381 CLK_PCOM("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF),
382 CLK_PCOM("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
383 CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
384 CLK_PCOM("uart1dm_clk", UART1DM_CLK, NULL, OFF),
385 CLK_PCOM("uart2dm_clk", UART2DM_CLK, NULL, 0),
386 CLK_PCOM("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF),
387 CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, &msm_device_hsusb.dev, OFF),
388 CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
389 CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF ),
390 CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
391 CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
394 unsigned msm_num_clocks_7x01a = ARRAY_SIZE(msm_clocks_7x01a);