2 * Symmetric Multi Processing (SMP) support for Armada XP
4 * Copyright (C) 2012 Marvell
6 * Lior Amsalem <alior@marvell.com>
7 * Yehuda Yitschak <yehuday@marvell.com>
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
15 * The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency
16 * This file implements the routines for preparing the SMP infrastructure
17 * and waking up the secondary CPUs
20 #include <linux/init.h>
21 #include <linux/smp.h>
22 #include <linux/clk.h>
24 #include <linux/of_address.h>
25 #include <linux/mbus.h>
26 #include <asm/cacheflush.h>
27 #include <asm/smp_plat.h>
29 #include "armada-370-xp.h"
31 #include "coherency.h"
33 #define AXP_BOOTROM_BASE 0xfff00000
34 #define AXP_BOOTROM_SIZE 0x100000
36 static struct clk *__init get_cpu_clk(int cpu)
39 struct device_node *np = of_get_cpu_node(cpu, NULL);
41 if (WARN(!np, "missing cpu node\n"))
43 cpu_clk = of_clk_get(np, 0);
44 if (WARN_ON(IS_ERR(cpu_clk)))
49 static void __init set_secondary_cpus_clock(void)
55 thiscpu = smp_processor_id();
56 cpu_clk = get_cpu_clk(thiscpu);
59 clk_prepare_enable(cpu_clk);
60 rate = clk_get_rate(cpu_clk);
62 /* set all the other CPU clk to the same rate than the boot CPU */
63 for_each_possible_cpu(cpu) {
66 cpu_clk = get_cpu_clk(cpu);
69 clk_set_rate(cpu_clk, rate);
73 static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
77 pr_info("Booting CPU %d\n", cpu);
79 hw_cpu = cpu_logical_map(cpu);
80 mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);
81 ret = mvebu_cpu_reset_deassert(hw_cpu);
83 pr_warn("unable to boot CPU: %d\n", ret);
90 static void __init armada_xp_smp_init_cpus(void)
92 unsigned int ncores = num_possible_cpus();
94 if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS)
95 panic("Invalid number of CPUs in DT\n");
98 static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
100 struct device_node *node;
104 set_secondary_cpus_clock();
109 * In order to boot the secondary CPUs we need to ensure
110 * the bootROM is mapped at the correct address.
112 node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
114 panic("Cannot find 'marvell,bootrom' compatible node");
116 err = of_address_to_resource(node, 0, &res);
118 panic("Cannot get 'bootrom' node address");
120 if (res.start != AXP_BOOTROM_BASE ||
121 resource_size(&res) != AXP_BOOTROM_SIZE)
122 panic("The address for the BootROM is incorrect");
125 struct smp_operations armada_xp_smp_ops __initdata = {
126 .smp_init_cpus = armada_xp_smp_init_cpus,
127 .smp_prepare_cpus = armada_xp_smp_prepare_cpus,
128 .smp_boot_secondary = armada_xp_boot_secondary,
129 #ifdef CONFIG_HOTPLUG_CPU
130 .cpu_die = armada_xp_cpu_die,
134 CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",