2 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/gpio.h>
20 #include <linux/init.h>
21 #include <linux/interrupt.h>
22 #include <linux/platform_device.h>
23 #include <linux/types.h>
25 #include <linux/usb/otg.h>
27 #include <mach/common.h>
28 #include <mach/imx-uart.h>
29 #include <mach/iomux-mx3.h>
30 #include <mach/hardware.h>
32 #include <mach/mxc_ehci.h>
33 #include <mach/ulpi.h>
37 static unsigned int devboard_pins[] = {
39 MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
40 MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
42 MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
43 MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
44 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
45 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
47 MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
48 MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
49 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
50 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
51 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
53 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
54 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
57 static struct imxuart_platform_data uart_pdata = {
58 .flags = IMXUART_HAVE_RTSCTS,
61 #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
62 #define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
64 static int devboard_sdhc2_get_ro(struct device *dev)
66 return !gpio_get_value(SDHC2_WP);
69 static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
74 ret = gpio_request(SDHC2_CD, "sdhc-detect");
78 gpio_direction_input(SDHC2_CD);
80 ret = gpio_request(SDHC2_WP, "sdhc-wp");
83 gpio_direction_input(SDHC2_WP);
85 ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
86 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
87 "sdhc2-card-detect", data);
101 static void devboard_sdhc2_exit(struct device *dev, void *data)
103 free_irq(gpio_to_irq(SDHC2_CD), data);
108 static struct imxmmc_platform_data sdhc2_pdata = {
109 .get_ro = devboard_sdhc2_get_ro,
110 .init = devboard_sdhc2_init,
111 .exit = devboard_sdhc2_exit,
114 #define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
115 #define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
116 #define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
117 #define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
119 static void devboard_init_sel_gpios(void)
121 if (!gpio_request(SEL0, "sel0")) {
122 gpio_direction_input(SEL0);
123 gpio_export(SEL0, true);
126 if (!gpio_request(SEL1, "sel1")) {
127 gpio_direction_input(SEL1);
128 gpio_export(SEL1, true);
131 if (!gpio_request(SEL2, "sel2")) {
132 gpio_direction_input(SEL2);
133 gpio_export(SEL2, true);
136 if (!gpio_request(SEL3, "sel3")) {
137 gpio_direction_input(SEL3);
138 gpio_export(SEL3, true);
141 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
142 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
144 static int devboard_usbh1_hw_init(struct platform_device *pdev)
146 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
148 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
149 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
150 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
151 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
152 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
153 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
154 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
160 #define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
161 #define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
163 static int devboard_isp1105_init(struct otg_transceiver *otg)
165 int ret = gpio_request(USBH1_MODE, "usbh1-mode");
169 gpio_direction_output(USBH1_MODE, 0);
171 ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
173 gpio_free(USBH1_MODE);
176 gpio_direction_output(USBH1_VBUSEN_B, 1);
182 static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
185 gpio_set_value(USBH1_VBUSEN_B, 0);
187 gpio_set_value(USBH1_VBUSEN_B, 1);
192 static struct mxc_usbh_platform_data usbh1_pdata = {
193 .init = devboard_usbh1_hw_init,
194 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
195 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
198 static int __init devboard_usbh1_init(void)
200 struct otg_transceiver *otg;
202 otg = kzalloc(sizeof(*otg), GFP_KERNEL);
206 otg->label = "ISP1105";
207 otg->init = devboard_isp1105_init;
208 otg->set_vbus = devboard_isp1105_set_vbus;
210 usbh1_pdata.otg = otg;
212 return mxc_register_device(&mxc_usbh1, &usbh1_pdata);
216 * system init for baseboard usage. Will be called by mx31moboard init.
218 void __init mx31moboard_devboard_init(void)
220 printk(KERN_INFO "Initializing mx31devboard peripherals\n");
222 mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
225 mxc_register_device(&mxc_uart_device1, &uart_pdata);
227 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
229 devboard_init_sel_gpios();
231 devboard_usbh1_init();