2 * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/platform_device.h>
14 #include <linux/gpio.h>
15 #include <mach/hardware.h>
16 #include <mach/imx-uart.h>
17 #include <mach/irqs.h>
19 static struct resource uart0[] = {
21 .start = MX51_UART1_BASE_ADDR,
22 .end = MX51_UART1_BASE_ADDR + 0xfff,
23 .flags = IORESOURCE_MEM,
25 .start = MX51_MXC_INT_UART1,
26 .end = MX51_MXC_INT_UART1,
27 .flags = IORESOURCE_IRQ,
31 struct platform_device mxc_uart_device0 = {
35 .num_resources = ARRAY_SIZE(uart0),
38 static struct resource uart1[] = {
40 .start = MX51_UART2_BASE_ADDR,
41 .end = MX51_UART2_BASE_ADDR + 0xfff,
42 .flags = IORESOURCE_MEM,
44 .start = MX51_MXC_INT_UART2,
45 .end = MX51_MXC_INT_UART2,
46 .flags = IORESOURCE_IRQ,
50 struct platform_device mxc_uart_device1 = {
54 .num_resources = ARRAY_SIZE(uart1),
57 static struct resource uart2[] = {
59 .start = MX51_UART3_BASE_ADDR,
60 .end = MX51_UART3_BASE_ADDR + 0xfff,
61 .flags = IORESOURCE_MEM,
63 .start = MX51_MXC_INT_UART3,
64 .end = MX51_MXC_INT_UART3,
65 .flags = IORESOURCE_IRQ,
69 struct platform_device mxc_uart_device2 = {
73 .num_resources = ARRAY_SIZE(uart2),
76 static struct resource mxc_fec_resources[] = {
78 .start = MX51_MXC_FEC_BASE_ADDR,
79 .end = MX51_MXC_FEC_BASE_ADDR + 0xfff,
80 .flags = IORESOURCE_MEM,
82 .start = MX51_MXC_INT_FEC,
83 .end = MX51_MXC_INT_FEC,
84 .flags = IORESOURCE_IRQ,
88 struct platform_device mxc_fec_device = {
91 .num_resources = ARRAY_SIZE(mxc_fec_resources),
92 .resource = mxc_fec_resources,
95 static struct mxc_gpio_port mxc_gpio_ports[] = {
97 .chip.label = "gpio-0",
98 .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR),
99 .irq = MX51_MXC_INT_GPIO1_LOW,
100 .virtual_irq_start = MXC_GPIO_IRQ_START
103 .chip.label = "gpio-1",
104 .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR),
105 .irq = MX51_MXC_INT_GPIO2_LOW,
106 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1
109 .chip.label = "gpio-2",
110 .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR),
111 .irq = MX51_MXC_INT_GPIO3_LOW,
112 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2
115 .chip.label = "gpio-3",
116 .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR),
117 .irq = MX51_MXC_INT_GPIO4_LOW,
118 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
122 int __init mxc_register_gpios(void)
124 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));