2 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
11 * Create static mapping between physical to virtual memory.
15 #include <linux/init.h>
17 #include <asm/mach/map.h>
19 #include <mach/hardware.h>
20 #include <mach/common.h>
21 #include <mach/iomux-v3.h>
24 * Define the MX51 memory map.
26 static struct map_desc mx51_io_desc[] __initdata = {
27 imx_map_entry(MX51, IRAM, MT_DEVICE),
28 imx_map_entry(MX51, DEBUG, MT_DEVICE),
29 imx_map_entry(MX51, AIPS1, MT_DEVICE),
30 imx_map_entry(MX51, SPBA0, MT_DEVICE),
31 imx_map_entry(MX51, AIPS2, MT_DEVICE),
35 * Define the MX53 memory map.
37 static struct map_desc mx53_io_desc[] __initdata = {
38 imx_map_entry(MX53, AIPS1, MT_DEVICE),
39 imx_map_entry(MX53, SPBA0, MT_DEVICE),
40 imx_map_entry(MX53, AIPS2, MT_DEVICE),
44 * This function initializes the memory map. It is called during the
45 * system startup to create static physical to virtual memory mappings
48 void __init mx51_map_io(void)
50 mxc_set_cpu_type(MXC_CPU_MX51);
51 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
52 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
53 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
56 void __init mx53_map_io(void)
58 mxc_set_cpu_type(MXC_CPU_MX53);
59 mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR));
60 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG_BASE_ADDR));
61 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
64 int imx51_register_gpios(void);
66 void __init mx51_init_irq(void)
68 unsigned long tzic_addr;
69 void __iomem *tzic_virt;
71 if (mx51_revision() < IMX_CHIP_REVISION_2_0)
72 tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
74 tzic_addr = MX51_TZIC_BASE_ADDR;
76 tzic_virt = ioremap(tzic_addr, SZ_16K);
78 panic("unable to map TZIC interrupt controller\n");
80 tzic_init_irq(tzic_virt);
81 imx51_register_gpios();
84 int imx53_register_gpios(void);
86 void __init mx53_init_irq(void)
88 unsigned long tzic_addr;
89 void __iomem *tzic_virt;
91 tzic_addr = MX53_TZIC_BASE_ADDR;
93 tzic_virt = ioremap(tzic_addr, SZ_16K);
95 panic("unable to map TZIC interrupt controller\n");
97 tzic_init_irq(tzic_virt);
98 imx53_register_gpios();