arch/arm/mach-mx6/board-mx6q_sabreauto.c

   1 /*
   2  * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13
  14  * You should have received a copy of the GNU General Public License along
  15  * with this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  17  */
  18
  19 #include <linux/types.h>
  20 #include <linux/sched.h>
  21 #include <linux/delay.h>
  22 #include <linux/pm.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/irq.h>
  25 #include <linux/init.h>
  26 #include <linux/input.h>
  27 #include <linux/nodemask.h>
  28 #include <linux/clk.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/fsl_devices.h>
  31 #include <linux/smsc911x.h>
  32 #include <linux/spi/spi.h>
  33 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  34 #include <linux/spi/flash.h>
  35 #else
  36 #include <linux/mtd/physmap.h>
  37 #endif
  38 #include <linux/i2c.h>
  39 #include <linux/i2c/pca953x.h>
  40 #include <linux/ata.h>
  41 #include <linux/mtd/mtd.h>
  42 #include <linux/mtd/map.h>
  43 #include <linux/mtd/partitions.h>
  44 #include <linux/pmic_external.h>
  45 #include <linux/pmic_status.h>
  46 #include <linux/ipu.h>
  47 #include <linux/mxcfb.h>
  48 #include <linux/pwm_backlight.h>
  49 #include <linux/fec.h>
  50 #include <linux/memblock.h>
  51 #include <linux/gpio.h>
  52 #include <linux/etherdevice.h>
  53 #include <linux/regulator/anatop-regulator.h>
  54 #include <linux/regulator/consumer.h>
  55 #include <linux/regulator/machine.h>
  56 #include <linux/regulator/fixed.h>
  57 #include <sound/pcm.h>
  58
  59 #include <mach/common.h>
  60 #include <mach/hardware.h>
  61 #include <mach/mxc_dvfs.h>
  62 #include <mach/memory.h>
  63 #include <mach/iomux-mx6q.h>
  64 #include <mach/imx-uart.h>
  65 #include <mach/viv_gpu.h>
  66 #include <mach/ahci_sata.h>
  67 #include <mach/ipu-v3.h>
  68 #include <mach/mxc_hdmi.h>
  69 #include <mach/mxc_asrc.h>
  70 #include <mach/mipi_dsi.h>
  71 #include <mach/mipi_csi2.h>
  72
  73 #include <asm/irq.h>
  74 #include <asm/setup.h>
  75 #include <asm/mach-types.h>
  76 #include <asm/mach/arch.h>
  77 #include <asm/mach/time.h>
  78
  79 #include "usb.h"
  80 #include "devices-imx6q.h"
  81 #include "crm_regs.h"
  82 #include "cpu_op-mx6.h"
  83 #include "board-mx6q_sabreauto.h"
  84 #include "board-mx6solo_sabreauto.h"
  85
  86 /* sorted by GPIO_NR */
  87 #define SABREAUTO_SD1_CD                IMX_GPIO_NR(1, 1)
  88 #define SABREAUTO_ESAI_INT              IMX_GPIO_NR(1, 10)
  89 #define SABREAUTO_ANDROID_HOME          IMX_GPIO_NR(1, 11)
  90 #define SABREAUTO_ANDROID_BACK          IMX_GPIO_NR(1, 12)
  91 #define SABREAUTO_SD3_WP                IMX_GPIO_NR(1, 13)
  92 #define SABREAUTO_I2C_EXP_RST           IMX_GPIO_NR(1, 15)
  93 #define SABREAUTO_USB_OTG_OC            IMX_GPIO_NR(2, 8)
  94 #define SABREAUTO_LDB_BACKLIGHT3        IMX_GPIO_NR(2, 9)
  95 #define SABREAUTO_LDB_BACKLIGHT4        IMX_GPIO_NR(2, 10)
  96 #define SABREAUTO_ANDROID_MENU          IMX_GPIO_NR(2, 12)
  97 #define SABREAUTO_ANDROID_VOLUP         IMX_GPIO_NR(2, 15)
  98 #define SABREAUTO_CAP_TCH_INT           IMX_GPIO_NR(2, 28)
  99 #define SABREAUTO_ECSPI1_CS1            IMX_GPIO_NR(3, 19)
 100 #define SABREAUTO_DISP0_PWR             IMX_GPIO_NR(3, 24)
 101 #define SABREAUTO_DISP0_I2C_EN          IMX_GPIO_NR(3, 28)
 102 #define SABREAUTO_DISP0_DET_INT         IMX_GPIO_NR(3, 31)
 103 #define SABREAUTO_CSI0_RST              IMX_GPIO_NR(4, 5)
 104 #define SABREAUTO_DISP0_RESET           IMX_GPIO_NR(5, 0)
 105 #define SABREAUTO_I2C3_STEER            IMX_GPIO_NR(5, 4)
 106 #define SABREAUTO_ANDROID_VOLDOWN       IMX_GPIO_NR(5, 14)
 107 #define SABREAUTO_PMIC_INT              IMX_GPIO_NR(5, 16)
 108 #define SABREAUTO_ALS_INT               IMX_GPIO_NR(5, 17)
 109 #define SABREAUTO_SD1_WP                IMX_GPIO_NR(5, 20)
 110 #define SABREAUTO_CSI0_PWN              IMX_GPIO_NR(5, 23)
 111 #define SABREAUTO_USB_HOST1_OC          IMX_GPIO_NR(5, 0)
 112 #define SABREAUTO_SD3_CD                IMX_GPIO_NR(6, 15)
 113
 114 #define SABREAUTO_MAX7310_1_BASE_ADDR   IMX_GPIO_NR(8, 0)
 115 #define SABREAUTO_MAX7310_2_BASE_ADDR   IMX_GPIO_NR(8, 8)
 116 #define SABREAUTO_MAX7310_3_BASE_ADDR   IMX_GPIO_NR(8, 16)
 117
 118 #define SABREAUTO_IO_EXP_GPIO1(x)       (SABREAUTO_MAX7310_1_BASE_ADDR + (x))
 119 #define SABREAUTO_IO_EXP_GPIO2(x)       (SABREAUTO_MAX7310_2_BASE_ADDR + (x))
 120 #define SABREAUTO_IO_EXP_GPIO3(x)       (SABREAUTO_MAX7310_3_BASE_ADDR + (x))
 121
 122 /*
 123  * CAN2 STBY and EN lines are the same as the CAN1. These lines are not
 124  * independent.
 125  */
 126 #define SABREAUTO_PER_RST               SABREAUTO_IO_EXP_GPIO1(3)
 127 #define SABREAUTO_VIDEOIN_PWR           SABREAUTO_IO_EXP_GPIO2(2)
 128 #define SABREAUTO_CAN1_STEER            SABREAUTO_IO_EXP_GPIO2(3)
 129 #define SABREAUTO_CAN_STBY              SABREAUTO_IO_EXP_GPIO2(5)
 130 #define SABREAUTO_CAN_EN                SABREAUTO_IO_EXP_GPIO2(6)
 131 #define SABREAUTO_USB_HOST1_PWR         SABREAUTO_IO_EXP_GPIO2(7)
 132 #define SABREAUTO_USB_OTG_PWR           SABREAUTO_IO_EXP_GPIO3(1)
 133 #define BMCR_PDOWN                      0x0800 /* PHY Powerdown */
 134
 135 static int mma8451_position = 3;
 136 static struct clk *sata_clk;
 137 static int mipi_sensor;
 138 static int uart2_en;
 139 static int can0_enable;
 140
 141 static int __init uart2_enable(char *p)
 142 {
 143         uart2_en = 1;
 144         return 0;
 145 }
 146 early_param("uart2", uart2_enable);
 147
 148 enum sd_pad_mode {
 149         SD_PAD_MODE_LOW_SPEED,
 150         SD_PAD_MODE_MED_SPEED,
 151         SD_PAD_MODE_HIGH_SPEED,
 152 };
 153
 154 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 155 #define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake)    \
 156 {                                                               \
 157         .gpio           = gpio_num,                             \
 158         .type           = EV_KEY,                               \
 159         .code           = ev_code,                              \
 160         .active_low     = act_low,                              \
 161         .desc           = "btn " descr,                         \
 162         .wakeup         = wake,                                 \
 163 }
 164
 165 static struct gpio_keys_button ard_buttons[] = {
 166         GPIO_BUTTON(SABREAUTO_ANDROID_HOME,    KEY_HOME,       1, "home",        0),
 167         GPIO_BUTTON(SABREAUTO_ANDROID_BACK,    KEY_BACK,       1, "back",        0),
 168         GPIO_BUTTON(SABREAUTO_ANDROID_MENU,    KEY_MENU,       1, "menu",        0),
 169         GPIO_BUTTON(SABREAUTO_ANDROID_VOLUP,   KEY_VOLUMEUP,   1, "volume-up",   0),
 170         GPIO_BUTTON(SABREAUTO_ANDROID_VOLDOWN, KEY_VOLUMEDOWN, 1, "volume-down", 0),
 171 };
 172
 173 static struct gpio_keys_platform_data ard_android_button_data = {
 174         .buttons        = ard_buttons,
 175         .nbuttons       = ARRAY_SIZE(ard_buttons),
 176 };
 177
 178 static struct platform_device ard_android_button_device = {
 179         .name           = "gpio-keys",
 180         .id             = -1,
 181         .num_resources  = 0,
 182         .dev            = {
 183                 .platform_data = &ard_android_button_data,
 184         }
 185 };
 186
 187 static void __init imx6q_add_android_device_buttons(void)
 188 {
 189         platform_device_register(&ard_android_button_device);
 190 }
 191 #else
 192 static void __init imx6q_add_android_device_buttons(void) {}
 193 #endif
 194
 195 static int plt_sd3_pad_change(int clock)
 196 {
 197         static enum sd_pad_mode pad_mode = SD_PAD_MODE_LOW_SPEED;
 198
 199         iomux_v3_cfg_t *sd3_pads_200mhz = NULL;
 200         iomux_v3_cfg_t *sd3_pads_100mhz = NULL;
 201         iomux_v3_cfg_t *sd3_pads_50mhz = NULL;
 202
 203         u32 sd3_pads_200mhz_cnt;
 204         u32 sd3_pads_100mhz_cnt;
 205         u32 sd3_pads_50mhz_cnt;
 206
 207         if (cpu_is_mx6q()) {
 208                 sd3_pads_200mhz = mx6q_sd3_200mhz;
 209                 sd3_pads_100mhz = mx6q_sd3_100mhz;
 210                 sd3_pads_50mhz = mx6q_sd3_50mhz;
 211
 212                 sd3_pads_200mhz_cnt = ARRAY_SIZE(mx6q_sd3_200mhz);
 213                 sd3_pads_100mhz_cnt = ARRAY_SIZE(mx6q_sd3_100mhz);
 214                 sd3_pads_50mhz_cnt = ARRAY_SIZE(mx6q_sd3_50mhz);
 215         } else if (cpu_is_mx6dl()) {
 216                 sd3_pads_200mhz = mx6dl_sd3_200mhz;
 217                 sd3_pads_100mhz = mx6dl_sd3_100mhz;
 218                 sd3_pads_50mhz = mx6dl_sd3_50mhz;
 219
 220                 sd3_pads_200mhz_cnt = ARRAY_SIZE(mx6dl_sd3_200mhz);
 221                 sd3_pads_100mhz_cnt = ARRAY_SIZE(mx6dl_sd3_100mhz);
 222                 sd3_pads_50mhz_cnt = ARRAY_SIZE(mx6dl_sd3_50mhz);
 223         }
 224
 225         if (clock > 100000000) {
 226                 if (pad_mode == SD_PAD_MODE_HIGH_SPEED)
 227                         return 0;
 228                 BUG_ON(!sd3_pads_200mhz);
 229                 pad_mode = SD_PAD_MODE_HIGH_SPEED;
 230                 return mxc_iomux_v3_setup_multiple_pads(sd3_pads_200mhz,
 231                                                         sd3_pads_200mhz_cnt);
 232         } else if (clock > 52000000) {
 233                 if (pad_mode == SD_PAD_MODE_MED_SPEED)
 234                         return 0;
 235                 BUG_ON(!sd3_pads_100mhz);
 236                 pad_mode = SD_PAD_MODE_MED_SPEED;
 237                 return mxc_iomux_v3_setup_multiple_pads(sd3_pads_100mhz,
 238                                                         sd3_pads_100mhz_cnt);
 239         } else {
 240                 if (pad_mode == SD_PAD_MODE_LOW_SPEED)
 241                         return 0;
 242                 BUG_ON(!sd3_pads_50mhz);
 243                 pad_mode = SD_PAD_MODE_LOW_SPEED;
 244                 return mxc_iomux_v3_setup_multiple_pads(sd3_pads_50mhz,
 245                                                         sd3_pads_50mhz_cnt);
 246         }
 247 }
 248
 249 static const struct esdhc_platform_data mx6q_sabreauto_sd3_data __initconst = {
 250         .cd_gpio                = SABREAUTO_SD3_CD,
 251         .wp_gpio                = SABREAUTO_SD3_WP,
 252         .support_18v            = 1,
 253         .support_8bit           = 1,
 254         .delay_line             = 0,
 255         .platform_pad_change    = plt_sd3_pad_change,
 256 };
 257
 258 static const struct esdhc_platform_data mx6q_sabreauto_sd1_data __initconst = {
 259         .cd_gpio = SABREAUTO_SD1_CD,
 260         .wp_gpio = SABREAUTO_SD1_WP,
 261 };
 262
 263
 264 static int __init gpmi_nand_platform_init(void)
 265 {
 266         iomux_v3_cfg_t *nand_pads = NULL;
 267         u32 nand_pads_cnt;
 268
 269         if (cpu_is_mx6q()) {
 270                 nand_pads = mx6q_gpmi_nand;
 271                 nand_pads_cnt = ARRAY_SIZE(mx6q_gpmi_nand);
 272         } else if (cpu_is_mx6dl()) {
 273                 nand_pads = mx6dl_gpmi_nand;
 274                 nand_pads_cnt = ARRAY_SIZE(mx6dl_gpmi_nand);
 275
 276         }
 277         BUG_ON(!nand_pads);
 278         return mxc_iomux_v3_setup_multiple_pads(nand_pads, nand_pads_cnt);
 279 }
 280
 281 static const struct gpmi_nand_platform_data
 282 mx6q_gpmi_nand_platform_data __initconst = {
 283         .platform_init           = gpmi_nand_platform_init,
 284         .min_prop_delay_in_ns    = 5,
 285         .max_prop_delay_in_ns    = 9,
 286         .max_chip_count          = 1,
 287 };
 288
 289 static const struct anatop_thermal_platform_data
 290 mx6q_sabreauto_anatop_thermal_data __initconst = {
 291         .name = "anatop_thermal",
 292 };
 293
 294 static inline void mx6q_sabreauto_init_uart(void)
 295 {
 296         imx6q_add_imx_uart(0, NULL);
 297         imx6q_add_imx_uart(1, NULL);
 298         imx6q_add_imx_uart(3, NULL);
 299 }
 300
 301 static int mx6q_sabreauto_fec_phy_init(struct phy_device *phydev)
 302 {
 303         unsigned short val;
 304
 305         if (!board_is_mx6_reva()) {
 306                 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */
 307                 phy_write(phydev, 0xd, 0x7);
 308                 phy_write(phydev, 0xe, 0x8016);
 309                 phy_write(phydev, 0xd, 0x4007);
 310                 val = phy_read(phydev, 0xe);
 311
 312                 val &= 0xffe3;
 313                 val |= 0x18;
 314                 phy_write(phydev, 0xe, val);
 315
 316                 /* Introduce tx clock delay */
 317                 phy_write(phydev, 0x1d, 0x5);
 318                 val = phy_read(phydev, 0x1e);
 319                 val |= 0x0100;
 320                 phy_write(phydev, 0x1e, val);
 321
 322                 /*check phy power*/
 323                 val = phy_read(phydev, 0x0);
 324
 325                 if (val & BMCR_PDOWN)
 326                         phy_write(phydev, 0x0, (val & ~BMCR_PDOWN));
 327         } else {
 328                 /* prefer master mode, 1000 Base-T capable */
 329                 phy_write(phydev, 0x9, 0x0f00);
 330
 331                 /* min rx data delay */
 332                 phy_write(phydev, 0x0b, 0x8105);
 333                 phy_write(phydev, 0x0c, 0x0000);
 334
 335                 /* max rx/tx clock delay, min rx/tx control delay */
 336                 phy_write(phydev, 0x0b, 0x8104);
 337                 phy_write(phydev, 0x0c, 0xf0f0);
 338                 phy_write(phydev, 0x0b, 0x104);
 339         }
 340
 341         return 0;
 342 }
 343
 344 static int mx6q_sabreauto_fec_power_hibernate(struct phy_device *phydev)
 345 {
 346         return 0;
 347 }
 348
 349 static struct fec_platform_data fec_data __initdata = {
 350         .init                   = mx6q_sabreauto_fec_phy_init,
 351         .power_hibernate        = mx6q_sabreauto_fec_power_hibernate,
 352         .phy                    = PHY_INTERFACE_MODE_RGMII,
 353 };
 354
 355 static int mx6q_sabreauto_spi_cs[] = {
 356         SABREAUTO_ECSPI1_CS1,
 357 };
 358
 359 static const struct spi_imx_master mx6q_sabreauto_spi_data __initconst = {
 360         .chipselect     = mx6q_sabreauto_spi_cs,
 361         .num_chipselect = ARRAY_SIZE(mx6q_sabreauto_spi_cs),
 362 };
 363
 364 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 365 static struct mtd_partition m25p32_partitions[] = {
 366         {
 367                 .name   = "bootloader",
 368                 .offset = 0,
 369                 .size   = 0x00040000,
 370         }, {
 371                 .name   = "kernel",
 372                 .offset = MTDPART_OFS_APPEND,
 373                 .size   = MTDPART_SIZ_FULL,
 374         },
 375 };
 376
 377 static struct flash_platform_data m25p32_spi_flash_data = {
 378         .name           = "m25p32",
 379         .parts          = m25p32_partitions,
 380         .nr_parts       = ARRAY_SIZE(m25p32_partitions),
 381         .type           = "m25p32",
 382 };
 383
 384 static struct spi_board_info m25p32_spi0_board_info[] __initdata = {
 385 #if defined(CONFIG_MTD_M25P80)
 386         {
 387                 /* The modalias must be the same as spi device driver name */
 388                 .modalias       = "m25p80",
 389                 .max_speed_hz   = 20000000,
 390                 .bus_num        = 0,
 391                 .chip_select    = 0,
 392                 .platform_data  = &m25p32_spi_flash_data,
 393         },
 394 #endif
 395 };
 396 static void spi_device_init(void)
 397 {
 398         spi_register_board_info(m25p32_spi0_board_info,
 399                                 ARRAY_SIZE(m25p32_spi0_board_info));
 400 }
 401 #else
 402 static struct mtd_partition mxc_nor_partitions[] = {
 403         {
 404                 .name   = "Bootloader",
 405                 .offset = 0,
 406                 .size   =  0x00080000,
 407         }, {
 408                 .name   = "nor.Kernel",
 409                 .offset = MTDPART_OFS_APPEND,
 410                 .size   = MTDPART_SIZ_FULL,
 411         },
 412 };
 413 static struct resource nor_flash_resource = {
 414         .start          = CS0_BASE_ADDR,
 415         .end            = CS0_BASE_ADDR  +  0x02000000 - 1,
 416         .flags          = IORESOURCE_MEM,
 417 };
 418
 419 static struct physmap_flash_data nor_flash_data = {
 420         .probe_type     = "cfi_probe",
 421         .width          = 2,
 422         .parts          = mxc_nor_partitions,
 423         .nr_parts       = ARRAY_SIZE(mxc_nor_partitions),
 424 };
 425
 426 static struct platform_device physmap_flash_device = {
 427         .name   = "physmap-flash",
 428         .id     = 0,
 429         .dev    = {
 430                 .platform_data = &nor_flash_data,
 431         },
 432         .resource       = &nor_flash_resource,
 433         .num_resources  = 1,
 434 };
 435
 436 static void mx6q_setup_weimcs(void)
 437 {
 438         unsigned int reg;
 439         void __iomem *nor_reg = MX6_IO_ADDRESS(WEIM_BASE_ADDR);
 440         void __iomem *ccm_reg = MX6_IO_ADDRESS(CCM_BASE_ADDR);
 441
 442         /*CCM_BASE_ADDR + CLKCTL_CCGR6*/
 443         reg = readl(ccm_reg + 0x80);
 444         reg |= 0x00000C00;
 445         writel(reg, ccm_reg + 0x80);
 446
 447         __raw_writel(0x00620081, nor_reg);
 448         __raw_writel(0x1C022000, nor_reg + 0x00000008);
 449         __raw_writel(0x0804a240, nor_reg + 0x00000010);
 450 }
 451 #endif
 452
 453 static int max7310_1_setup(struct i2c_client *client,
 454         unsigned gpio_base, unsigned ngpio,
 455         void *context)
 456 {
 457         /* 0 BACKLITE_ON */
 458         /* 1 SAT_SHUTDN_B */
 459         /* 2 CPU_PER_RST_B */
 460         /* 3 MAIN_PER_RST_B */
 461         /* 4 IPOD_RST_B */
 462         /* 5 MLB_RST_B */
 463         /* 6 SSI_STEERING */
 464         /* 7 GPS_RST_B */
 465
 466         int max7310_gpio_value[] = {
 467                 0, 1, 1, 1, 0, 0, 0, 0,
 468         };
 469
 470         int n;
 471
 472          for (n = 0; n < ARRAY_SIZE(max7310_gpio_value); ++n) {
 473                 gpio_request(gpio_base + n, "MAX7310 1 GPIO Expander");
 474                 if (max7310_gpio_value[n] < 0)
 475                         gpio_direction_input(gpio_base + n);
 476                 else
 477                         gpio_direction_output(gpio_base + n,
 478                                                 max7310_gpio_value[n]);
 479                 gpio_export(gpio_base + n, 0);
 480         }
 481
 482         return 0;
 483 }
 484
 485 static struct pca953x_platform_data max7310_platdata = {
 486         .gpio_base      = SABREAUTO_MAX7310_1_BASE_ADDR,
 487         .invert         = 0,
 488         .setup          = max7310_1_setup,
 489 };
 490
 491 static int max7310_u39_setup(struct i2c_client *client,
 492         unsigned gpio_base, unsigned ngpio,
 493         void *context)
 494 {
 495         /* 0 not use  */
 496         /* 1 GPS_PWREN */
 497         /* 2 VIDEO_ADC_PWRDN_B */
 498         /* 3 ENET_CAN1_STEER */
 499         /* 4 EIMD30_BTUART3_STEER */
 500         /* 5 CAN_STBY */
 501         /* 6 CAN_EN */
 502         /* 7 USB_H1_PWR */
 503
 504         int max7310_gpio_value[] = {
 505                 0, 1, 0, 0, 0, 1, 1, 1,
 506         };
 507
 508         int n;
 509
 510          for (n = 0; n < ARRAY_SIZE(max7310_gpio_value); ++n) {
 511                 gpio_request(gpio_base + n, "MAX7310 U39 GPIO Expander");
 512                 if (max7310_gpio_value[n] < 0)
 513                         gpio_direction_input(gpio_base + n);
 514                 else
 515                         gpio_direction_output(gpio_base + n,
 516                                                 max7310_gpio_value[n]);
 517                 gpio_export(gpio_base + n, 0);
 518         }
 519
 520         return 0;
 521 }
 522
 523 static int max7310_u43_setup(struct i2c_client *client,
 524         unsigned gpio_base, unsigned ngpio,
 525         void *context)
 526 {
 527         /*0 PORT_EXP_C0*/
 528         /*1 USB_OTG_PWR_ON  */
 529         /*2 SAT_RST_B*/
 530         /*3 NAND_BT_WIFI_STEER*/
 531
 532         int max7310_gpio_value[] = {
 533                 0, 0, 0, 0, 0, 0, 0, 0,
 534         };
 535
 536         int n;
 537
 538         for (n = 0; n < ARRAY_SIZE(max7310_gpio_value); ++n) {
 539                 gpio_request(gpio_base + n, "MAX7310 U43 GPIO Expander");
 540                 if (max7310_gpio_value[n] < 0)
 541                         gpio_direction_input(gpio_base + n);
 542                 else
 543                         gpio_direction_output(gpio_base + n,
 544                                                 max7310_gpio_value[n]);
 545                 gpio_export(gpio_base + n, 0);
 546         }
 547
 548         return 0;
 549 }
 550
 551 static struct pca953x_platform_data max7310_u39_platdata = {
 552         .gpio_base      = SABREAUTO_MAX7310_2_BASE_ADDR,
 553         .invert         = 0,
 554         .setup          = max7310_u39_setup,
 555 };
 556
 557 static struct pca953x_platform_data max7310_u43_platdata = {
 558         .gpio_base      = SABREAUTO_MAX7310_3_BASE_ADDR,
 559         .invert         = 0,
 560         .setup          = max7310_u43_setup,
 561 };
 562
 563 static struct fsl_mxc_camera_platform_data camera_data = {
 564         .analog_regulator       = "DA9052_LDO7",
 565         .core_regulator         = "DA9052_LDO9",
 566         .mclk                   = 24000000,
 567         .csi                    = 0,
 568 };
 569
 570 static struct fsl_mxc_camera_platform_data ov5640_mipi_data = {
 571         .mclk   = 24000000,
 572         .csi    = 0,
 573 };
 574
 575 static void adv7180_pwdn(int pwdn)
 576 {
 577         int status = -1;
 578
 579         status = gpio_request(SABREAUTO_VIDEOIN_PWR, "tvin-pwr");
 580
 581         if (pwdn)
 582                 gpio_direction_output(SABREAUTO_VIDEOIN_PWR, 0);
 583         else
 584                 gpio_direction_output(SABREAUTO_VIDEOIN_PWR, 1);
 585
 586         gpio_free(SABREAUTO_VIDEOIN_PWR);
 587 }
 588
 589 static struct fsl_mxc_tvin_platform_data adv7180_data = {
 590         .dvddio_reg     = NULL,
 591         .dvdd_reg       = NULL,
 592         .avdd_reg       = NULL,
 593         .pvdd_reg       = NULL,
 594         .pwdn           = adv7180_pwdn,
 595         .reset          = NULL,
 596         .cvbs           = true,
 597 };
 598
 599 static struct imxi2c_platform_data mx6q_sabreauto_i2c2_data = {
 600         .bitrate        = 400000,
 601 };
 602
 603 static struct imxi2c_platform_data mx6q_sabreauto_i2c1_data = {
 604         .bitrate        = 100000,
 605 };
 606
 607 static struct mxc_audio_codec_platform_data cs42888_data = {
 608         .rates = (
 609                         SNDRV_PCM_RATE_48000 |
 610                         SNDRV_PCM_RATE_96000 |
 611                         SNDRV_PCM_RATE_192000),
 612 };
 613
 614 static struct fsl_mxc_lightsensor_platform_data ls_data = {
 615         .rext = 499,
 616 };
 617
 618 static struct i2c_board_info mxc_i2c2_board_info[] __initdata = {
 619         {
 620                 I2C_BOARD_INFO("max7310", 0x30),
 621                 .platform_data = &max7310_platdata,
 622         }, {
 623                 I2C_BOARD_INFO("max7310", 0x32),
 624                 .platform_data = &max7310_u39_platdata,
 625         }, {
 626                 I2C_BOARD_INFO("max7310", 0x34),
 627                 .platform_data = &max7310_u43_platdata,
 628         }, {
 629                 I2C_BOARD_INFO("adv7180", 0x21),
 630                 .platform_data = (void *)&adv7180_data,
 631         }, {
 632                 I2C_BOARD_INFO("ov3640", 0x3c),
 633                 .platform_data = (void *)&camera_data,
 634         },
 635         {
 636                 I2C_BOARD_INFO("isl29023", 0x44),
 637                 .irq  = gpio_to_irq(SABREAUTO_ALS_INT),
 638                 .platform_data = &ls_data,
 639         },
 640         {
 641                 I2C_BOARD_INFO("mma8451", 0x1c),
 642                 .platform_data = (void *)&mma8451_position,
 643         },
 644 };
 645
 646 static struct i2c_board_info mxc_i2c1_board_info[] __initdata = {
 647         {
 648                 I2C_BOARD_INFO("egalax_ts", 0x04),
 649                 .irq = gpio_to_irq(SABREAUTO_CAP_TCH_INT),
 650         }, {
 651                 I2C_BOARD_INFO("mxc_hdmi_i2c", 0x50),
 652         }, {
 653                 I2C_BOARD_INFO("ov5640_mipi", 0x3c),
 654                 .platform_data = (void *)&ov5640_mipi_data,
 655         }, {
 656                 I2C_BOARD_INFO("cs42888", 0x48),
 657                 .platform_data = (void *)&cs42888_data,
 658         },
 659 };
 660
 661 static void imx6q_sabreauto_usbotg_vbus(bool on)
 662 {
 663         if (on)
 664                 gpio_set_value_cansleep(SABREAUTO_USB_OTG_PWR, 1);
 665         else
 666                 gpio_set_value_cansleep(SABREAUTO_USB_OTG_PWR, 0);
 667 }
 668
 669 static void imx6q_sabreauto_usbhost1_vbus(bool on)
 670 {
 671         if (on)
 672                 gpio_set_value_cansleep(SABREAUTO_USB_HOST1_PWR, 1);
 673         else
 674                 gpio_set_value_cansleep(SABREAUTO_USB_HOST1_PWR, 0);
 675 }
 676
 677 static void __init imx6q_sabreauto_init_usb(void)
 678 {
 679         int ret = 0;
 680         imx_otg_base = MX6_IO_ADDRESS(MX6Q_USB_OTG_BASE_ADDR);
 681
 682         ret = gpio_request(SABREAUTO_USB_OTG_OC, "otg-oc");
 683         if (ret) {
 684                 printk(KERN_ERR"failed to get GPIO SABREAUTO_USB_OTG_OC:"
 685                         " %d\n", ret);
 686                 return;
 687         }
 688         gpio_direction_input(SABREAUTO_USB_OTG_OC);
 689
 690         ret = gpio_request(SABREAUTO_USB_HOST1_OC, "usbh1-oc");
 691         if (ret) {
 692                 printk(KERN_ERR"failed to get SABREAUTO_USB_HOST1_OC:"
 693                         " %d\n", ret);
 694                 return;
 695         }
 696         gpio_direction_input(SABREAUTO_USB_HOST1_OC);
 697
 698         mxc_iomux_set_gpr_register(1, 13, 1, 0);
 699         mx6_set_otghost_vbus_func(imx6q_sabreauto_usbotg_vbus);
 700         mx6_usb_dr_init();
 701         mx6_set_host1_vbus_func(imx6q_sabreauto_usbhost1_vbus);
 702         mx6_usb_h1_init();
 703 #ifdef CONFIG_USB_EHCI_ARC_HSIC
 704         mx6_usb_h2_init();
 705         mx6_usb_h3_init();
 706 #endif
 707 }
 708
 709 static struct viv_gpu_platform_data imx6q_gpu_pdata __initdata = {
 710         .reserved_mem_size = SZ_128M,
 711 };
 712
 713 /* HW Initialization, if return 0, initialization is successful. */
 714 static int mx6q_sabreauto_sata_init(struct device *dev, void __iomem *addr)
 715 {
 716         u32 tmpdata;
 717         int ret = 0;
 718         struct clk *clk;
 719
 720         sata_clk = clk_get(dev, "imx_sata_clk");
 721         if (IS_ERR(sata_clk)) {
 722                 dev_err(dev, "no sata clock.\n");
 723                 return PTR_ERR(sata_clk);
 724         }
 725         ret = clk_enable(sata_clk);
 726         if (ret) {
 727                 dev_err(dev, "can't enable sata clock.\n");
 728                 goto put_sata_clk;
 729         }
 730
 731         /* Set PHY Paremeters, two steps to configure the GPR13,
 732          * one write for rest of parameters, mask of first write is 0x07FFFFFD,
 733          * and the other one write for setting the mpll_clk_off_b
 734          *.rx_eq_val_0(iomuxc_gpr13[26:24]),
 735          *.los_lvl(iomuxc_gpr13[23:19]),
 736          *.rx_dpll_mode_0(iomuxc_gpr13[18:16]),
 737          *.sata_speed(iomuxc_gpr13[15]),
 738          *.mpll_ss_en(iomuxc_gpr13[14]),
 739          *.tx_atten_0(iomuxc_gpr13[13:11]),
 740          *.tx_boost_0(iomuxc_gpr13[10:7]),
 741          *.tx_lvl(iomuxc_gpr13[6:2]),
 742          *.mpll_ck_off(iomuxc_gpr13[1]),
 743          *.tx_edgerate_0(iomuxc_gpr13[0]),
 744          */
 745         tmpdata = readl(IOMUXC_GPR13);
 746         writel(((tmpdata & ~0x07FFFFFD) | 0x0593A044), IOMUXC_GPR13);
 747
 748         /* enable SATA_PHY PLL */
 749         tmpdata = readl(IOMUXC_GPR13);
 750         writel(((tmpdata & ~0x2) | 0x2), IOMUXC_GPR13);
 751
 752         /* Get the AHB clock rate, and configure the TIMER1MS reg later */
 753         clk = clk_get(NULL, "ahb");
 754         if (IS_ERR(clk)) {
 755                 dev_err(dev, "no ahb clock.\n");
 756                 ret = PTR_ERR(clk);
 757                 goto release_sata_clk;
 758         }
 759         tmpdata = clk_get_rate(clk) / 1000;
 760         clk_put(clk);
 761
 762         ret = sata_init(addr, tmpdata);
 763         if (ret == 0)
 764                 return ret;
 765
 766 release_sata_clk:
 767         clk_disable(sata_clk);
 768 put_sata_clk:
 769         clk_put(sata_clk);
 770
 771         return ret;
 772 }
 773
 774 static void mx6q_sabreauto_sata_exit(struct device *dev)
 775 {
 776         clk_disable(sata_clk);
 777         clk_put(sata_clk);
 778
 779 }
 780
 781 static struct ahci_platform_data mx6q_sabreauto_sata_data = {
 782         .init = mx6q_sabreauto_sata_init,
 783         .exit = mx6q_sabreauto_sata_exit,
 784 };
 785
 786 static struct imx_asrc_platform_data imx_asrc_data = {
 787         .channel_bits   = 4,
 788         .clk_map_ver    = 2,
 789 };
 790
 791 static void mx6q_sabreauto_reset_mipi_dsi(void)
 792 {
 793         gpio_set_value(SABREAUTO_DISP0_PWR, 1);
 794         gpio_set_value(SABREAUTO_DISP0_RESET, 1);
 795         udelay(10);
 796         gpio_set_value(SABREAUTO_DISP0_RESET, 0);
 797         udelay(50);
 798         gpio_set_value(SABREAUTO_DISP0_RESET, 1);
 799
 800         /*
 801          * it needs to delay 120ms minimum for reset complete
 802          */
 803         msleep(120);
 804 }
 805
 806 static struct mipi_dsi_platform_data mipi_dsi_pdata = {
 807         .ipu_id         = 0,
 808         .disp_id        = 0,
 809         .lcd_panel      = "TRULY-WVGA",
 810         .reset          = mx6q_sabreauto_reset_mipi_dsi,
 811 };
 812
 813 static struct ipuv3_fb_platform_data sabr_fb_data[] = {
 814         { /*fb0*/
 815                 .disp_dev               = "ldb",
 816                 .interface_pix_fmt      = IPU_PIX_FMT_RGB666,
 817                 .mode_str               = "LDB-XGA",
 818                 .default_bpp            = 16,
 819                 .int_clk                = false,
 820         }, {
 821                 .disp_dev               = "ldb",
 822                 .interface_pix_fmt      = IPU_PIX_FMT_RGB666,
 823                 .mode_str               = "LDB-XGA",
 824                 .default_bpp            = 16,
 825                 .int_clk                = false,
 826         }, {
 827                 .disp_dev               = "lcd",
 828                 .interface_pix_fmt      = IPU_PIX_FMT_RGB565,
 829                 .mode_str               = "CLAA-WVGA",
 830                 .default_bpp            = 16,
 831                 .int_clk                = false,
 832         },
 833 };
 834
 835 static void hdmi_init(int ipu_id, int disp_id)
 836 {
 837         int hdmi_mux_setting;
 838
 839         if ((ipu_id > 1) || (ipu_id < 0)) {
 840                 printk(KERN_ERR"Invalid IPU select for HDMI: %d. Set to 0\n",
 841                         ipu_id);
 842                 ipu_id = 0;
 843         }
 844
 845         if ((disp_id > 1) || (disp_id < 0)) {
 846                 printk(KERN_ERR"Invalid DI select for HDMI: %d. Set to 0\n",
 847                         disp_id);
 848                 disp_id = 0;
 849         }
 850
 851         /* Configure the connection between IPU1/2 and HDMI */
 852         hdmi_mux_setting = 2*ipu_id + disp_id;
 853
 854         /* GPR3, bits 2-3 = HDMI_MUX_CTL */
 855         mxc_iomux_set_gpr_register(3, 2, 2, hdmi_mux_setting);
 856 }
 857
 858 static struct fsl_mxc_hdmi_platform_data hdmi_data = {
 859         .init = hdmi_init,
 860 };
 861
 862 static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {
 863         .ipu_id         = 0,
 864         .disp_id        = 0,
 865 };
 866
 867 static struct fsl_mxc_lcd_platform_data lcdif_data = {
 868         .ipu_id         = 0,
 869         .disp_id        = 0,
 870         .default_ifmt   = IPU_PIX_FMT_RGB565,
 871 };
 872
 873 static struct fsl_mxc_ldb_platform_data ldb_data = {
 874         .ipu_id         = 1,
 875         .disp_id        = 0,
 876         .ext_ref        = 1,
 877         .mode           = LDB_SEP0,
 878         .sec_ipu_id     = 1,
 879         .sec_disp_id    = 1,
 880 };
 881
 882 static struct imx_ipuv3_platform_data ipu_data[] = {
 883         {
 884                 .rev            = 4,
 885                 .csi_clk[0]     = "ccm_clk0",
 886         }, {
 887                 .rev            = 4,
 888                 .csi_clk[0]     = "ccm_clk0",
 889         },
 890 };
 891
 892 /* Backlight PWM for CPU board lvds*/
 893 static struct platform_pwm_backlight_data mx6_arm2_pwm_backlight_data3 = {
 894         .pwm_id                 = 2,
 895         .max_brightness         = 255,
 896         .dft_brightness         = 128,
 897         .pwm_period_ns          = 50000,
 898 };
 899
 900 /* Backlight PWM for Main board lvds*/
 901 static struct platform_pwm_backlight_data mx6_arm2_pwm_backlight_data4 = {
 902         .pwm_id                 = 3,
 903         .max_brightness         = 255,
 904         .dft_brightness         = 128,
 905         .pwm_period_ns          = 50000,
 906 };
 907 static int flexcan0_en;
 908 static int flexcan1_en;
 909
 910 static void mx6q_flexcan_switch(void)
 911 {
 912   if (flexcan0_en || flexcan1_en) {
 913         gpio_set_value_cansleep(SABREAUTO_CAN_EN, 1);
 914         gpio_set_value_cansleep(SABREAUTO_CAN_STBY, 1);
 915         /* Enable STEER pin if CAN1 interface is required.
 916          * STEER pin is used to switch between ENET_MDC
 917          * and CAN1_TX functionality. By default ENET_MDC
 918          * is active after reset.
 919          */
 920         if (flexcan0_en)
 921                 gpio_set_value_cansleep(SABREAUTO_CAN1_STEER, 1);
 922
 923   } else {
 924     /* avoid to disable CAN xcvr if any of the CAN interfaces
 925     * are down. XCRV will be disabled only if both CAN2
 926     * interfaces are DOWN.
 927     */
 928     if (!flexcan0_en && !flexcan1_en) {
 929         gpio_set_value_cansleep(SABREAUTO_CAN_EN, 0);
 930         gpio_set_value_cansleep(SABREAUTO_CAN_STBY, 0);
 931     }
 932     /* turn down STEER pin only if CAN1 is DOWN */
 933     if (!flexcan0_en)
 934         gpio_set_value_cansleep(SABREAUTO_CAN1_STEER, 0);
 935
 936   }
 937 }
 938 static void mx6q_flexcan0_switch(int enable)
 939 {
 940     flexcan0_en = enable;
 941     mx6q_flexcan_switch();
 942 }
 943
 944 static void mx6q_flexcan1_switch(int enable)
 945 {
 946     flexcan1_en = enable;
 947     mx6q_flexcan_switch();
 948 }
 949
 950 static const struct flexcan_platform_data
 951                 mx6q_sabreauto_flexcan_pdata[] __initconst = {
 952         {
 953                 .transceiver_switch = mx6q_flexcan0_switch,
 954         }, {
 955                 .transceiver_switch = mx6q_flexcan1_switch,
 956         }
 957 };
 958
 959 static struct mipi_csi2_platform_data mipi_csi2_pdata = {
 960         .ipu_id         = 0,
 961         .csi_id         = 0,
 962         .v_channel      = 0,
 963         .lanes          = 2,
 964         .dphy_clk       = "mipi_pllref_clk",
 965         .pixel_clk      = "emi_clk",
 966 };
 967
 968 static void sabreauto_suspend_enter(void)
 969 {
 970         /* suspend preparation */
 971 }
 972
 973 static void sabreauto_suspend_exit(void)
 974 {
 975         /* resmue resore */
 976 }
 977 static const struct pm_platform_data mx6q_sabreauto_pm_data __initconst = {
 978         .name           = "imx_pm",
 979         .suspend_enter  = sabreauto_suspend_enter,
 980         .suspend_exit   = sabreauto_suspend_exit,
 981 };
 982
 983 static struct mxc_audio_platform_data sab_audio_data = {
 984         .sysclk         = 24576000,
 985         .codec_name     = "cs42888.1-0048",
 986 };
 987
 988 static struct platform_device sab_audio_device = {
 989         .name           = "imx-cs42888",
 990 };
 991
 992 static struct imx_esai_platform_data sab_esai_pdata = {
 993         .flags          = IMX_ESAI_NET,
 994 };
 995
 996 static struct regulator_consumer_supply sabreauto_vmmc_consumers[] = {
 997         REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"),
 998         REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.2"),
 999         REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.3"),
1000 };
1001
1002 static struct regulator_init_data sabreauto_vmmc_init = {
1003         .num_consumer_supplies = ARRAY_SIZE(sabreauto_vmmc_consumers),
1004         .consumer_supplies = sabreauto_vmmc_consumers,
1005 };
1006
1007 static struct fixed_voltage_config sabreauto_vmmc_reg_config = {
1008         .supply_name    = "vmmc",
1009         .microvolts     = 3300000,
1010         .gpio           = -1,
1011         .init_data      = &sabreauto_vmmc_init,
1012 };
1013
1014 static struct platform_device sabreauto_vmmc_reg_devices = {
1015         .name           = "reg-fixed-voltage",
1016         .id             = 0,
1017         .dev            = {
1018                                 .platform_data = &sabreauto_vmmc_reg_config,
1019         },
1020 };
1021
1022 static struct regulator_consumer_supply cs42888_sabreauto_consumer_va = {
1023         .supply         = "VA",
1024         .dev_name       = "1-0048",
1025 };
1026
1027 static struct regulator_consumer_supply cs42888_sabreauto_consumer_vd = {
1028         .supply         = "VD",
1029         .dev_name       = "1-0048",
1030 };
1031
1032 static struct regulator_consumer_supply cs42888_sabreauto_consumer_vls = {
1033         .supply         = "VLS",
1034         .dev_name       = "1-0048",
1035 };
1036
1037 static struct regulator_consumer_supply cs42888_sabreauto_consumer_vlc = {
1038         .supply         = "VLC",
1039         .dev_name       = "1-0048",
1040 };
1041
1042 static struct regulator_init_data cs42888_sabreauto_va_reg_initdata = {
1043         .num_consumer_supplies  = 1,
1044         .consumer_supplies      = &cs42888_sabreauto_consumer_va,
1045 };
1046
1047 static struct regulator_init_data cs42888_sabreauto_vd_reg_initdata = {
1048         .num_consumer_supplies  = 1,
1049         .consumer_supplies      = &cs42888_sabreauto_consumer_vd,
1050 };
1051
1052 static struct regulator_init_data cs42888_sabreauto_vls_reg_initdata = {
1053         .num_consumer_supplies  = 1,
1054         .consumer_supplies      = &cs42888_sabreauto_consumer_vls,
1055 };
1056
1057 static struct regulator_init_data cs42888_sabreauto_vlc_reg_initdata = {
1058         .num_consumer_supplies  = 1,
1059         .consumer_supplies      = &cs42888_sabreauto_consumer_vlc,
1060 };
1061
1062 static struct fixed_voltage_config cs42888_sabreauto_va_reg_config = {
1063         .supply_name            = "VA",
1064         .microvolts             = 2800000,
1065         .gpio                   = -1,
1066         .init_data              = &cs42888_sabreauto_va_reg_initdata,
1067 };
1068
1069 static struct fixed_voltage_config cs42888_sabreauto_vd_reg_config = {
1070         .supply_name            = "VD",
1071         .microvolts             = 2800000,
1072         .gpio                   = -1,
1073         .init_data              = &cs42888_sabreauto_vd_reg_initdata,
1074 };
1075
1076 static struct fixed_voltage_config cs42888_sabreauto_vls_reg_config = {
1077         .supply_name            = "VLS",
1078         .microvolts             = 2800000,
1079         .gpio                   = -1,
1080         .init_data              = &cs42888_sabreauto_vls_reg_initdata,
1081 };
1082
1083 static struct fixed_voltage_config cs42888_sabreauto_vlc_reg_config = {
1084         .supply_name            = "VLC",
1085         .microvolts             = 2800000,
1086         .gpio                   = -1,
1087         .init_data              = &cs42888_sabreauto_vlc_reg_initdata,
1088 };
1089
1090 static struct platform_device cs42888_sabreauto_va_reg_devices = {
1091         .name   = "reg-fixed-voltage",
1092         .id     = 3,
1093         .dev    = {
1094                 .platform_data = &cs42888_sabreauto_va_reg_config,
1095         },
1096 };
1097
1098 static struct platform_device cs42888_sabreauto_vd_reg_devices = {
1099         .name   = "reg-fixed-voltage",
1100         .id     = 4,
1101         .dev    = {
1102                 .platform_data = &cs42888_sabreauto_vd_reg_config,
1103         },
1104 };
1105
1106 static struct platform_device cs42888_sabreauto_vls_reg_devices = {
1107         .name   = "reg-fixed-voltage",
1108         .id     = 5,
1109         .dev    = {
1110                 .platform_data = &cs42888_sabreauto_vls_reg_config,
1111         },
1112 };
1113
1114 static struct platform_device cs42888_sabreauto_vlc_reg_devices = {
1115         .name   = "reg-fixed-voltage",
1116         .id     = 6,
1117         .dev    = {
1118                 .platform_data = &cs42888_sabreauto_vlc_reg_config,
1119         },
1120 };
1121
1122 static int __init imx6q_init_audio(void)
1123 {
1124         struct clk *pll4_clk, *esai_clk, *anaclk_2;
1125
1126         mxc_register_device(&sab_audio_device, &sab_audio_data);
1127         imx6q_add_imx_esai(0, &sab_esai_pdata);
1128
1129         gpio_request(SABREAUTO_ESAI_INT, "esai-int");
1130         gpio_direction_input(SABREAUTO_ESAI_INT);
1131
1132         anaclk_2 = clk_get(NULL, "anaclk_2");
1133         if (IS_ERR(anaclk_2))
1134                 return PTR_ERR(anaclk_2);
1135         clk_set_rate(anaclk_2, 24576000);
1136
1137         esai_clk = clk_get(NULL, "esai_clk");
1138         if (IS_ERR(esai_clk))
1139                 return PTR_ERR(esai_clk);
1140
1141         pll4_clk = clk_get(NULL, "pll4");
1142         if (IS_ERR(pll4_clk))
1143                 return PTR_ERR(pll4_clk);
1144
1145         clk_set_parent(pll4_clk, anaclk_2);
1146         clk_set_parent(esai_clk, pll4_clk);
1147         clk_set_rate(pll4_clk, 786432000);
1148         clk_set_rate(esai_clk, 24576000);
1149
1150         platform_device_register(&cs42888_sabreauto_va_reg_devices);
1151         platform_device_register(&cs42888_sabreauto_vd_reg_devices);
1152         platform_device_register(&cs42888_sabreauto_vls_reg_devices);
1153         platform_device_register(&cs42888_sabreauto_vlc_reg_devices);
1154         return 0;
1155 }
1156
1157 static struct mxc_mlb_platform_data mx6_sabreauto_mlb150_data = {
1158         .reg_nvcc               = NULL,
1159         .mlb_clk                = "mlb150_clk",
1160         .mlb_pll_clk            = "pll6",
1161 };
1162
1163 static struct mxc_dvfs_platform_data sabreauto_dvfscore_data = {
1164         .reg_id                 = "cpu_vddgp",
1165         .clk1_id                = "cpu_clk",
1166         .clk2_id                = "gpc_dvfs_clk",
1167         .gpc_cntr_offset        = MXC_GPC_CNTR_OFFSET,
1168         .ccm_cdcr_offset        = MXC_CCM_CDCR_OFFSET,
1169         .ccm_cacrr_offset       = MXC_CCM_CACRR_OFFSET,
1170         .ccm_cdhipr_offset      = MXC_CCM_CDHIPR_OFFSET,
1171         .prediv_mask            = 0x1F800,
1172         .prediv_offset          = 11,
1173         .prediv_val             = 3,
1174         .div3ck_mask            = 0xE0000000,
1175         .div3ck_offset          = 29,
1176         .div3ck_val             = 2,
1177         .emac_val               = 0x08,
1178         .upthr_val              = 25,
1179         .dnthr_val              = 9,
1180         .pncthr_val             = 33,
1181         .upcnt_val              = 10,
1182         .dncnt_val              = 10,
1183         .delay_time             = 80,
1184 };
1185
1186 static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
1187                                    char **cmdline, struct meminfo *mi)
1188 {
1189 }
1190
1191 static int __init early_enable_mipi_sensor(char *p)
1192 {
1193         mipi_sensor = 1;
1194         return 0;
1195 }
1196 early_param("mipi_sensor", early_enable_mipi_sensor);
1197
1198 static int __init early_enable_can0(char *p)
1199 {
1200         can0_enable = 1;
1201         return 0;
1202 }
1203 early_param("can0", early_enable_can0);
1204
1205 static inline void __init mx6q_csi0_io_init(void)
1206 {
1207         /* Camera reset */
1208         gpio_request(SABREAUTO_CSI0_RST, "cam-reset");
1209         gpio_direction_output(SABREAUTO_CSI0_RST, 1);
1210
1211         /* Camera power down */
1212         gpio_request(SABREAUTO_CSI0_PWN, "cam-pwdn");
1213         gpio_direction_output(SABREAUTO_CSI0_PWN, 1);
1214         msleep(1);
1215         gpio_set_value(SABREAUTO_CSI0_PWN, 0);
1216         mxc_iomux_set_gpr_register(1, 19, 1, 1);
1217 }
1218
1219 static struct mxc_spdif_platform_data mxc_spdif_data = {
1220         .spdif_tx       = 0,    /* disable tx */
1221         .spdif_rx       = 1,    /* enable rx */
1222         .spdif_rx_clk   = 0,    /* rx clk from spdif stream */
1223         .spdif_clk      = NULL, /* spdif bus clk */
1224 };
1225
1226 /*!
1227  * Board specific initialization.
1228  */
1229 static void __init mx6_board_init(void)
1230 {
1231         int i;
1232         int ret;
1233         iomux_v3_cfg_t *common_pads = NULL;
1234         iomux_v3_cfg_t *can0_pads = NULL;
1235         iomux_v3_cfg_t *can1_pads = NULL;
1236         iomux_v3_cfg_t *mipi_sensor_pads = NULL;
1237         iomux_v3_cfg_t *i2c3_pads = NULL;
1238
1239         int common_pads_cnt;
1240         int can0_pads_cnt;
1241         int can1_pads_cnt;
1242         int mipi_sensor_pads_cnt;
1243         int i2c3_pads_cnt;
1244
1245         if (cpu_is_mx6q()) {
1246                 common_pads = mx6q_sabreauto_pads;
1247                 can0_pads = mx6q_sabreauto_can0_pads;
1248                 can1_pads = mx6q_sabreauto_can1_pads;
1249                 mipi_sensor_pads = mx6q_sabreauto_mipi_sensor_pads;
1250
1251                 common_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_pads);
1252                 can0_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_can0_pads);
1253                 can1_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_can1_pads);
1254                 mipi_sensor_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_mipi_sensor_pads);
1255                 if (board_is_mx6_reva()) {
1256                         i2c3_pads = mx6q_i2c3_pads_rev_a;
1257                         i2c3_pads_cnt = ARRAY_SIZE(mx6q_i2c3_pads_rev_a);
1258                 } else {
1259                         i2c3_pads = mx6q_i2c3_pads_rev_b;
1260                         i2c3_pads_cnt = ARRAY_SIZE(mx6q_i2c3_pads_rev_b);
1261                 }
1262         } else if (cpu_is_mx6dl()) {
1263                 common_pads = mx6dl_sabreauto_pads;
1264                 can0_pads = mx6dl_sabreauto_can0_pads;
1265                 can1_pads = mx6dl_sabreauto_can1_pads;
1266                 mipi_sensor_pads = mx6dl_sabreauto_mipi_sensor_pads;
1267
1268                 common_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_pads);
1269                 can0_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_can0_pads);
1270                 can1_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_can1_pads);
1271                 mipi_sensor_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_mipi_sensor_pads);
1272                 if (board_is_mx6_reva()) {
1273                         i2c3_pads = mx6dl_i2c3_pads_rev_a;
1274                         i2c3_pads_cnt = ARRAY_SIZE(mx6dl_i2c3_pads_rev_a);
1275                 } else {
1276                         i2c3_pads = mx6dl_i2c3_pads_rev_b;
1277                         i2c3_pads_cnt = ARRAY_SIZE(mx6dl_i2c3_pads_rev_b);
1278                 }
1279         }
1280
1281         BUG_ON(!common_pads);
1282         mxc_iomux_v3_setup_multiple_pads(common_pads, common_pads_cnt);
1283         BUG_ON(!i2c3_pads);
1284         mxc_iomux_v3_setup_multiple_pads(i2c3_pads, i2c3_pads_cnt);
1285
1286         if (!uart2_en) {
1287                 if (can0_enable) {
1288                         BUG_ON(!can0_pads);
1289                         mxc_iomux_v3_setup_multiple_pads(can0_pads,
1290                                                         can0_pads_cnt);
1291                 }
1292                 BUG_ON(!can1_pads);
1293                 mxc_iomux_v3_setup_multiple_pads(can1_pads, can1_pads_cnt);
1294         }
1295
1296         /* assert i2c-rst  */
1297         gpio_request(SABREAUTO_I2C_EXP_RST, "i2c-rst");
1298         gpio_direction_output(SABREAUTO_I2C_EXP_RST, 1);
1299
1300         if (!board_is_mx6_reva()) {
1301                 /* enable i2c3_sda route path */
1302                 gpio_request(SABREAUTO_I2C3_STEER, "i2c3-steer");
1303                 gpio_direction_output(SABREAUTO_I2C3_STEER, 1);
1304                 /* Set GPIO_16 input for IEEE-1588 ts_clk and
1305                  * RMII reference clk
1306                  * For MX6 GPR1 bit21 meaning:
1307                  * Bit21:   0 - GPIO_16 pad output
1308                  *          1 - GPIO_16 pad input
1309                  */
1310                 mxc_iomux_set_gpr_register(1, 21, 1, 1);
1311         }
1312
1313         if (mipi_sensor) {
1314                 BUG_ON(!mipi_sensor_pads);
1315                 mxc_iomux_v3_setup_multiple_pads(mipi_sensor_pads,
1316                                                 mipi_sensor_pads_cnt);
1317         }
1318
1319         gp_reg_id = sabreauto_dvfscore_data.reg_id;
1320         mx6q_sabreauto_init_uart();
1321         imx6q_add_mipi_csi2(&mipi_csi2_pdata);
1322         if (cpu_is_mx6dl()) {
1323                 mipi_dsi_pdata.ipu_id = 0;
1324                 mipi_dsi_pdata.disp_id = 1;
1325                 ldb_data.ipu_id = 0;
1326                 ldb_data.disp_id = 0;
1327                 ldb_data.sec_ipu_id = 0;
1328                 ldb_data.sec_disp_id = 1;
1329                 hdmi_core_data.disp_id = 1;
1330         }
1331         imx6q_add_mxc_hdmi_core(&hdmi_core_data);
1332
1333         imx6q_add_ipuv3(0, &ipu_data[0]);
1334         if (cpu_is_mx6q()) {
1335                 imx6q_add_ipuv3(1, &ipu_data[1]);
1336                 for (i = 0; i < ARRAY_SIZE(sabr_fb_data); i++)
1337                         imx6q_add_ipuv3fb(i, &sabr_fb_data[i]);
1338         } else if (cpu_is_mx6dl())
1339                 for (i = 0; i < (ARRAY_SIZE(sabr_fb_data) + 1) / 2; i++)
1340                         imx6q_add_ipuv3fb(i, &sabr_fb_data[i]);
1341
1342         imx6q_add_mipi_dsi(&mipi_dsi_pdata);
1343         imx6q_add_lcdif(&lcdif_data);
1344         imx6q_add_ldb(&ldb_data);
1345         imx6q_add_v4l2_output(0);
1346         imx6q_add_v4l2_capture(0);
1347         imx6q_add_android_device_buttons();
1348
1349         imx6q_add_imx_snvs_rtc();
1350
1351         imx6q_add_imx_i2c(1, &mx6q_sabreauto_i2c1_data);
1352         i2c_register_board_info(1, mxc_i2c1_board_info,
1353                         ARRAY_SIZE(mxc_i2c1_board_info));
1354         imx6q_add_imx_i2c(2, &mx6q_sabreauto_i2c2_data);
1355         i2c_register_board_info(2, mxc_i2c2_board_info,
1356                         ARRAY_SIZE(mxc_i2c2_board_info));
1357
1358         ret = gpio_request(SABREAUTO_PMIC_INT, "pFUZE-int");
1359         if (ret) {
1360                 printk(KERN_ERR"request pFUZE-int error!!\n");
1361                 return;
1362         } else {
1363                 gpio_direction_input(SABREAUTO_PMIC_INT);
1364                 mx6q_sabreauto_init_pfuze100(SABREAUTO_PMIC_INT);
1365         }
1366         /* SPI */
1367         imx6q_add_ecspi(0, &mx6q_sabreauto_spi_data);
1368 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
1369         spi_device_init();
1370 #else
1371         mx6q_setup_weimcs();
1372         platform_device_register(&physmap_flash_device);
1373 #endif
1374         imx6q_add_mxc_hdmi(&hdmi_data);
1375
1376         imx6q_add_anatop_thermal_imx(1, &mx6q_sabreauto_anatop_thermal_data);
1377
1378         if (!can0_enable)
1379                 imx6_init_fec(fec_data);
1380
1381         imx6q_add_pm_imx(0, &mx6q_sabreauto_pm_data);
1382
1383         imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabreauto_sd3_data);
1384         imx6q_add_sdhci_usdhc_imx(0, &mx6q_sabreauto_sd1_data);
1385
1386         imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
1387         imx6q_sabreauto_init_usb();
1388         if (cpu_is_mx6q())
1389                 imx6q_add_ahci(0, &mx6q_sabreauto_sata_data);
1390         imx6q_add_vpu();
1391         imx6q_init_audio();
1392         platform_device_register(&sabreauto_vmmc_reg_devices);
1393         mx6_cpu_regulator_init();
1394         imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
1395         imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
1396         imx6q_add_asrc(&imx_asrc_data);
1397
1398         if (!mipi_sensor)
1399                 mx6q_csi0_io_init();
1400
1401         /* DISP0 Detect */
1402         gpio_request(SABREAUTO_DISP0_DET_INT, "disp0-detect");
1403         gpio_direction_input(SABREAUTO_DISP0_DET_INT);
1404
1405         /* DISP0 Reset - Assert for i2c disabled mode */
1406         gpio_request(SABREAUTO_DISP0_RESET, "disp0-reset");
1407         gpio_direction_output(SABREAUTO_DISP0_RESET, 0);
1408
1409         /* DISP0 I2C enable */
1410         gpio_request(SABREAUTO_DISP0_I2C_EN, "disp0-i2c");
1411         gpio_direction_output(SABREAUTO_DISP0_I2C_EN, 0);
1412
1413         gpio_request(SABREAUTO_DISP0_PWR, "disp0-pwr");
1414         gpio_direction_output(SABREAUTO_DISP0_PWR, 1);
1415
1416         gpio_request(SABREAUTO_LDB_BACKLIGHT3, "ldb-backlight3");
1417         gpio_direction_output(SABREAUTO_LDB_BACKLIGHT3, 1);
1418         gpio_request(SABREAUTO_LDB_BACKLIGHT4, "ldb-backlight4");
1419         gpio_direction_output(SABREAUTO_LDB_BACKLIGHT4, 1);
1420         imx6q_add_otp();
1421         imx6q_add_viim();
1422         imx6q_add_imx2_wdt(0, NULL);
1423         imx6q_add_dma();
1424         imx6q_add_gpmi(&mx6q_gpmi_nand_platform_data);
1425
1426         imx6q_add_dvfs_core(&sabreauto_dvfscore_data);
1427
1428         imx6q_add_mxc_pwm(2);
1429         imx6q_add_mxc_pwm(3);
1430         imx6q_add_mxc_pwm_backlight(2, &mx6_arm2_pwm_backlight_data3);
1431         imx6q_add_mxc_pwm_backlight(3, &mx6_arm2_pwm_backlight_data4);
1432
1433         mxc_spdif_data.spdif_core_clk = clk_get_sys("mxc_spdif.0", NULL);
1434         clk_put(mxc_spdif_data.spdif_core_clk);
1435         imx6q_add_spdif(&mxc_spdif_data);
1436         imx6q_add_spdif_dai();
1437         imx6q_add_spdif_audio_device();
1438
1439         if (can0_enable)
1440                 imx6q_add_flexcan0(&mx6q_sabreauto_flexcan_pdata[0]);
1441         imx6q_add_flexcan1(&mx6q_sabreauto_flexcan_pdata[1]);
1442         imx6q_add_hdmi_soc();
1443         imx6q_add_hdmi_soc_dai();
1444         imx6q_add_mlb150(&mx6_sabreauto_mlb150_data);
1445 }
1446
1447 extern void __iomem *twd_base;
1448 static void __init mx6_timer_init(void)
1449 {
1450         struct clk *uart_clk;
1451 #ifdef CONFIG_LOCAL_TIMERS
1452         twd_base = ioremap(LOCAL_TWD_ADDR, SZ_256);
1453         BUG_ON(!twd_base);
1454 #endif
1455         mx6_clocks_init(32768, 24000000, 0, 0);
1456
1457         uart_clk = clk_get_sys("imx-uart.0", NULL);
1458         early_console_setup(UART4_BASE_ADDR, uart_clk);
1459 }
1460
1461 static struct sys_timer mxc_timer = {
1462         .init = mx6_timer_init,
1463 };
1464
1465 static void __init mx6q_reserve(void)
1466 {
1467         phys_addr_t phys;
1468
1469         if (imx6q_gpu_pdata.reserved_mem_size) {
1470                 phys = memblock_alloc_base(imx6q_gpu_pdata.reserved_mem_size,
1471                         SZ_4K, SZ_2G);
1472                 memblock_free(phys, imx6q_gpu_pdata.reserved_mem_size);
1473                 memblock_remove(phys, imx6q_gpu_pdata.reserved_mem_size);
1474                 imx6q_gpu_pdata.reserved_mem_base = phys;
1475         }
1476 }
1477
1478 MACHINE_START(MX6Q_SABREAUTO, "Freescale i.MX 6Quad/DualLite/Solo Sabre Auto Board")
1479         .boot_params    = MX6_PHYS_OFFSET + 0x100,
1480         .fixup          = fixup_mxc_board,
1481         .map_io         = mx6_map_io,
1482         .init_irq       = mx6_init_irq,
1483         .init_machine   = mx6_board_init,
1484         .timer          = &mxc_timer,
1485         .reserve        = mx6q_reserve,
1486 MACHINE_END