2 * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 #include <linux/types.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/init.h>
26 #include <linux/input.h>
27 #include <linux/nodemask.h>
28 #include <linux/clk.h>
29 #include <linux/platform_device.h>
30 #include <linux/fsl_devices.h>
31 #include <linux/spi/spi.h>
32 #include <linux/spi/flash.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c/pca953x.h>
35 #include <linux/ata.h>
36 #include <linux/mtd/mtd.h>
37 #include <linux/mtd/map.h>
38 #include <linux/mtd/partitions.h>
39 #include <linux/regulator/consumer.h>
40 #include <linux/pmic_external.h>
41 #include <linux/pmic_status.h>
42 #include <linux/ipu.h>
43 #include <linux/mxcfb.h>
44 #include <linux/pwm_backlight.h>
45 #include <linux/fec.h>
46 #include <linux/memblock.h>
47 #include <linux/gpio.h>
48 #include <linux/etherdevice.h>
49 #include <linux/power/max8903_charger.h>
50 #include <linux/regulator/anatop-regulator.h>
51 #include <linux/regulator/consumer.h>
52 #include <linux/regulator/machine.h>
53 #include <linux/regulator/fixed.h>
54 #include <linux/mfd/max17135.h>
55 #include <linux/mfd/wm8994/pdata.h>
56 #include <linux/mfd/wm8994/gpio.h>
58 #include <mach/common.h>
59 #include <mach/hardware.h>
60 #include <mach/mxc_dvfs.h>
61 #include <mach/memory.h>
62 #include <mach/iomux-mx6q.h>
63 #include <mach/imx-uart.h>
64 #include <mach/viv_gpu.h>
65 #include <mach/ahci_sata.h>
66 #include <mach/ipu-v3.h>
67 #include <mach/mxc_hdmi.h>
68 #include <mach/mxc_asrc.h>
71 #include <asm/setup.h>
72 #include <asm/mach-types.h>
73 #include <asm/mach/arch.h>
74 #include <asm/mach/time.h>
77 #include "devices-imx6q.h"
79 #include "cpu_op-mx6.h"
80 #include "board-mx6q_sabresd.h"
81 #include "board-mx6dl_sabresd.h"
83 #define SABRESD_USR_DEF_GRN_LED IMX_GPIO_NR(1, 1)
84 #define SABRESD_USR_DEF_RED_LED IMX_GPIO_NR(1, 2)
85 #define SABRESD_VOLUME_UP IMX_GPIO_NR(1, 4)
86 #define SABRESD_VOLUME_DN IMX_GPIO_NR(1, 5)
87 #define SABRESD_MICROPHONE_DET IMX_GPIO_NR(1, 9)
88 #define SABRESD_CSI0_PWN IMX_GPIO_NR(1, 16)
89 #define SABRESD_CSI0_RST IMX_GPIO_NR(1, 17)
90 #define SABRESD_ACCL_INT IMX_GPIO_NR(1, 18)
91 #define SABRESD_MIPICSI_PWN IMX_GPIO_NR(1, 19)
92 #define SABRESD_MIPICSI_RST IMX_GPIO_NR(1, 20)
93 #define SABRESD_RGMII_RST IMX_GPIO_NR(1, 25)
94 #define SABRESD_RGMII_INT IMX_GPIO_NR(1, 26)
95 #define SABRESD_CHARGE_UOK_B IMX_GPIO_NR(1, 27)
96 #define SABRESD_USBH1_PWR_EN IMX_GPIO_NR(1, 29)
97 #define SABRESD_DISP0_PWR_EN IMX_GPIO_NR(1, 30)
99 #define SABRESD_SD3_CD IMX_GPIO_NR(2, 0)
100 #define SABRESD_SD3_WP IMX_GPIO_NR(2, 1)
101 #define SABRESD_SD2_CD IMX_GPIO_NR(2, 2)
102 #define SABRESD_SD2_WP IMX_GPIO_NR(2, 3)
103 #define SABRESD_CHARGE_DOK_B IMX_GPIO_NR(2, 24)
104 #define SABRESD_GPS_RESET IMX_GPIO_NR(2, 28)
105 #define SABRESD_SENSOR_EN IMX_GPIO_NR(2, 31)
107 #define SABRESD_GPS_EN IMX_GPIO_NR(3, 0)
108 #define SABRESD_DISP0_RST_B IMX_GPIO_NR(3, 8)
109 #define SABRESD_ALS_INT IMX_GPIO_NR(3, 9)
110 #define SABRESD_CHARGE_CHG_2_B IMX_GPIO_NR(3, 13)
111 #define SABRESD_CHARGE_FLT_2_B IMX_GPIO_NR(3, 14)
112 #define SABRESD_BAR0_INT IMX_GPIO_NR(3, 15)
113 #define SABRESD_eCOMPASS_INT IMX_GPIO_NR(3, 16)
114 #define SABRESD_GPS_PPS IMX_GPIO_NR(3, 18)
115 #define SABRESD_PCIE_PWR_EN IMX_GPIO_NR(3, 19)
116 #define SABRESD_USB_OTG_PWR IMX_GPIO_NR(3, 22)
117 #define SABRESD_USB_H1_PWR IMX_GPIO_NR(1, 29)
118 #define SABRESD_CHARGE_CHG_1_B IMX_GPIO_NR(3, 23)
119 #define SABRESD_TS_INT IMX_GPIO_NR(3, 26)
120 #define SABRESD_DISP0_RD IMX_GPIO_NR(3, 28)
121 #define SABRESD_POWER_OFF IMX_GPIO_NR(3, 29)
123 #define SABRESD_CAN1_STBY IMX_GPIO_NR(4, 5)
124 #define SABRESD_ECSPI1_CS0 IMX_GPIO_NR(4, 9)
125 #define SABRESD_CODEC_PWR_EN IMX_GPIO_NR(4, 10)
126 #define SABRESD_HDMI_CEC_IN IMX_GPIO_NR(4, 11)
127 #define SABRESD_PCIE_DIS_B IMX_GPIO_NR(4, 14)
129 #define SABRESD_DI0_D0_CS IMX_GPIO_NR(5, 0)
130 #define SABRESD_CHARGE_FLT_1_B IMX_GPIO_NR(5, 2)
131 #define SABRESD_PCIE_WAKE_B IMX_GPIO_NR(5, 20)
133 #define SABRESD_CAP_TCH_INT1 IMX_GPIO_NR(6, 7)
134 #define SABRESD_CAP_TCH_INT0 IMX_GPIO_NR(6, 8)
135 #define SABRESD_DISP_RST_B IMX_GPIO_NR(6, 11)
136 #define SABRESD_DISP_PWR_EN IMX_GPIO_NR(6, 14)
137 #define SABRESD_CABC_EN0 IMX_GPIO_NR(6, 15)
138 #define SABRESD_CABC_EN1 IMX_GPIO_NR(6, 16)
139 #define SABRESD_AUX_3V15_EN IMX_GPIO_NR(6, 9)
140 #define SABRESD_DISP0_WR_REVB IMX_GPIO_NR(6, 9)
141 #define SABRESD_AUX_5V_EN IMX_GPIO_NR(6, 10)
142 #define SABRESD_DI1_D0_CS IMX_GPIO_NR(6, 31)
144 #define SABRESD_HEADPHONE_DET IMX_GPIO_NR(7, 8)
145 #define SABRESD_USB_HUB_RESET IMX_GPIO_NR(7, 12)
146 #define SABRESD_PCIE_RST_B_REVB IMX_GPIO_NR(7, 12)
147 #define SABRESD_PMIC_INT_B IMX_GPIO_NR(7, 13)
148 #define SABRESD_PFUZE_INT IMX_GPIO_NR(7, 13)
150 #define SABRESD_EPDC_SDDO_0 IMX_GPIO_NR(2, 22)
151 #define SABRESD_EPDC_SDDO_1 IMX_GPIO_NR(3, 10)
152 #define SABRESD_EPDC_SDDO_2 IMX_GPIO_NR(3, 12)
153 #define SABRESD_EPDC_SDDO_3 IMX_GPIO_NR(3, 11)
154 #define SABRESD_EPDC_SDDO_4 IMX_GPIO_NR(2, 27)
155 #define SABRESD_EPDC_SDDO_5 IMX_GPIO_NR(2, 30)
156 #define SABRESD_EPDC_SDDO_6 IMX_GPIO_NR(2, 23)
157 #define SABRESD_EPDC_SDDO_7 IMX_GPIO_NR(2, 26)
158 #define SABRESD_EPDC_SDDO_8 IMX_GPIO_NR(2, 24)
159 #define SABRESD_EPDC_SDDO_9 IMX_GPIO_NR(3, 15)
160 #define SABRESD_EPDC_SDDO_10 IMX_GPIO_NR(3, 16)
161 #define SABRESD_EPDC_SDDO_11 IMX_GPIO_NR(3, 23)
162 #define SABRESD_EPDC_SDDO_12 IMX_GPIO_NR(3, 19)
163 #define SABRESD_EPDC_SDDO_13 IMX_GPIO_NR(3, 13)
164 #define SABRESD_EPDC_SDDO_14 IMX_GPIO_NR(3, 14)
165 #define SABRESD_EPDC_SDDO_15 IMX_GPIO_NR(5, 2)
166 #define SABRESD_EPDC_GDCLK IMX_GPIO_NR(2, 17)
167 #define SABRESD_EPDC_GDSP IMX_GPIO_NR(2, 16)
168 #define SABRESD_EPDC_GDOE IMX_GPIO_NR(6, 6)
169 #define SABRESD_EPDC_GDRL IMX_GPIO_NR(5, 4)
170 #define SABRESD_EPDC_SDCLK IMX_GPIO_NR(3, 31)
171 #define SABRESD_EPDC_SDOEZ IMX_GPIO_NR(3, 30)
172 #define SABRESD_EPDC_SDOED IMX_GPIO_NR(3, 26)
173 #define SABRESD_EPDC_SDOE IMX_GPIO_NR(3, 27)
174 #define SABRESD_EPDC_SDLE IMX_GPIO_NR(3, 1)
175 #define SABRESD_EPDC_SDCLKN IMX_GPIO_NR(3, 0)
176 #define SABRESD_EPDC_SDSHR IMX_GPIO_NR(2, 29)
177 #define SABRESD_EPDC_PWRCOM IMX_GPIO_NR(2, 28)
178 #define SABRESD_EPDC_PWRSTAT IMX_GPIO_NR(2, 21)
179 #define SABRESD_EPDC_PWRCTRL0 IMX_GPIO_NR(2, 20)
180 #define SABRESD_EPDC_PWRCTRL1 IMX_GPIO_NR(2, 19)
181 #define SABRESD_EPDC_PWRCTRL2 IMX_GPIO_NR(2, 18)
182 #define SABRESD_EPDC_PWRCTRL3 IMX_GPIO_NR(3, 28)
183 #define SABRESD_EPDC_BDR0 IMX_GPIO_NR(3, 2)
184 #define SABRESD_EPDC_BDR1 IMX_GPIO_NR(3, 3)
185 #define SABRESD_EPDC_SDCE0 IMX_GPIO_NR(3, 4)
186 #define SABRESD_EPDC_SDCE1 IMX_GPIO_NR(3, 5)
187 #define SABRESD_EPDC_SDCE2 IMX_GPIO_NR(3, 6)
188 #define SABRESD_EPDC_SDCE3 IMX_GPIO_NR(3, 7)
189 #define SABRESD_EPDC_SDCE4 IMX_GPIO_NR(3, 8)
190 #define SABRESD_EPDC_PMIC_WAKE IMX_GPIO_NR(3, 20)
191 #define SABRESD_EPDC_PMIC_INT IMX_GPIO_NR(2, 25)
192 #define SABRESD_EPDC_VCOM IMX_GPIO_NR(3, 17)
194 static struct clk *sata_clk;
195 static int mma8451_position = 3;
196 static int mag3110_position;
198 extern char *gp_reg_id;
199 extern int epdc_enabled;
200 static int max17135_regulator_init(struct max17135 *max17135);
202 static const struct esdhc_platform_data mx6q_sabresd_sd2_data __initconst = {
203 .cd_gpio = SABRESD_SD2_CD,
204 .wp_gpio = SABRESD_SD2_WP,
205 .keep_power_at_suspend = 1,
210 static const struct esdhc_platform_data mx6q_sabresd_sd3_data __initconst = {
211 .cd_gpio = SABRESD_SD3_CD,
212 .wp_gpio = SABRESD_SD3_WP,
213 .keep_power_at_suspend = 1,
218 static const struct esdhc_platform_data mx6q_sabresd_sd4_data __initconst = {
220 .keep_power_at_suspend = 1,
225 static const struct anatop_thermal_platform_data
226 mx6q_sabresd_anatop_thermal_data __initconst = {
227 .name = "anatop_thermal",
230 static inline void mx6q_sabresd_init_uart(void)
232 imx6q_add_imx_uart(2, NULL);
233 imx6q_add_imx_uart(0, NULL);
236 static int mx6q_sabresd_fec_phy_init(struct phy_device *phydev)
240 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */
241 phy_write(phydev, 0xd, 0x7);
242 phy_write(phydev, 0xe, 0x8016);
243 phy_write(phydev, 0xd, 0x4007);
244 val = phy_read(phydev, 0xe);
248 phy_write(phydev, 0xe, val);
250 /* Introduce tx clock delay */
251 phy_write(phydev, 0x1d, 0x5);
252 val = phy_read(phydev, 0x1e);
254 phy_write(phydev, 0x1e, val);
257 val = phy_read(phydev, 0x0);
259 if (val & BMCR_PDOWN)
260 phy_write(phydev, 0x0, (val & ~BMCR_PDOWN));
265 static struct fec_platform_data fec_data __initdata = {
266 .init = mx6q_sabresd_fec_phy_init,
267 .phy = PHY_INTERFACE_MODE_RGMII,
270 static int mx6q_sabresd_spi_cs[] = {
274 static const struct spi_imx_master mx6q_sabresd_spi_data __initconst = {
275 .chipselect = mx6q_sabresd_spi_cs,
276 .num_chipselect = ARRAY_SIZE(mx6q_sabresd_spi_cs),
279 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
280 static struct mtd_partition imx6_sabresd_spi_nor_partitions[] = {
282 .name = "bootloader",
288 .offset = MTDPART_OFS_APPEND,
289 .size = MTDPART_SIZ_FULL,
293 static struct flash_platform_data imx6_sabresd__spi_flash_data = {
295 .parts = imx6_sabresd_spi_nor_partitions,
296 .nr_parts = ARRAY_SIZE(imx6_sabresd_spi_nor_partitions),
297 .type = "sst25vf016b",
301 static struct spi_board_info imx6_sabresd_spi_nor_device[] __initdata = {
302 #if defined(CONFIG_MTD_M25P80)
304 .modalias = "m25p80",
305 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
308 .platform_data = &imx6_sabresd__spi_flash_data,
313 static void spi_device_init(void)
315 spi_register_board_info(imx6_sabresd_spi_nor_device,
316 ARRAY_SIZE(imx6_sabresd_spi_nor_device));
319 static struct imx_ssi_platform_data mx6_sabresd_ssi_pdata = {
320 .flags = IMX_SSI_DMA | IMX_SSI_SYN,
323 static struct platform_device mx6_sabresd_audio_wm8958_device = {
324 .name = "imx-wm8958",
327 static struct mxc_audio_platform_data wm8958_data = {
331 .hp_gpio = SABRESD_HEADPHONE_DET,
335 static struct wm8994_pdata wm8958_pdata = {
337 [0] = WM8994_GP_FN_GPIO | WM8994_GPN_DB,
338 [1] = WM8994_GP_FN_GPIO | WM8994_GPN_DB | WM8994_GPN_PD,
339 [2] = WM8994_GP_FN_GPIO | WM8994_GPN_DB | WM8994_GPN_PD,
340 [3] = WM8994_GP_FN_GPIO | WM8994_GPN_DB | WM8994_GPN_PD,
341 [4] = WM8994_GP_FN_GPIO | WM8994_GPN_DB | WM8994_GPN_PD,
342 [5] = WM8994_GP_FN_GPIO | WM8994_GPN_DB | WM8994_GPN_PD,
343 [7] = WM8994_GP_FN_GPIO | WM8994_GPN_DB | WM8994_GPN_PD,
344 [8] = WM8994_GP_FN_GPIO | WM8994_GPN_DB | WM8994_GPN_PD,
345 [9] = WM8994_GP_FN_GPIO | WM8994_GPN_DB | WM8994_GPN_PD,
346 [10] = WM8994_GP_FN_GPIO | WM8994_GPN_DB | WM8994_GPN_PD,
350 static int mxc_wm8958_init(void)
355 clko = clk_get(NULL, "clko_clk");
357 pr_err("can't get CLKO clock.\n");
358 return PTR_ERR(clko);
360 /* both audio codec and comera use CLKO clk*/
361 rate = clk_round_rate(clko, 22000000);
363 wm8958_data.sysclk = rate;
364 clk_set_rate(clko, rate);
366 /* enable wm8958 4.2v power supply */
367 gpio_request(SABRESD_CODEC_PWR_EN, "aud_4v2");
368 gpio_direction_output(SABRESD_CODEC_PWR_EN, 1);
370 gpio_set_value(SABRESD_CODEC_PWR_EN, 1);
375 static struct platform_device mx6_sabresd_audio_wm8962_device = {
376 .name = "imx-wm8962",
379 static struct mxc_audio_platform_data wm8962_data = {
383 .hp_gpio = SABRESD_HEADPHONE_DET,
387 static int mxc_wm8962_init(void)
392 clko = clk_get(NULL, "clko_clk");
394 pr_err("can't get CLKO clock.\n");
395 return PTR_ERR(clko);
397 /* both audio codec and comera use CLKO clk*/
398 rate = clk_round_rate(clko, 22000000);
400 wm8962_data.sysclk = rate;
401 clk_set_rate(clko, rate);
406 static struct regulator_consumer_supply sabresd_vwm8962_consumers[] = {
407 REGULATOR_SUPPLY("SPKVDD1", "0-001a"),
408 REGULATOR_SUPPLY("SPKVDD2", "0-001a"),
411 static struct regulator_init_data sabresd_vwm8962_init = {
414 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
417 .num_consumer_supplies = ARRAY_SIZE(sabresd_vwm8962_consumers),
418 .consumer_supplies = sabresd_vwm8962_consumers,
421 static struct fixed_voltage_config sabresd_vwm8962_reg_config = {
422 .supply_name = "SPKVDD",
423 .microvolts = 4200000,
424 .gpio = SABRESD_CODEC_PWR_EN,
426 .enabled_at_boot = 1,
427 .init_data = &sabresd_vwm8962_init,
430 static struct platform_device sabresd_vwm8962_reg_devices = {
431 .name = "reg-fixed-voltage",
434 .platform_data = &sabresd_vwm8962_reg_config,
438 static void mx6q_csi0_cam_powerdown(int powerdown)
441 gpio_set_value(SABRESD_CSI0_PWN, 1);
443 gpio_set_value(SABRESD_CSI0_PWN, 0);
446 static void mx6q_csi0_io_init(void)
449 mxc_iomux_v3_setup_multiple_pads(mx6q_sabresd_csi0_sensor_pads,
450 ARRAY_SIZE(mx6q_sabresd_csi0_sensor_pads));
451 else if (cpu_is_mx6dl())
452 mxc_iomux_v3_setup_multiple_pads(mx6dl_sabresd_csi0_sensor_pads,
453 ARRAY_SIZE(mx6dl_sabresd_csi0_sensor_pads));
456 gpio_request(SABRESD_CSI0_RST, "cam-reset");
457 gpio_direction_output(SABRESD_CSI0_RST, 1);
459 /* Camera power down */
460 gpio_request(SABRESD_CSI0_PWN, "cam-pwdn");
461 gpio_direction_output(SABRESD_CSI0_PWN, 1);
463 gpio_set_value(SABRESD_CSI0_PWN, 0);
466 * GPR1 bit19 and bit20 meaning:
467 * Bit19: 0 - Enable mipi to IPU1 CSI0
468 * virtual channel is fixed to 0
469 * 1 - Enable parallel interface to IPU1 CSI0
470 * Bit20: 0 - Enable mipi to IPU2 CSI1
471 * virtual channel is fixed to 3
472 * 1 - Enable parallel interface to IPU2 CSI1
473 * IPU1 CSI1 directly connect to mipi csi2,
474 * virtual channel is fixed to 1
475 * IPU2 CSI0 directly connect to mipi csi2,
476 * virtual channel is fixed to 2
479 * GPR13 bit 0-2 IPU_CSI0_MUX
484 mxc_iomux_set_gpr_register(1, 19, 1, 1);
485 else if (cpu_is_mx6dl())
486 mxc_iomux_set_gpr_register(13, 0, 3, 4);
489 static struct fsl_mxc_camera_platform_data camera_data = {
492 .io_init = mx6q_csi0_io_init,
493 .pwdn = mx6q_csi0_cam_powerdown,
496 static void mx6q_mipi_powerdown(int powerdown)
499 gpio_set_value(SABRESD_MIPICSI_PWN, 1);
501 gpio_set_value(SABRESD_MIPICSI_PWN, 0);
504 static void mx6q_mipi_sensor_io_init(void)
507 mxc_iomux_v3_setup_multiple_pads(mx6q_sabresd_mipi_sensor_pads,
508 ARRAY_SIZE(mx6q_sabresd_mipi_sensor_pads));
509 else if (cpu_is_mx6dl())
510 mxc_iomux_v3_setup_multiple_pads(mx6dl_sabresd_mipi_sensor_pads,
511 ARRAY_SIZE(mx6dl_sabresd_mipi_sensor_pads));
514 gpio_request(SABRESD_MIPICSI_RST, "cam-reset");
515 gpio_direction_output(SABRESD_MIPICSI_RST, 1);
517 /* Camera power down */
518 gpio_request(SABRESD_MIPICSI_PWN, "cam-pwdn");
519 gpio_direction_output(SABRESD_MIPICSI_PWN, 1);
521 gpio_set_value(SABRESD_MIPICSI_PWN, 0);
524 mxc_iomux_set_gpr_register(1, 19, 1, 0);
525 if (cpu_is_mx6dl()) {
526 mxc_iomux_set_gpr_register(13, 0, 3, 0);
530 static struct fsl_mxc_camera_platform_data mipi_csi2_data = {
533 .io_init = mx6q_mipi_sensor_io_init,
534 .pwdn = mx6q_mipi_powerdown,
537 #define mV_to_uV(mV) (mV * 1000)
538 #define uV_to_mV(uV) (uV / 1000)
539 #define V_to_uV(V) (mV_to_uV(V * 1000))
540 #define uV_to_V(uV) (uV_to_mV(uV) / 1000)
542 static struct regulator_consumer_supply display_consumers[] = {
549 static struct regulator_consumer_supply vcom_consumers[] = {
556 static struct regulator_consumer_supply v3p3_consumers[] = {
563 static struct regulator_init_data max17135_init_data[] = {
567 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
569 .num_consumer_supplies = ARRAY_SIZE(display_consumers),
570 .consumer_supplies = display_consumers,
574 .min_uV = V_to_uV(20),
575 .max_uV = V_to_uV(20),
580 .min_uV = V_to_uV(-22),
581 .max_uV = V_to_uV(-22),
586 .min_uV = V_to_uV(-22),
587 .max_uV = V_to_uV(-22),
592 .min_uV = V_to_uV(20),
593 .max_uV = V_to_uV(20),
598 .min_uV = mV_to_uV(-4325),
599 .max_uV = mV_to_uV(-500),
600 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
601 REGULATOR_CHANGE_STATUS,
603 .num_consumer_supplies = ARRAY_SIZE(vcom_consumers),
604 .consumer_supplies = vcom_consumers,
608 .min_uV = V_to_uV(-15),
609 .max_uV = V_to_uV(-15),
614 .min_uV = V_to_uV(15),
615 .max_uV = V_to_uV(15),
620 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
622 .num_consumer_supplies = ARRAY_SIZE(v3p3_consumers),
623 .consumer_supplies = v3p3_consumers,
627 static struct platform_device max17135_sensor_device = {
628 .name = "max17135_sensor",
632 static struct max17135_platform_data max17135_pdata __initdata = {
641 .gpio_pmic_pwrgood = SABRESD_EPDC_PWRSTAT,
642 .gpio_pmic_vcom_ctrl = SABRESD_EPDC_VCOM,
643 .gpio_pmic_wakeup = SABRESD_EPDC_PMIC_WAKE,
644 .gpio_pmic_v3p3 = SABRESD_EPDC_PWRCTRL0,
645 .gpio_pmic_intr = SABRESD_EPDC_PMIC_INT,
646 .regulator_init = max17135_init_data,
647 .init = max17135_regulator_init,
650 static int __init max17135_regulator_init(struct max17135 *max17135)
652 struct max17135_platform_data *pdata = &max17135_pdata;
657 "max17135_regulator_init abort: EPDC not enabled\n");
661 max17135->gvee_pwrup = pdata->gvee_pwrup;
662 max17135->vneg_pwrup = pdata->vneg_pwrup;
663 max17135->vpos_pwrup = pdata->vpos_pwrup;
664 max17135->gvdd_pwrup = pdata->gvdd_pwrup;
665 max17135->gvdd_pwrdn = pdata->gvdd_pwrdn;
666 max17135->vpos_pwrdn = pdata->vpos_pwrdn;
667 max17135->vneg_pwrdn = pdata->vneg_pwrdn;
668 max17135->gvee_pwrdn = pdata->gvee_pwrdn;
670 max17135->max_wait = pdata->vpos_pwrup + pdata->vneg_pwrup +
671 pdata->gvdd_pwrup + pdata->gvee_pwrup;
673 max17135->gpio_pmic_pwrgood = pdata->gpio_pmic_pwrgood;
674 max17135->gpio_pmic_vcom_ctrl = pdata->gpio_pmic_vcom_ctrl;
675 max17135->gpio_pmic_wakeup = pdata->gpio_pmic_wakeup;
676 max17135->gpio_pmic_v3p3 = pdata->gpio_pmic_v3p3;
677 max17135->gpio_pmic_intr = pdata->gpio_pmic_intr;
679 gpio_request(max17135->gpio_pmic_wakeup, "epdc-pmic-wake");
680 gpio_direction_output(max17135->gpio_pmic_wakeup, 0);
682 gpio_request(max17135->gpio_pmic_vcom_ctrl, "epdc-vcom");
683 gpio_direction_output(max17135->gpio_pmic_vcom_ctrl, 0);
685 gpio_request(max17135->gpio_pmic_v3p3, "epdc-v3p3");
686 gpio_direction_output(max17135->gpio_pmic_v3p3, 0);
688 gpio_request(max17135->gpio_pmic_intr, "epdc-pmic-int");
689 gpio_direction_input(max17135->gpio_pmic_intr);
691 gpio_request(max17135->gpio_pmic_pwrgood, "epdc-pwrstat");
692 gpio_direction_input(max17135->gpio_pmic_pwrgood);
694 max17135->vcom_setup = false;
695 max17135->init_done = false;
697 for (i = 0; i < MAX17135_NUM_REGULATORS; i++) {
698 ret = max17135_register_regulator(max17135, i,
699 &pdata->regulator_init[i]);
701 printk(KERN_ERR"max17135 regulator init failed: %d\n",
708 * TODO: We cannot enable full constraints for now, since
709 * it results in the PFUZE regulators being disabled
710 * at the end of boot, which disables critical regulators.
712 /*regulator_has_full_constraints();*/
717 static struct imxi2c_platform_data mx6q_sabresd_i2c_data = {
721 static struct fsl_mxc_lightsensor_platform_data ls_data = {
722 .rext = 499, /* calibration: 499K->700K */
725 static struct i2c_board_info mxc_i2c0_board_info[] __initdata = {
727 I2C_BOARD_INFO("wm89**", 0x1a),
730 I2C_BOARD_INFO("ov5642", 0x3c),
731 .platform_data = (void *)&camera_data,
734 I2C_BOARD_INFO("mma8451", 0x1c),
735 .platform_data = (void *)&mma8451_position,
739 static struct i2c_board_info mxc_i2c1_board_info[] __initdata = {
741 I2C_BOARD_INFO("mxc_hdmi_i2c", 0x50),
744 I2C_BOARD_INFO("ov5640_mipi", 0x3c),
745 .platform_data = (void *)&mipi_csi2_data,
748 I2C_BOARD_INFO("egalax_ts", 0x4),
749 .irq = gpio_to_irq(SABRESD_CAP_TCH_INT0),
753 static struct i2c_board_info mxc_i2c2_board_info[] __initdata = {
755 I2C_BOARD_INFO("max17135", 0x48),
756 .platform_data = &max17135_pdata,
759 I2C_BOARD_INFO("egalax_ts", 0x4),
760 .irq = gpio_to_irq(SABRESD_CAP_TCH_INT1),
763 I2C_BOARD_INFO("mag3110", 0x0e),
764 .irq = gpio_to_irq(SABRESD_eCOMPASS_INT),
765 .platform_data = (void *)&mag3110_position,
768 I2C_BOARD_INFO("isl29023", 0x44),
769 .irq = gpio_to_irq(SABRESD_ALS_INT),
770 .platform_data = &ls_data,
774 static int epdc_get_pins(void)
778 /* Claim GPIOs for EPDC pins - used during power up/down */
779 ret |= gpio_request(SABRESD_EPDC_SDDO_0, "epdc_d0");
780 ret |= gpio_request(SABRESD_EPDC_SDDO_1, "epdc_d1");
781 ret |= gpio_request(SABRESD_EPDC_SDDO_2, "epdc_d2");
782 ret |= gpio_request(SABRESD_EPDC_SDDO_3, "epdc_d3");
783 ret |= gpio_request(SABRESD_EPDC_SDDO_4, "epdc_d4");
784 ret |= gpio_request(SABRESD_EPDC_SDDO_5, "epdc_d5");
785 ret |= gpio_request(SABRESD_EPDC_SDDO_6, "epdc_d6");
786 ret |= gpio_request(SABRESD_EPDC_SDDO_7, "epdc_d7");
787 ret |= gpio_request(SABRESD_EPDC_GDCLK, "epdc_gdclk");
788 ret |= gpio_request(SABRESD_EPDC_GDSP, "epdc_gdsp");
789 ret |= gpio_request(SABRESD_EPDC_GDOE, "epdc_gdoe");
790 ret |= gpio_request(SABRESD_EPDC_GDRL, "epdc_gdrl");
791 ret |= gpio_request(SABRESD_EPDC_SDCLK, "epdc_sdclk");
792 ret |= gpio_request(SABRESD_EPDC_SDOE, "epdc_sdoe");
793 ret |= gpio_request(SABRESD_EPDC_SDLE, "epdc_sdle");
794 ret |= gpio_request(SABRESD_EPDC_SDSHR, "epdc_sdshr");
795 ret |= gpio_request(SABRESD_EPDC_BDR0, "epdc_bdr0");
796 ret |= gpio_request(SABRESD_EPDC_SDCE0, "epdc_sdce0");
797 ret |= gpio_request(SABRESD_EPDC_SDCE1, "epdc_sdce1");
798 ret |= gpio_request(SABRESD_EPDC_SDCE2, "epdc_sdce2");
803 static void epdc_put_pins(void)
805 gpio_free(SABRESD_EPDC_SDDO_0);
806 gpio_free(SABRESD_EPDC_SDDO_1);
807 gpio_free(SABRESD_EPDC_SDDO_2);
808 gpio_free(SABRESD_EPDC_SDDO_3);
809 gpio_free(SABRESD_EPDC_SDDO_4);
810 gpio_free(SABRESD_EPDC_SDDO_5);
811 gpio_free(SABRESD_EPDC_SDDO_6);
812 gpio_free(SABRESD_EPDC_SDDO_7);
813 gpio_free(SABRESD_EPDC_GDCLK);
814 gpio_free(SABRESD_EPDC_GDSP);
815 gpio_free(SABRESD_EPDC_GDOE);
816 gpio_free(SABRESD_EPDC_GDRL);
817 gpio_free(SABRESD_EPDC_SDCLK);
818 gpio_free(SABRESD_EPDC_SDOE);
819 gpio_free(SABRESD_EPDC_SDLE);
820 gpio_free(SABRESD_EPDC_SDSHR);
821 gpio_free(SABRESD_EPDC_BDR0);
822 gpio_free(SABRESD_EPDC_SDCE0);
823 gpio_free(SABRESD_EPDC_SDCE1);
824 gpio_free(SABRESD_EPDC_SDCE2);
827 static void epdc_enable_pins(void)
829 /* Configure MUX settings to enable EPDC use */
830 mxc_iomux_v3_setup_multiple_pads(mx6dl_sabresd_epdc_enable_pads, \
831 ARRAY_SIZE(mx6dl_sabresd_epdc_enable_pads));
833 gpio_direction_input(SABRESD_EPDC_SDDO_0);
834 gpio_direction_input(SABRESD_EPDC_SDDO_1);
835 gpio_direction_input(SABRESD_EPDC_SDDO_2);
836 gpio_direction_input(SABRESD_EPDC_SDDO_3);
837 gpio_direction_input(SABRESD_EPDC_SDDO_4);
838 gpio_direction_input(SABRESD_EPDC_SDDO_5);
839 gpio_direction_input(SABRESD_EPDC_SDDO_6);
840 gpio_direction_input(SABRESD_EPDC_SDDO_7);
841 gpio_direction_input(SABRESD_EPDC_GDCLK);
842 gpio_direction_input(SABRESD_EPDC_GDSP);
843 gpio_direction_input(SABRESD_EPDC_GDOE);
844 gpio_direction_input(SABRESD_EPDC_GDRL);
845 gpio_direction_input(SABRESD_EPDC_SDCLK);
846 gpio_direction_input(SABRESD_EPDC_SDOE);
847 gpio_direction_input(SABRESD_EPDC_SDLE);
848 gpio_direction_input(SABRESD_EPDC_SDSHR);
849 gpio_direction_input(SABRESD_EPDC_BDR0);
850 gpio_direction_input(SABRESD_EPDC_SDCE0);
851 gpio_direction_input(SABRESD_EPDC_SDCE1);
852 gpio_direction_input(SABRESD_EPDC_SDCE2);
855 static void epdc_disable_pins(void)
857 /* Configure MUX settings for EPDC pins to
858 * GPIO and drive to 0. */
859 mxc_iomux_v3_setup_multiple_pads(mx6dl_sabresd_epdc_disable_pads, \
860 ARRAY_SIZE(mx6dl_sabresd_epdc_disable_pads));
862 gpio_direction_output(SABRESD_EPDC_SDDO_0, 0);
863 gpio_direction_output(SABRESD_EPDC_SDDO_1, 0);
864 gpio_direction_output(SABRESD_EPDC_SDDO_2, 0);
865 gpio_direction_output(SABRESD_EPDC_SDDO_3, 0);
866 gpio_direction_output(SABRESD_EPDC_SDDO_4, 0);
867 gpio_direction_output(SABRESD_EPDC_SDDO_5, 0);
868 gpio_direction_output(SABRESD_EPDC_SDDO_6, 0);
869 gpio_direction_output(SABRESD_EPDC_SDDO_7, 0);
870 gpio_direction_output(SABRESD_EPDC_GDCLK, 0);
871 gpio_direction_output(SABRESD_EPDC_GDSP, 0);
872 gpio_direction_output(SABRESD_EPDC_GDOE, 0);
873 gpio_direction_output(SABRESD_EPDC_GDRL, 0);
874 gpio_direction_output(SABRESD_EPDC_SDCLK, 0);
875 gpio_direction_output(SABRESD_EPDC_SDOE, 0);
876 gpio_direction_output(SABRESD_EPDC_SDLE, 0);
877 gpio_direction_output(SABRESD_EPDC_SDSHR, 0);
878 gpio_direction_output(SABRESD_EPDC_BDR0, 0);
879 gpio_direction_output(SABRESD_EPDC_SDCE0, 0);
880 gpio_direction_output(SABRESD_EPDC_SDCE1, 0);
881 gpio_direction_output(SABRESD_EPDC_SDCE2, 0);
884 static struct fb_videomode e60_v110_mode = {
889 .pixclock = 18604700,
897 .vmode = FB_VMODE_NONINTERLACED,
900 static struct fb_videomode e60_v220_mode = {
905 .pixclock = 30000000,
913 .vmode = FB_VMODE_NONINTERLACED,
919 static struct fb_videomode e060scm_mode = {
924 .pixclock = 26666667,
932 .vmode = FB_VMODE_NONINTERLACED,
935 static struct fb_videomode e97_v110_mode = {
940 .pixclock = 32000000,
948 .vmode = FB_VMODE_NONINTERLACED,
952 static struct imx_epdc_fb_mode panel_modes[] = {
955 4, /* vscan_holdoff */
956 10, /* sdoed_width */
957 20, /* sdoed_delay */
958 10, /* sdoez_width */
959 20, /* sdoez_delay */
960 428, /* gdclk_hp_offs */
968 4, /* vscan_holdoff */
969 10, /* sdoed_width */
970 20, /* sdoed_delay */
971 10, /* sdoez_width */
972 20, /* sdoez_delay */
973 465, /* gdclk_hp_offs */
981 4, /* vscan_holdoff */
982 10, /* sdoed_width */
983 20, /* sdoed_delay */
984 10, /* sdoez_width */
985 20, /* sdoez_delay */
986 419, /* gdclk_hp_offs */
994 8, /* vscan_holdoff */
995 10, /* sdoed_width */
996 20, /* sdoed_delay */
997 10, /* sdoez_width */
998 20, /* sdoez_delay */
999 632, /* gdclk_hp_offs */
1007 static struct imx_epdc_fb_platform_data epdc_data = {
1008 .epdc_mode = panel_modes,
1009 .num_modes = ARRAY_SIZE(panel_modes),
1010 .get_pins = epdc_get_pins,
1011 .put_pins = epdc_put_pins,
1012 .enable_pins = epdc_enable_pins,
1013 .disable_pins = epdc_disable_pins,
1016 static void imx6q_sabresd_usbotg_vbus(bool on)
1019 gpio_set_value(SABRESD_USB_OTG_PWR, 1);
1021 gpio_set_value(SABRESD_USB_OTG_PWR, 0);
1024 static void __init imx6q_sabresd_init_usb(void)
1028 imx_otg_base = MX6_IO_ADDRESS(MX6Q_USB_OTG_BASE_ADDR);
1029 /* disable external charger detect,
1030 * or it will affect signal quality at dp .
1032 ret = gpio_request(SABRESD_USB_OTG_PWR, "usb-pwr");
1034 pr_err("failed to get GPIO SABRESD_USB_OTG_PWR: %d\n",
1038 gpio_direction_output(SABRESD_USB_OTG_PWR, 0);
1039 /* keep USB host1 VBUS always on */
1040 ret = gpio_request(SABRESD_USB_H1_PWR, "usb-h1-pwr");
1042 pr_err("failed to get GPIO SABRESD_USB_H1_PWR: %d\n",
1046 gpio_direction_output(SABRESD_USB_H1_PWR, 1);
1047 if (board_is_mx6_reva())
1048 mxc_iomux_set_gpr_register(1, 13, 1, 1);
1050 mxc_iomux_set_gpr_register(1, 13, 1, 0);
1052 mx6_set_otghost_vbus_func(imx6q_sabresd_usbotg_vbus);
1057 /* HW Initialization, if return 0, initialization is successful. */
1058 static int mx6q_sabresd_sata_init(struct device *dev, void __iomem *addr)
1064 sata_clk = clk_get(dev, "imx_sata_clk");
1065 if (IS_ERR(sata_clk)) {
1066 dev_err(dev, "no sata clock.\n");
1067 return PTR_ERR(sata_clk);
1069 ret = clk_enable(sata_clk);
1071 dev_err(dev, "can't enable sata clock.\n");
1075 /* Set PHY Paremeters, two steps to configure the GPR13,
1076 * one write for rest of parameters, mask of first write is 0x07FFFFFD,
1077 * and the other one write for setting the mpll_clk_off_b
1078 *.rx_eq_val_0(iomuxc_gpr13[26:24]),
1079 *.los_lvl(iomuxc_gpr13[23:19]),
1080 *.rx_dpll_mode_0(iomuxc_gpr13[18:16]),
1081 *.sata_speed(iomuxc_gpr13[15]),
1082 *.mpll_ss_en(iomuxc_gpr13[14]),
1083 *.tx_atten_0(iomuxc_gpr13[13:11]),
1084 *.tx_boost_0(iomuxc_gpr13[10:7]),
1085 *.tx_lvl(iomuxc_gpr13[6:2]),
1086 *.mpll_ck_off(iomuxc_gpr13[1]),
1087 *.tx_edgerate_0(iomuxc_gpr13[0]),
1089 tmpdata = readl(IOMUXC_GPR13);
1090 writel(((tmpdata & ~0x07FFFFFD) | 0x0593A044), IOMUXC_GPR13);
1092 /* enable SATA_PHY PLL */
1093 tmpdata = readl(IOMUXC_GPR13);
1094 writel(((tmpdata & ~0x2) | 0x2), IOMUXC_GPR13);
1096 /* Get the AHB clock rate, and configure the TIMER1MS reg later */
1097 clk = clk_get(NULL, "ahb");
1099 dev_err(dev, "no ahb clock.\n");
1101 goto release_sata_clk;
1103 tmpdata = clk_get_rate(clk) / 1000;
1106 ret = sata_init(addr, tmpdata);
1111 clk_disable(sata_clk);
1118 static void mx6q_sabresd_sata_exit(struct device *dev)
1120 clk_disable(sata_clk);
1124 static struct ahci_platform_data mx6q_sabresd_sata_data = {
1125 .init = mx6q_sabresd_sata_init,
1126 .exit = mx6q_sabresd_sata_exit,
1129 static void mx6q_sabresd_flexcan0_switch(int enable)
1132 gpio_set_value(SABRESD_CAN1_STBY, 1);
1134 gpio_set_value(SABRESD_CAN1_STBY, 0);
1138 static const struct flexcan_platform_data
1139 mx6q_sabresd_flexcan0_pdata __initconst = {
1140 .transceiver_switch = mx6q_sabresd_flexcan0_switch,
1143 static struct viv_gpu_platform_data imx6q_gpu_pdata __initdata = {
1144 .reserved_mem_size = SZ_128M,
1147 static struct imx_asrc_platform_data imx_asrc_data = {
1152 static struct ipuv3_fb_platform_data sabresd_fb_data[] = {
1155 .interface_pix_fmt = IPU_PIX_FMT_RGB666,
1156 .mode_str = "LDB-XGA",
1161 .interface_pix_fmt = IPU_PIX_FMT_RGB666,
1162 .mode_str = "LDB-XGA",
1167 .interface_pix_fmt = IPU_PIX_FMT_RGB565,
1168 .mode_str = "CLAA-WVGA",
1173 .interface_pix_fmt = IPU_PIX_FMT_RGB666,
1174 .mode_str = "LDB-VGA",
1180 static void hdmi_init(int ipu_id, int disp_id)
1182 int hdmi_mux_setting;
1184 if ((ipu_id > 1) || (ipu_id < 0)) {
1185 pr_err("Invalid IPU select for HDMI: %d. Set to 0\n", ipu_id);
1189 if ((disp_id > 1) || (disp_id < 0)) {
1190 pr_err("Invalid DI select for HDMI: %d. Set to 0\n", disp_id);
1194 /* Configure the connection between IPU1/2 and HDMI */
1195 hdmi_mux_setting = 2*ipu_id + disp_id;
1197 /* GPR3, bits 2-3 = HDMI_MUX_CTL */
1198 mxc_iomux_set_gpr_register(3, 2, 2, hdmi_mux_setting);
1201 static struct fsl_mxc_hdmi_platform_data hdmi_data = {
1205 static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {
1210 static struct fsl_mxc_lcd_platform_data lcdif_data = {
1213 .default_ifmt = IPU_PIX_FMT_RGB565,
1216 static struct fsl_mxc_ldb_platform_data ldb_data = {
1225 static struct max8903_pdata charger1_data = {
1226 .dok = SABRESD_CHARGE_DOK_B,
1227 .uok = SABRESD_CHARGE_UOK_B,
1228 .chg = SABRESD_CHARGE_CHG_1_B,
1229 .flt = SABRESD_CHARGE_FLT_1_B,
1230 .dcm_always_high = true,
1235 static struct platform_device sabresd_max8903_charger_1 = {
1236 .name = "max8903-charger",
1239 .platform_data = &charger1_data,
1243 static struct imx_ipuv3_platform_data ipu_data[] = {
1246 .csi_clk[0] = "clko_clk",
1249 .csi_clk[0] = "clko_clk",
1253 static void sabresd_suspend_enter(void)
1255 /* suspend preparation */
1256 /* Disable AUX 5V */
1257 gpio_set_value(SABRESD_AUX_5V_EN, 0);
1260 static void sabresd_suspend_exit(void)
1262 /* resume restore */
1264 gpio_set_value(SABRESD_AUX_5V_EN, 1);
1266 static const struct pm_platform_data mx6q_sabresd_pm_data __initconst = {
1268 .suspend_enter = sabresd_suspend_enter,
1269 .suspend_exit = sabresd_suspend_exit,
1272 static struct regulator_consumer_supply sabresd_vmmc_consumers[] = {
1273 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"),
1274 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.2"),
1275 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.3"),
1278 static struct regulator_init_data sabresd_vmmc_init = {
1279 .num_consumer_supplies = ARRAY_SIZE(sabresd_vmmc_consumers),
1280 .consumer_supplies = sabresd_vmmc_consumers,
1283 static struct fixed_voltage_config sabresd_vmmc_reg_config = {
1284 .supply_name = "vmmc",
1285 .microvolts = 3300000,
1287 .init_data = &sabresd_vmmc_init,
1290 static struct platform_device sabresd_vmmc_reg_devices = {
1291 .name = "reg-fixed-voltage",
1294 .platform_data = &sabresd_vmmc_reg_config,
1298 static int __init imx6q_init_audio(void)
1300 if (board_is_mx6_reva()) {
1301 mxc_register_device(&mx6_sabresd_audio_wm8958_device,
1303 imx6q_add_imx_ssi(1, &mx6_sabresd_ssi_pdata);
1307 platform_device_register(&sabresd_vwm8962_reg_devices);
1308 mxc_register_device(&mx6_sabresd_audio_wm8962_device,
1310 imx6q_add_imx_ssi(1, &mx6_sabresd_ssi_pdata);
1318 static void gps_power_on(bool on)
1320 /* Enable/disable aux_3v15 */
1321 gpio_request(SABRESD_AUX_3V15_EN, "aux_3v15_en");
1322 gpio_direction_output(SABRESD_AUX_3V15_EN, 1);
1323 gpio_set_value(SABRESD_AUX_3V15_EN, on);
1324 gpio_free(SABRESD_AUX_3V15_EN);
1325 /*Enable/disable gps_en*/
1326 gpio_request(SABRESD_GPS_EN, "gps_en");
1327 gpio_direction_output(SABRESD_GPS_EN, 1);
1328 gpio_set_value(SABRESD_GPS_EN, on);
1329 gpio_free(SABRESD_GPS_EN);
1332 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1333 #define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \
1338 .active_low = act_low, \
1339 .desc = "btn " descr, \
1343 static struct gpio_keys_button imx6q_buttons[] = {
1344 GPIO_BUTTON(SABRESD_VOLUME_UP, KEY_VOLUMEUP, 1, "volume-up", 0),
1345 GPIO_BUTTON(SABRESD_VOLUME_DN, KEY_VOLUMEDOWN, 1, "volume-down", 0),
1346 GPIO_BUTTON(SABRESD_POWER_OFF, KEY_POWER, 1, "power", 1),
1349 static struct gpio_keys_platform_data imx6q_button_data = {
1350 .buttons = imx6q_buttons,
1351 .nbuttons = ARRAY_SIZE(imx6q_buttons),
1354 static struct platform_device imx6q_button_device = {
1355 .name = "gpio-keys",
1359 .platform_data = &imx6q_button_data,
1363 static void __init imx6q_add_device_buttons(void)
1365 platform_device_register(&imx6q_button_device);
1368 static void __init imx6q_add_device_buttons(void) {}
1371 static struct platform_pwm_backlight_data mx6_sabresd_pwm_backlight_data = {
1373 .max_brightness = 255,
1374 .dft_brightness = 128,
1375 .pwm_period_ns = 50000,
1378 static struct mxc_dvfs_platform_data sabresd_dvfscore_data = {
1379 .reg_id = "cpu_vddgp",
1380 .clk1_id = "cpu_clk",
1381 .clk2_id = "gpc_dvfs_clk",
1382 .gpc_cntr_offset = MXC_GPC_CNTR_OFFSET,
1383 .ccm_cdcr_offset = MXC_CCM_CDCR_OFFSET,
1384 .ccm_cacrr_offset = MXC_CCM_CACRR_OFFSET,
1385 .ccm_cdhipr_offset = MXC_CCM_CDHIPR_OFFSET,
1386 .prediv_mask = 0x1F800,
1387 .prediv_offset = 11,
1389 .div3ck_mask = 0xE0000000,
1390 .div3ck_offset = 29,
1401 static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
1402 char **cmdline, struct meminfo *mi)
1406 static struct mipi_csi2_platform_data mipi_csi2_pdata = {
1411 .dphy_clk = "mipi_pllref_clk",
1412 .pixel_clk = "emi_clk",
1416 * Board specific initialization.
1418 static void __init mx6_sabresd_board_init(void)
1423 struct clk *new_parent;
1427 mxc_iomux_v3_setup_multiple_pads(mx6q_sabresd_pads,
1428 ARRAY_SIZE(mx6q_sabresd_pads));
1429 else if (cpu_is_mx6dl())
1430 mxc_iomux_v3_setup_multiple_pads(mx6dl_sabresd_pads,
1431 ARRAY_SIZE(mx6dl_sabresd_pads));
1433 #ifdef CONFIG_FEC_1588
1434 /* Set GPIO_16 input for IEEE-1588 ts_clk and RMII reference clock
1435 * For MX6 GPR1 bit21 meaning:
1436 * Bit21: 0 - GPIO_16 pad output
1437 * 1 - GPIO_16 pad input
1439 mxc_iomux_set_gpr_register(1, 21, 1, 1);
1442 gp_reg_id = sabresd_dvfscore_data.reg_id;
1443 mx6q_sabresd_init_uart();
1446 * MX6DL/Solo only supports single IPU
1447 * The following codes are used to change ipu id
1448 * and display id information for MX6DL/Solo. Then
1449 * register 1 IPU device and up to 2 displays for
1452 if (cpu_is_mx6dl()) {
1453 ldb_data.ipu_id = 0;
1454 ldb_data.disp_id = 0;
1455 ldb_data.sec_ipu_id = 0;
1456 ldb_data.sec_disp_id = 1;
1457 hdmi_core_data.disp_id = 1;
1459 imx6q_add_mxc_hdmi_core(&hdmi_core_data);
1461 imx6q_add_ipuv3(0, &ipu_data[0]);
1462 if (cpu_is_mx6q()) {
1463 imx6q_add_ipuv3(1, &ipu_data[1]);
1464 for (i = 0; i < ARRAY_SIZE(sabresd_fb_data); i++)
1465 imx6q_add_ipuv3fb(i, &sabresd_fb_data[i]);
1467 for (i = 0; i < (ARRAY_SIZE(sabresd_fb_data) + 1) / 2; i++)
1468 imx6q_add_ipuv3fb(i, &sabresd_fb_data[i]);
1470 imx6q_add_lcdif(&lcdif_data);
1471 imx6q_add_ldb(&ldb_data);
1472 imx6q_add_v4l2_output(0);
1473 imx6q_add_v4l2_capture(0);
1474 imx6q_add_mipi_csi2(&mipi_csi2_pdata);
1475 imx6q_add_imx_snvs_rtc();
1477 if (board_is_mx6_reva()) {
1478 strcpy(mxc_i2c0_board_info[0].type, "wm8958");
1479 mxc_i2c0_board_info[0].platform_data = &wm8958_pdata;
1481 strcpy(mxc_i2c0_board_info[0].type, "wm8962");
1483 imx6q_add_imx_i2c(0, &mx6q_sabresd_i2c_data);
1484 imx6q_add_imx_i2c(1, &mx6q_sabresd_i2c_data);
1485 imx6q_add_imx_i2c(2, &mx6q_sabresd_i2c_data);
1486 i2c_register_board_info(0, mxc_i2c0_board_info,
1487 ARRAY_SIZE(mxc_i2c0_board_info));
1488 i2c_register_board_info(1, mxc_i2c1_board_info,
1489 ARRAY_SIZE(mxc_i2c1_board_info));
1490 i2c_register_board_info(2, mxc_i2c2_board_info,
1491 ARRAY_SIZE(mxc_i2c2_board_info));
1492 ret = gpio_request(SABRESD_PFUZE_INT, "pFUZE-int");
1494 printk(KERN_ERR"request pFUZE-int error!!\n");
1497 gpio_direction_input(SABRESD_PFUZE_INT);
1498 mx6q_sabresd_init_pfuze100(SABRESD_PFUZE_INT);
1502 imx6q_add_ecspi(0, &mx6q_sabresd_spi_data);
1505 imx6q_add_mxc_hdmi(&hdmi_data);
1507 imx6q_add_anatop_thermal_imx(1, &mx6q_sabresd_anatop_thermal_data);
1508 imx6_init_fec(fec_data);
1509 imx6q_add_pm_imx(0, &mx6q_sabresd_pm_data);
1511 /* Move sd4 to first because sd4 connect to emmc.
1512 Mfgtools want emmc is mmcblk0 and other sd card is mmcblk1.
1514 imx6q_add_sdhci_usdhc_imx(3, &mx6q_sabresd_sd4_data);
1515 imx6q_add_sdhci_usdhc_imx(1, &mx6q_sabresd_sd2_data);
1516 imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabresd_sd3_data);
1517 imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
1518 imx6q_sabresd_init_usb();
1519 /* SATA is not supported by MX6DL/Solo */
1521 imx6q_add_ahci(0, &mx6q_sabresd_sata_data);
1524 platform_device_register(&sabresd_vmmc_reg_devices);
1525 imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
1526 imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
1527 imx6q_add_asrc(&imx_asrc_data);
1529 /* release USB Hub reset */
1530 gpio_set_value(SABRESD_USB_HUB_RESET, 1);
1532 imx6q_add_mxc_pwm(0);
1533 imx6q_add_mxc_pwm(1);
1534 imx6q_add_mxc_pwm(2);
1535 imx6q_add_mxc_pwm(3);
1536 imx6q_add_mxc_pwm_backlight(0, &mx6_sabresd_pwm_backlight_data);
1540 imx6q_add_imx2_wdt(0, NULL);
1543 imx6q_add_dvfs_core(&sabresd_dvfscore_data);
1544 mx6_cpu_regulator_init();
1546 imx6q_add_device_buttons();
1548 /* enable sensor 3v3 and 1v8 */
1549 gpio_request(SABRESD_SENSOR_EN, "sensor-en");
1550 gpio_direction_output(SABRESD_SENSOR_EN, 1);
1552 /* enable ecompass intr */
1553 gpio_request(SABRESD_eCOMPASS_INT, "ecompass-int");
1554 gpio_direction_input(SABRESD_eCOMPASS_INT);
1555 /* enable light sensor intr */
1556 gpio_request(SABRESD_ALS_INT, "als-int");
1557 gpio_direction_input(SABRESD_ALS_INT);
1559 imx6q_add_hdmi_soc();
1560 imx6q_add_hdmi_soc_dai();
1562 if (cpu_is_mx6dl()) {
1563 imx6dl_add_imx_pxp();
1564 imx6dl_add_imx_pxp_client();
1566 mxc_register_device(&max17135_sensor_device, NULL);
1567 imx6dl_add_imx_epdc(&epdc_data);
1571 ret = gpio_request_array(mx6q_sabresd_flexcan_gpios,
1572 ARRAY_SIZE(mx6q_sabresd_flexcan_gpios));
1574 pr_err("failed to request flexcan1-gpios: %d\n", ret);
1576 imx6q_add_flexcan0(&mx6q_sabresd_flexcan0_pdata);
1579 clko2 = clk_get(NULL, "clko2_clk");
1581 pr_err("can't get CLKO2 clock.\n");
1583 new_parent = clk_get(NULL, "osc_clk");
1584 if (!IS_ERR(new_parent)) {
1585 clk_set_parent(clko2, new_parent);
1586 clk_put(new_parent);
1588 rate = clk_round_rate(clko2, 24000000);
1589 clk_set_rate(clko2, rate);
1593 gpio_request(SABRESD_AUX_5V_EN, "aux_5v_en");
1594 gpio_direction_output(SABRESD_AUX_5V_EN, 1);
1595 gpio_set_value(SABRESD_AUX_5V_EN, 1);
1598 /* Register charger chips */
1599 platform_device_register(&sabresd_max8903_charger_1);
1602 extern void __iomem *twd_base;
1603 static void __init mx6_sabresd_timer_init(void)
1605 struct clk *uart_clk;
1606 #ifdef CONFIG_LOCAL_TIMERS
1607 twd_base = ioremap(LOCAL_TWD_ADDR, SZ_256);
1610 mx6_clocks_init(32768, 24000000, 0, 0);
1612 uart_clk = clk_get_sys("imx-uart.0", NULL);
1613 early_console_setup(UART1_BASE_ADDR, uart_clk);
1616 static struct sys_timer mx6_sabresd_timer = {
1617 .init = mx6_sabresd_timer_init,
1620 static void __init mx6q_sabresd_reserve(void)
1624 if (imx6q_gpu_pdata.reserved_mem_size) {
1625 phys = memblock_alloc_base(imx6q_gpu_pdata.reserved_mem_size,
1627 memblock_free(phys, imx6q_gpu_pdata.reserved_mem_size);
1628 memblock_remove(phys, imx6q_gpu_pdata.reserved_mem_size);
1629 imx6q_gpu_pdata.reserved_mem_base = phys;
1634 * initialize __mach_desc_MX6Q_SABRESD data structure.
1636 MACHINE_START(MX6Q_SABRESD, "Freescale i.MX 6Quad/DualLite/Solo Sabre-SD Board")
1637 /* Maintainer: Freescale Semiconductor, Inc. */
1638 .boot_params = MX6_PHYS_OFFSET + 0x100,
1639 .fixup = fixup_mxc_board,
1640 .map_io = mx6_map_io,
1641 .init_irq = mx6_init_irq,
1642 .init_machine = mx6_sabresd_board_init,
1643 .timer = &mx6_sabresd_timer,
1644 .reserve = mx6q_sabresd_reserve,