2 * Copyright (C) 2013 by Oliver Wendt <OW@KARO-electronics.de>
4 * based on: arch/arm/mach-mx6/board-mx6q_sabresd.c
5 * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 #include <linux/types.h>
23 #include <linux/sched.h>
24 #include <linux/delay.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/init.h>
29 #include <linux/input.h>
30 #include <linux/nodemask.h>
31 #include <linux/clk.h>
32 #include <linux/platform_device.h>
33 #include <linux/fsl_devices.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/flash.h>
36 #include <linux/i2c.h>
37 #include <linux/ata.h>
38 #include <linux/mtd/mtd.h>
39 #include <linux/mtd/map.h>
40 #include <linux/mtd/partitions.h>
41 #include <linux/regulator/consumer.h>
42 #include <linux/pmic_external.h>
43 #include <linux/pmic_status.h>
44 #include <linux/ipu.h>
45 #include <linux/mxcfb.h>
46 #include <linux/pwm_backlight.h>
47 #include <linux/fec.h>
48 #include <linux/memblock.h>
49 #include <linux/gpio.h>
50 #include <linux/etherdevice.h>
51 #include <linux/regulator/anatop-regulator.h>
52 #include <linux/regulator/consumer.h>
53 #include <linux/regulator/machine.h>
54 #include <linux/regulator/fixed.h>
55 #include <linux/input/edt-ft5x06.h>
56 #include <linux/i2c/tsc2007.h>
58 #include <mach/common.h>
59 #include <mach/hardware.h>
60 #include <mach/mxc_dvfs.h>
61 #include <mach/memory.h>
62 #include <mach/iomux-mx6q.h>
63 #include <mach/imx-uart.h>
64 #include <mach/viv_gpu.h>
65 #include <mach/ipu-v3.h>
66 #include <mach/mxc_asrc.h>
69 #include <asm/setup.h>
70 #include <asm/mach-types.h>
71 #include <asm/mach/arch.h>
72 #include <asm/mach/time.h>
75 #include "devices-imx6q.h"
77 #include "cpu_op-mx6.h"
79 #define TX6_USBH1_PWR_EN IMX_GPIO_NR(3, 31)
81 #define TX6_SD1_CD IMX_GPIO_NR(7, 2)
82 #define TX6_SD2_CD IMX_GPIO_NR(7, 3)
84 #define TX6_ECSPI1_CS0 IMX_GPIO_NR(2, 30)
85 #define TX6_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
87 #define TX6_PCIE_PWR_EN IMX_GPIO_NR(3, 19)
88 #define TX6_USB_OTG_PWR IMX_GPIO_NR(1, 7)
89 #define TX6_USB_H1_PWR IMX_GPIO_NR(3, 31)
90 #define TX6_DISP_RST_B IMX_GPIO_NR(3, 29)
91 #define TX6_DISP_PWR_EN IMX_GPIO_NR(2, 31)
93 #define TX6_FEC_PHY_RST_B IMX_GPIO_NR(7, 6)
94 #define TX6_FEC_PHY_PWR_EN IMX_GPIO_NR(3, 20)
97 #define EDT_FT5X06_IRQ_PIN IMX_GPIO_NR(6, 15)
98 #define EDT_FT5X06_RESET_PIN IMX_GPIO_NR(2, 22)
99 #define EDT_FT5X06_WAKE_PIN IMX_GPIO_NR(2, 21)
101 #define TX6_FLEXCAN_XCVR_SW IMX_GPIO_NR(4, 21)
102 #define TX6_TSC2007_PEN_GPIO IMX_GPIO_NR(3, 26)
103 #define TX6_STK5_LED_GPIO IMX_GPIO_NR(2, 20)
104 #define TX6_BACKLIGHT_GPIO IMX_GPIO_NR(1, 1)
106 static struct clk *clko;
107 static int enable_lcd_ldb;
109 extern char *gp_reg_id;
110 extern char *soc_reg_id;
111 extern char *pu_reg_id;
113 static const struct esdhc_platform_data mx6q_tx6_sd1_data __initconst = {
114 .cd_gpio = TX6_SD1_CD,
116 .keep_power_at_suspend = 1,
119 .cd_type = ESDHC_CD_GPIO,
122 static const struct esdhc_platform_data mx6q_tx6_sd2_data __initconst = {
123 .cd_gpio = TX6_SD2_CD,
125 .keep_power_at_suspend = 1,
128 .cd_type = ESDHC_CD_GPIO,
131 static iomux_v3_cfg_t tx6_gpmi_nand_pads[] __initdata = {
132 MX6Q_PAD_NANDF_CLE__RAWNAND_CLE,
133 MX6Q_PAD_NANDF_ALE__RAWNAND_ALE,
134 MX6Q_PAD_NANDF_CS0__RAWNAND_CE0N,
135 MX6Q_PAD_NANDF_RB0__RAWNAND_READY0,
136 MX6Q_PAD_NANDF_D0__RAWNAND_D0,
137 MX6Q_PAD_NANDF_D1__RAWNAND_D1,
138 MX6Q_PAD_NANDF_D2__RAWNAND_D2,
139 MX6Q_PAD_NANDF_D3__RAWNAND_D3,
140 MX6Q_PAD_NANDF_D4__RAWNAND_D4,
141 MX6Q_PAD_NANDF_D5__RAWNAND_D5,
142 MX6Q_PAD_NANDF_D6__RAWNAND_D6,
143 MX6Q_PAD_NANDF_D7__RAWNAND_D7,
144 MX6Q_PAD_SD4_CMD__RAWNAND_RDN,
145 MX6Q_PAD_SD4_CLK__RAWNAND_WRN,
146 MX6Q_PAD_NANDF_WP_B__RAWNAND_RESETN,
149 static int __init gpmi_nand_platform_init(void)
151 return mxc_iomux_v3_setup_multiple_pads(tx6_gpmi_nand_pads,
152 ARRAY_SIZE(tx6_gpmi_nand_pads));
155 static const struct gpmi_nand_platform_data
156 mx6q_gpmi_nand_platform_data __initconst = {
157 .platform_init = gpmi_nand_platform_init,
158 .min_prop_delay_in_ns = 5,
159 .max_prop_delay_in_ns = 9,
164 static const struct anatop_thermal_platform_data
165 mx6q_tx6_anatop_thermal_data __initconst = {
166 .name = "anatop_thermal",
169 static inline void mx6q_tx6_init_uart(void)
171 imx6q_add_imx_uart(0, NULL);
172 imx6q_add_imx_uart(1, NULL);
173 imx6q_add_imx_uart(2, NULL);
176 static int mx6q_tx6_fec_phy_init(struct phy_device *phydev)
178 gpio_request_one(TX6_FEC_PHY_PWR_EN, GPIOF_OUT_INIT_HIGH, "fec_phy_pwr_en");
180 gpio_request_one(TX6_FEC_PHY_RST_B, GPIOF_OUT_INIT_LOW, "fec_phy_reset_B");
182 gpio_set_value(TX6_FEC_PHY_RST_B, 1);
187 static struct fec_platform_data fec_data __initdata = {
188 .init = mx6q_tx6_fec_phy_init,
189 .phy = PHY_INTERFACE_MODE_RMII,
192 static int mx6q_tx6_spi_cs[] = {
197 static const struct spi_imx_master mx6q_tx6_spi_data __initconst = {
198 .chipselect = mx6q_tx6_spi_cs,
199 .num_chipselect = ARRAY_SIZE(mx6q_tx6_spi_cs),
202 static struct spi_board_info tx6_spi_board_info[] __initdata = {
204 .modalias = "spidev",
205 .max_speed_hz = 54000000,
210 .modalias = "spidev",
211 .max_speed_hz = 54000000,
217 static struct mxc_audio_platform_data mx6_tx6_audio_data;
219 static int mx6_tx6_sgtl5000_init(void)
222 struct clk *new_parent;
225 clko = clk_get(NULL, "clko_clk");
227 pr_err("can't get CLKO clock.\n");
228 return PTR_ERR(clko);
230 new_parent = clk_get(NULL, "ahb");
231 if (!IS_ERR(new_parent)) {
232 ret = clk_set_parent(clko, new_parent);
235 pr_err("Failed to set CLKO parent to AHB\n");
239 rate = clk_round_rate(clko, 16000000);
240 if (rate < 8000000 || rate > 27000000) {
241 pr_err("Error:SGTL5000 mclk freq %d out of range!\n", rate);
246 mx6_tx6_audio_data.sysclk = 26000000;
247 ret = clk_set_rate(clko, rate);
249 pr_err("Failed to set CLKO rate to %u.%03uMHz\n",
250 mx6_tx6_audio_data.sysclk / 1000000,
251 mx6_tx6_audio_data.sysclk / 1000 % 1000);
255 ret = clk_enable(clko);
257 pr_err("Failed to enable CLKO clock: %d\n", ret);
268 static int mx6_tx6_sgtl5000_exit(void)
277 static struct imx_ssi_platform_data mx6_tx6_ssi_pdata = {
278 .flags = IMX_SSI_DMA | IMX_SSI_SYN,
281 static struct mxc_audio_platform_data mx6_tx6_audio_data = {
285 .init = mx6_tx6_sgtl5000_init,
286 .finit = mx6_tx6_sgtl5000_exit,
290 static struct platform_device mx6_tx6_audio_device = {
291 .name = "imx-sgtl5000",
294 /* Multitouch controller */
295 #if defined(CONFIG_TOUCHSCREEN_EDT_FT5X06) || \
296 defined(CONFIG_TOUCHSCREEN_EDT_FT5X06_MODULE)
298 static struct edt_ft5x06_platform_data edt_ft5x06_pdata = {
299 .irq_pin = EDT_FT5X06_IRQ_PIN,
300 .reset_pin = EDT_FT5X06_RESET_PIN,
301 /* wakeup added - thou not really implemented in driver yet */
302 .wakeup_pin = EDT_FT5X06_WAKE_PIN,
305 static inline void __init imx6q_tx6_init_edt_ft5x06(void)
309 ret = gpio_request_one(EDT_FT5X06_WAKE_PIN, GPIOF_OUT_INIT_LOW,
310 "edt-ft5x06-wake_up");
312 pr_err("edt-ft5x06: failed to get GPIO EDT_FT5X06_WAKE_PIN: %d\n",
316 pr_info("edt-ft5x06: wake-up pin requesting: GPIO-%d \n",
317 EDT_FT5X06_WAKE_PIN);
319 gpio_set_value(EDT_FT5X06_WAKE_PIN, 1);
323 static int tx6_tsc2007_get_pendown_state(void)
325 return !gpio_get_value(TX6_TSC2007_PEN_GPIO);
328 static int tx6_tsc2007_plat_init(void)
330 return gpio_request_one(TX6_TSC2007_PEN_GPIO, GPIOF_IN, "TSC2007 PENDETECT");
333 static void tx6_tsc2007_plat_exit(void)
335 gpio_free(TX6_TSC2007_PEN_GPIO);
338 static struct tsc2007_platform_data tx6_tsc2007_pdata = {
340 .get_pendown_state = tx6_tsc2007_get_pendown_state,
341 .init_platform_hw = tx6_tsc2007_plat_init,
342 .exit_platform_hw = tx6_tsc2007_plat_exit,
345 static struct imxi2c_platform_data mx6q_tx6_i2c_data = {
349 static struct i2c_board_info mxc_i2c0_board_info[] __initdata = {
351 I2C_BOARD_INFO("ds1339", 0x68),
355 static struct i2c_board_info mxc_i2c2_board_info[] __initdata = {
357 I2C_BOARD_INFO("sgtl5000", 0x0a),
360 I2C_BOARD_INFO("tsc2007", 0x48),
361 .platform_data = &tx6_tsc2007_pdata,
362 .irq = gpio_to_irq(TX6_TSC2007_PEN_GPIO),
364 #if defined(CONFIG_TOUCHSCREEN_EDT_FT5X06) || \
365 defined(CONFIG_TOUCHSCREEN_EDT_FT5X06_MODULE)
367 I2C_BOARD_INFO("edt-ft5x06", 0x38),
368 .platform_data = &edt_ft5x06_pdata,
369 .irq = gpio_to_irq(EDT_FT5X06_IRQ_PIN),
371 #endif /* EDT_FT5X06 */
374 static void imx6q_tx6_usbotg_vbus(bool on)
377 gpio_set_value(TX6_USB_OTG_PWR, 1);
379 gpio_set_value(TX6_USB_OTG_PWR, 0);
382 static void imx6q_tx6_usbh1_vbus(bool on)
385 gpio_set_value(TX6_USB_H1_PWR, 1);
387 gpio_set_value(TX6_USB_H1_PWR, 0);
390 static void __init imx6q_tx6_init_usb(void)
394 imx_otg_base = MX6_IO_ADDRESS(MX6Q_USB_OTG_BASE_ADDR);
396 ret = gpio_request_one(TX6_USB_OTG_PWR, GPIOF_OUT_INIT_LOW, "usb-pwr");
398 pr_err("failed to get GPIO TX6_USB_OTG_PWR: %d\n",
402 mx6_set_otghost_vbus_func(imx6q_tx6_usbotg_vbus);
404 ret = gpio_request_one(TX6_USB_H1_PWR, GPIOF_OUT_INIT_LOW, "usb-h1-pwr");
406 pr_err("failed to get GPIO TX6_USB_H1_PWR: %d\n",
411 mx6_set_host1_vbus_func(imx6q_tx6_usbh1_vbus);
414 #include <asm/bitops.h>
415 static void mx6q_tx6_flexcan_switch(int id, int enable)
417 static unsigned long flexcan_enable;
419 if (id < 0 || id > 1)
423 gpio_set_value(TX6_FLEXCAN_XCVR_SW, 0);
424 set_bit(id, &flexcan_enable);
426 clear_bit(id, &flexcan_enable);
428 gpio_set_value(TX6_FLEXCAN_XCVR_SW, 1);
432 static void mx6q_tx6_flexcan0_switch(int enable)
434 mx6q_tx6_flexcan_switch(0, enable);
437 static void mx6q_tx6_flexcan1_switch(int enable)
439 mx6q_tx6_flexcan_switch(1, enable);
442 static const struct flexcan_platform_data
443 mx6q_tx6_flexcan_pdata[] __initconst = {
445 .transceiver_switch = mx6q_tx6_flexcan0_switch,
448 .transceiver_switch = mx6q_tx6_flexcan1_switch,
452 static int __init tx6_flexcan_init(void)
456 ret = gpio_request_one(TX6_FLEXCAN_XCVR_SW, GPIOF_OUT_INIT_HIGH, "Flexcan XCVR");
460 static struct viv_gpu_platform_data imx6q_gpu_pdata __initdata = {
461 .reserved_mem_size = SZ_128M,
464 static struct imx_asrc_platform_data imx_asrc_data = {
469 static struct ipuv3_fb_platform_data tx6_fb_data[] = {
472 .interface_pix_fmt = IPU_PIX_FMT_RGB24,
473 .mode_str = "VGA-XGA",
478 .interface_pix_fmt = IPU_PIX_FMT_RGB666,
479 .mode_str = "LDB-XGA",
484 .interface_pix_fmt = IPU_PIX_FMT_RGB666,
485 .mode_str = "LDB-VGA",
491 static struct fsl_mxc_lcd_platform_data lcdif_data = {
494 .default_ifmt = IPU_PIX_FMT_RGB565,
497 static struct fsl_mxc_ldb_platform_data ldb_data = {
506 static struct imx_ipuv3_platform_data ipu_data[] = {
509 .csi_clk[0] = "clko_clk",
512 .csi_clk[0] = "clko_clk",
516 static void tx6_suspend_enter(void)
518 /* suspend preparation */
522 static void tx6_suspend_exit(void)
527 static const struct pm_platform_data mx6q_tx6_pm_data __initconst = {
529 .suspend_enter = tx6_suspend_enter,
530 .suspend_exit = tx6_suspend_exit,
533 #if defined(CONFIG_SND_SOC_SGTL5000) || defined(CONFIG_SND_SOC_SGTL5000_MODULE)
534 static struct regulator_consumer_supply sgtl5000_tx6_consumer_vdda = {
536 .dev_name = "2-000a",
539 static struct regulator_consumer_supply sgtl5000_tx6_consumer_vddio = {
541 .dev_name = "2-000a",
544 static struct regulator_consumer_supply sgtl5000_tx6_consumer_vddd = {
546 .dev_name = "2-000a",
549 static struct regulator_init_data sgtl5000_tx6_vdda_reg_initdata = {
550 .num_consumer_supplies = 1,
551 .consumer_supplies = &sgtl5000_tx6_consumer_vdda,
554 static struct regulator_init_data sgtl5000_tx6_vddio_reg_initdata = {
555 .num_consumer_supplies = 1,
556 .consumer_supplies = &sgtl5000_tx6_consumer_vddio,
559 static struct regulator_init_data sgtl5000_tx6_vddd_reg_initdata = {
560 .num_consumer_supplies = 1,
561 .consumer_supplies = &sgtl5000_tx6_consumer_vddd,
564 static struct fixed_voltage_config sgtl5000_tx6_vdda_reg_config = {
565 .supply_name = "VDDA",
566 .microvolts = 2500000,
568 .init_data = &sgtl5000_tx6_vdda_reg_initdata,
571 static struct fixed_voltage_config sgtl5000_tx6_vddio_reg_config = {
572 .supply_name = "VDDIO",
573 .microvolts = 3300000,
575 .init_data = &sgtl5000_tx6_vddio_reg_initdata,
578 static struct fixed_voltage_config sgtl5000_tx6_vddd_reg_config = {
579 .supply_name = "VDDD",
580 .microvolts = 1200000,
582 .init_data = &sgtl5000_tx6_vddd_reg_initdata,
585 static struct platform_device sgtl5000_tx6_vdda_reg_devices = {
586 .name = "reg-fixed-voltage",
589 .platform_data = &sgtl5000_tx6_vdda_reg_config,
593 static struct platform_device sgtl5000_tx6_vddio_reg_devices = {
594 .name = "reg-fixed-voltage",
597 .platform_data = &sgtl5000_tx6_vddio_reg_config,
601 static struct platform_device sgtl5000_tx6_vddd_reg_devices = {
602 .name = "reg-fixed-voltage",
605 .platform_data = &sgtl5000_tx6_vddd_reg_config,
609 #endif /* CONFIG_SND_SOC_SGTL5000 */
611 static int imx6q_init_audio(void)
613 mxc_register_device(&mx6_tx6_audio_device,
614 &mx6_tx6_audio_data);
615 imx6q_add_imx_ssi(1, &mx6_tx6_ssi_pdata);
616 #if defined(CONFIG_SND_SOC_SGTL5000) || defined(CONFIG_SND_SOC_SGTL5000_MODULE)
617 platform_device_register(&sgtl5000_tx6_vdda_reg_devices);
618 platform_device_register(&sgtl5000_tx6_vddio_reg_devices);
619 platform_device_register(&sgtl5000_tx6_vddd_reg_devices);
624 static struct gpio_led tx6_gpio_leds[] = {
627 .gpio = TX6_STK5_LED_GPIO,
628 .default_trigger = "heartbeat",
632 static struct gpio_led_platform_data tx6_gpio_leds_data = {
633 .leds = tx6_gpio_leds,
634 .num_leds = ARRAY_SIZE(tx6_gpio_leds),
637 static struct platform_device tx6_gpio_led_device = {
642 .platform_data = &tx6_gpio_leds_data,
646 static struct resource tx6_pwm_resource[] __initdata = {
648 .start = MX6Q_PWM2_BASE_ADDR,
649 .end = MX6Q_PWM2_BASE_ADDR + SZ_16K - 1,
650 .flags = IORESOURCE_MEM,
653 .start = MX6Q_INT_PWM2,
654 .end = MX6Q_INT_PWM2,
655 .flags = IORESOURCE_IRQ,
659 static void tx6_enable_pwm_pad(void)
661 mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_1__PWM2_PWMO);
664 static void tx6_disable_pwm_pad(void)
666 mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_1__GPIO_1_1);
669 static const struct mxc_pwm_platform_data tx6_pwm_pdata __initconst = {
671 .enable_pwm_pad = tx6_enable_pwm_pad,
672 .disable_pwm_pad = tx6_disable_pwm_pad,
675 static struct platform_pwm_backlight_data tx6_pwm_backlight_data = {
677 .max_brightness = 100,
678 .dft_brightness = 100,
679 .pwm_period_ns = 50000,
682 static int __init tx6_pwm_register(void)
686 ret = gpio_request_one(TX6_BACKLIGHT_GPIO, GPIOF_OUT_INIT_HIGH,
691 if (!imx_add_platform_device("mxc_pwm", 1, tx6_pwm_resource,
692 ARRAY_SIZE(tx6_pwm_resource),
693 &tx6_pwm_pdata, sizeof(tx6_pwm_pdata)))
696 if (!imx6q_add_mxc_pwm_backlight(0, &tx6_pwm_backlight_data))
702 gpio_free(TX6_BACKLIGHT_GPIO);
706 static struct mxc_dvfs_platform_data tx6_dvfscore_data = {
707 #ifdef CONFIG_MX6_INTER_LDO_BYPASS
711 .reg_id = "cpu_vddgp",
712 .soc_id = "cpu_vddsoc",
713 .pu_id = "cpu_vddvpu",
715 .clk1_id = "cpu_clk",
716 .clk2_id = "gpc_dvfs_clk",
717 .gpc_cntr_offset = MXC_GPC_CNTR_OFFSET,
718 .ccm_cdcr_offset = MXC_CCM_CDCR_OFFSET,
719 .ccm_cacrr_offset = MXC_CCM_CACRR_OFFSET,
720 .ccm_cdhipr_offset = MXC_CCM_CDHIPR_OFFSET,
721 .prediv_mask = 0x1F800,
724 .div3ck_mask = 0xE0000000,
736 static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
737 char **cmdline, struct meminfo *mi)
741 static iomux_v3_cfg_t mx6q_tx6_pads[] = {
743 MX6Q_PAD_KEY_COL0__AUDMUX_AUD5_TXC,
744 MX6Q_PAD_KEY_ROW0__AUDMUX_AUD5_TXD,
745 MX6Q_PAD_KEY_COL1__AUDMUX_AUD5_TXFS,
746 MX6Q_PAD_KEY_ROW1__AUDMUX_AUD5_RXD,
749 MX6Q_PAD_KEY_COL4__CAN2_TXCAN,
750 MX6Q_PAD_KEY_ROW4__CAN2_RXCAN,
753 /* MX6Q_PAD_GPIO_0__CCM_CLKO, */ /* SGTL500 sys_mclk */
754 /* MX6Q_PAD_GPIO_3__CCM_CLKO2, */ /* J5 - Camera MCLK */
757 MX6Q_PAD_EIM_D16__ECSPI1_SCLK,
758 MX6Q_PAD_EIM_D18__ECSPI1_MOSI,
759 MX6Q_PAD_EIM_D17__ECSPI1_MISO,
762 MX6Q_PAD_ENET_MDIO__ENET_MDIO,
763 MX6Q_PAD_ENET_MDC__ENET_MDC,
764 MX6Q_PAD_ENET_RXD0__ENET_RDATA_0,
765 MX6Q_PAD_ENET_RXD1__ENET_RDATA_1,
766 MX6Q_PAD_ENET_RX_ER__ENET_RX_ER,
767 MX6Q_PAD_ENET_TX_EN__ENET_TX_EN,
768 MX6Q_PAD_ENET_TXD0__ENET_TDATA_0,
769 MX6Q_PAD_ENET_TXD1__ENET_TDATA_1,
770 MX6Q_PAD_ENET_CRS_DV__ENET_RX_EN,
771 MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
772 MX6Q_PAD_ENET_REF_CLK__GPIO_1_23, /* Connected to GPIO_16 on TX6 v1 */
773 MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT,
774 MX6Q_PAD_SD3_DAT4__GPIO_7_1, /* Phy Interrupt */
775 MX6Q_PAD_SD3_DAT2__GPIO_7_6, /* Phy reset */
776 MX6Q_PAD_EIM_D20__GPIO_3_20, /* Phy power */
789 MX6Q_PAD_EIM_D21__I2C1_SCL,
790 MX6Q_PAD_EIM_D28__I2C1_SDA,
795 MX6Q_PAD_GPIO_3__I2C3_SCL, /* GPIO1[3] */
796 MX6Q_PAD_GPIO_6__I2C3_SDA,
799 MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK,
800 MX6Q_PAD_DI0_PIN15__IPU1_DI0_PIN15, /* DE */
801 MX6Q_PAD_DI0_PIN2__IPU1_DI0_PIN2, /* HSync */
802 MX6Q_PAD_DI0_PIN3__IPU1_DI0_PIN3, /* VSync */
803 MX6Q_PAD_DI0_PIN4__IPU1_DI0_PIN4, /* Contrast */
804 MX6Q_PAD_DISP0_DAT0__IPU1_DISP0_DAT_0,
805 MX6Q_PAD_DISP0_DAT1__IPU1_DISP0_DAT_1,
806 MX6Q_PAD_DISP0_DAT2__IPU1_DISP0_DAT_2,
807 MX6Q_PAD_DISP0_DAT3__IPU1_DISP0_DAT_3,
808 MX6Q_PAD_DISP0_DAT4__IPU1_DISP0_DAT_4,
809 MX6Q_PAD_DISP0_DAT5__IPU1_DISP0_DAT_5,
810 MX6Q_PAD_DISP0_DAT6__IPU1_DISP0_DAT_6,
811 MX6Q_PAD_DISP0_DAT7__IPU1_DISP0_DAT_7,
812 MX6Q_PAD_DISP0_DAT8__IPU1_DISP0_DAT_8,
813 MX6Q_PAD_DISP0_DAT9__IPU1_DISP0_DAT_9,
814 MX6Q_PAD_DISP0_DAT10__IPU1_DISP0_DAT_10,
815 MX6Q_PAD_DISP0_DAT11__IPU1_DISP0_DAT_11,
816 MX6Q_PAD_DISP0_DAT12__IPU1_DISP0_DAT_12,
817 MX6Q_PAD_DISP0_DAT13__IPU1_DISP0_DAT_13,
818 MX6Q_PAD_DISP0_DAT14__IPU1_DISP0_DAT_14,
819 MX6Q_PAD_DISP0_DAT15__IPU1_DISP0_DAT_15,
820 MX6Q_PAD_DISP0_DAT16__IPU1_DISP0_DAT_16,
821 MX6Q_PAD_DISP0_DAT17__IPU1_DISP0_DAT_17,
822 MX6Q_PAD_DISP0_DAT18__IPU1_DISP0_DAT_18,
823 MX6Q_PAD_DISP0_DAT19__IPU1_DISP0_DAT_19,
824 MX6Q_PAD_DISP0_DAT20__IPU1_DISP0_DAT_20,
825 MX6Q_PAD_DISP0_DAT21__IPU1_DISP0_DAT_21,
826 MX6Q_PAD_DISP0_DAT22__IPU1_DISP0_DAT_22,
827 MX6Q_PAD_DISP0_DAT23__IPU1_DISP0_DAT_23,
828 MX6Q_PAD_EIM_D29__GPIO_3_29, /* Reset */
829 MX6Q_PAD_EIM_EB3__GPIO_2_31, /* Enable */
832 MX6Q_PAD_GPIO_1__PWM2_PWMO,
834 /* UART1 for debug */
835 MX6Q_PAD_SD3_DAT7__UART1_TXD,
836 MX6Q_PAD_SD3_DAT6__UART1_RXD,
841 MX6Q_PAD_EIM_D23__GPIO_3_23,
844 MX6Q_PAD_GPIO_7__GPIO_1_7,
845 MX6Q_PAD_EIM_D31__GPIO_3_31,
848 MX6Q_PAD_GPIO_8__GPIO_1_8,
849 MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC,
852 MX6Q_PAD_SD1_CLK__USDHC1_CLK,
853 MX6Q_PAD_SD1_CMD__USDHC1_CMD,
854 MX6Q_PAD_SD1_DAT0__USDHC1_DAT0,
855 MX6Q_PAD_SD1_DAT1__USDHC1_DAT1,
856 MX6Q_PAD_SD1_DAT2__USDHC1_DAT2,
857 MX6Q_PAD_SD1_DAT3__USDHC1_DAT3,
858 MX6Q_PAD_SD3_CMD__GPIO_7_2, /* SD1_CD */
861 MX6Q_PAD_SD2_CLK__USDHC2_CLK,
862 MX6Q_PAD_SD2_CMD__USDHC2_CMD,
863 MX6Q_PAD_SD2_DAT0__USDHC2_DAT0,
864 MX6Q_PAD_SD2_DAT1__USDHC2_DAT1,
865 MX6Q_PAD_SD2_DAT2__USDHC2_DAT2,
866 MX6Q_PAD_SD2_DAT3__USDHC2_DAT3,
867 MX6Q_PAD_SD3_CLK__GPIO_7_3, /* SD2_CD */
872 /* EDT-FT5x06 Polytouch */
873 #if defined(CONFIG_TOUCHSCREEN_EDT_FT5X06) || \
874 defined(CONFIG_TOUCHSCREEN_EDT_FT5X06_MODULE)
875 MX6Q_PAD_NANDF_CS2__GPIO_6_15, /* IRQ */
876 MX6Q_PAD_EIM_A16__GPIO_2_22, /* Reset */
877 MX6Q_PAD_EIM_A17__GPIO_2_21, /* Wake-Up */
881 #define SNVS_LPCR 0x38
882 static void mx6_snvs_poweroff(void)
885 void __iomem *mx6_snvs_base = MX6_IO_ADDRESS(MX6Q_SNVS_BASE_ADDR);
887 value = readl(mx6_snvs_base + SNVS_LPCR);
888 /*set TOP and DP_EN bit*/
889 writel(value | 0x60, mx6_snvs_base + SNVS_LPCR);
892 static int __init early_enable_lcd_ldb(char *p)
897 early_param("enable_lcd_ldb", early_enable_lcd_ldb);
900 * Board specific initialization.
902 static void __init tx6_board_init(void)
906 mxc_iomux_v3_setup_multiple_pads(mx6q_tx6_pads,
907 ARRAY_SIZE(mx6q_tx6_pads));
909 gp_reg_id = tx6_dvfscore_data.reg_id;
910 soc_reg_id = tx6_dvfscore_data.soc_id;
911 pu_reg_id = tx6_dvfscore_data.pu_id;
912 mx6q_tx6_init_uart();
914 imx6q_add_ipuv3(0, &ipu_data[0]);
916 imx6q_add_ipuv3(1, &ipu_data[1]);
917 for (i = 0; i < ARRAY_SIZE(tx6_fb_data); i++)
918 imx6q_add_ipuv3fb(i, &tx6_fb_data[i]);
920 for (i = 0; i < (ARRAY_SIZE(tx6_fb_data) + 1) / 2; i++)
921 imx6q_add_ipuv3fb(i, &tx6_fb_data[i]);
924 imx6q_add_lcdif(&lcdif_data);
925 imx6q_add_ldb(&ldb_data);
926 imx6q_add_v4l2_output(0);
927 imx6q_add_imx_snvs_rtc();
928 imx6q_tx6_init_edt_ft5x06();
930 imx6q_add_imx_caam();
932 platform_device_register(&tx6_gpio_led_device);
934 i2c_register_board_info(0, mxc_i2c0_board_info,
935 ARRAY_SIZE(mxc_i2c0_board_info));
936 i2c_register_board_info(2, mxc_i2c2_board_info,
937 ARRAY_SIZE(mxc_i2c2_board_info));
938 imx6q_add_imx_i2c(0, &mx6q_tx6_i2c_data);
939 imx6q_add_imx_i2c(2, &mx6q_tx6_i2c_data);
941 spi_register_board_info(tx6_spi_board_info,
942 ARRAY_SIZE(tx6_spi_board_info));
943 imx6q_add_ecspi(0, &mx6q_tx6_spi_data);
945 imx6q_add_anatop_thermal_imx(1, &mx6q_tx6_anatop_thermal_data);
946 imx6_init_fec(fec_data);
947 imx6q_add_pm_imx(0, &mx6q_tx6_pm_data);
949 imx6q_add_sdhci_usdhc_imx(0, &mx6q_tx6_sd1_data);
950 imx6q_add_sdhci_usdhc_imx(1, &mx6q_tx6_sd2_data);
951 imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
952 if (tx6_flexcan_init() == 0) {
953 imx6q_add_flexcan0(&mx6q_tx6_flexcan_pdata[0]);
954 imx6q_add_flexcan1(&mx6q_tx6_flexcan_pdata[1]);
956 imx6q_add_flexcan1(NULL);
958 imx6q_tx6_init_usb();
961 imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
962 imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
963 imx6q_add_asrc(&imx_asrc_data);
969 imx6q_add_imx2_wdt(0, NULL);
972 imx6q_add_gpmi(&mx6q_gpmi_nand_platform_data);
974 imx6q_add_dvfs_core(&tx6_dvfscore_data);
976 #ifndef CONFIG_MX6_INTER_LDO_BYPASS
977 /* mx6_cpu_regulator_init(); */
980 pm_power_off = mx6_snvs_poweroff;
983 /* Add PCIe RC interface support */
986 imx6q_add_perfmon(0);
987 imx6q_add_perfmon(1);
988 imx6q_add_perfmon(2);
991 extern void __iomem *twd_base;
992 static void __init tx6_timer_init(void)
994 struct clk *uart_clk;
995 #ifdef CONFIG_LOCAL_TIMERS
996 twd_base = ioremap(LOCAL_TWD_ADDR, SZ_256);
999 mx6_clocks_init(32768, 24000000, 0, 0);
1001 uart_clk = clk_get_sys("imx-uart.0", NULL);
1002 early_console_setup(UART1_BASE_ADDR, uart_clk);
1005 static struct sys_timer tx6_timer = {
1006 .init = tx6_timer_init,
1009 static void __init tx6_reserve(void)
1011 #if defined(CONFIG_MXC_GPU_VIV) || defined(CONFIG_MXC_GPU_VIV_MODULE)
1014 if (imx6q_gpu_pdata.reserved_mem_size) {
1015 phys = memblock_alloc_base(imx6q_gpu_pdata.reserved_mem_size,
1017 memblock_remove(phys, imx6q_gpu_pdata.reserved_mem_size);
1018 imx6q_gpu_pdata.reserved_mem_base = phys;
1024 * initialize __mach_desc_TX6 data structure.
1026 MACHINE_START(TX6, "Ka-Ro i.MX 6Quad TX6")
1027 /* Maintainer: Ka-Ro electronics GmbH */
1028 .boot_params = MX6_PHYS_OFFSET + 0x100,
1029 .fixup = fixup_mxc_board,
1030 .map_io = mx6_map_io,
1031 .init_irq = mx6_init_irq,
1032 .init_machine = tx6_board_init,
1033 .timer = &tx6_timer,
1034 .reserve = tx6_reserve,