2 * linux/arch/arm/mach-omap1/board-fsample.c
4 * Modified from board-perseus2.c
6 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
7 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 #include <linux/gpio.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
17 #include <linux/delay.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/mtd/physmap.h>
22 #include <linux/input.h>
23 #include <linux/smc91x.h>
24 #include <linux/omapfb.h>
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
32 #include <plat/flash.h>
33 #include <plat/fpga.h>
34 #include <plat/keypad.h>
36 #include <mach/hardware.h>
41 /* fsample is pretty close to p2-sample */
43 #define fsample_cpld_read(reg) __raw_readb(reg)
44 #define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
46 #define FSAMPLE_CPLD_BASE 0xE8100000
47 #define FSAMPLE_CPLD_SIZE SZ_4K
48 #define FSAMPLE_CPLD_START 0x05080000
50 #define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
51 #define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
52 #define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
53 #define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
54 #define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
55 #define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
57 #define FSAMPLE_CPLD_BIT_BT_RESET 0
58 #define FSAMPLE_CPLD_BIT_LCD_RESET 1
59 #define FSAMPLE_CPLD_BIT_CAM_PWDN 2
60 #define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
61 #define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
62 #define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
63 #define FSAMPLE_CPLD_BIT_BACKLIGHT 6
64 #define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
65 #define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
66 #define FSAMPLE_CPLD_BIT_OTG_RESET 9
68 #define fsample_cpld_set(bit) \
69 fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
71 #define fsample_cpld_clear(bit) \
72 fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
74 static const unsigned int fsample_keymap[] = {
83 KEY(3, 1, KEY_VOLUMEDOWN),
84 KEY(4, 1, KEY_VOLUMEUP),
85 KEY(5, 1, KEY_RECORD),
96 KEY(5, 3, KEY_KPSLASH),
101 KEY(4, 4, KEY_KPASTERISK),
102 KEY(5, 4, KEY_POWER),
105 static struct smc91x_platdata smc91x_info = {
106 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
107 .leda = RPC_LED_100_10,
108 .ledb = RPC_LED_TX_RX,
111 static struct resource smc91x_resources[] = {
113 .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
114 .end = H2P2_DBG_FPGA_ETHR_START + 0xf,
115 .flags = IORESOURCE_MEM,
118 .start = INT_7XX_MPU_EXT_NIRQ,
120 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
124 static void __init fsample_init_smc91x(void)
126 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
128 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
129 H2P2_DBG_FPGA_LAN_RESET);
133 static struct mtd_partition nor_partitions[] = {
134 /* bootloader (U-Boot, etc) in first sector */
136 .name = "bootloader",
139 .mask_flags = MTD_WRITEABLE, /* force read-only */
141 /* bootloader params in the next sector */
144 .offset = MTDPART_OFS_APPEND,
151 .offset = MTDPART_OFS_APPEND,
155 /* rest of flash is a file system */
158 .offset = MTDPART_OFS_APPEND,
159 .size = MTDPART_SIZ_FULL,
164 static struct physmap_flash_data nor_data = {
166 .set_vpp = omap1_set_vpp,
167 .parts = nor_partitions,
168 .nr_parts = ARRAY_SIZE(nor_partitions),
171 static struct resource nor_resource = {
172 .start = OMAP_CS0_PHYS,
173 .end = OMAP_CS0_PHYS + SZ_32M - 1,
174 .flags = IORESOURCE_MEM,
177 static struct platform_device nor_device = {
178 .name = "physmap-flash",
181 .platform_data = &nor_data,
184 .resource = &nor_resource,
187 #define FSAMPLE_NAND_RB_GPIO_PIN 62
189 static int nand_dev_ready(struct mtd_info *mtd)
191 return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
194 static struct platform_nand_data nand_data = {
198 .options = NAND_SAMSUNG_LP_OPTIONS,
201 .cmd_ctrl = omap1_nand_cmd_ctl,
202 .dev_ready = nand_dev_ready,
206 static struct resource nand_resource = {
207 .start = OMAP_CS3_PHYS,
208 .end = OMAP_CS3_PHYS + SZ_4K - 1,
209 .flags = IORESOURCE_MEM,
212 static struct platform_device nand_device = {
216 .platform_data = &nand_data,
219 .resource = &nand_resource,
222 static struct platform_device smc91x_device = {
226 .platform_data = &smc91x_info,
228 .num_resources = ARRAY_SIZE(smc91x_resources),
229 .resource = smc91x_resources,
232 static struct resource kp_resources[] = {
234 .start = INT_7XX_MPUIO_KEYPAD,
235 .end = INT_7XX_MPUIO_KEYPAD,
236 .flags = IORESOURCE_IRQ,
240 static const struct matrix_keymap_data fsample_keymap_data = {
241 .keymap = fsample_keymap,
242 .keymap_size = ARRAY_SIZE(fsample_keymap),
245 static struct omap_kp_platform_data kp_data = {
248 .keymap_data = &fsample_keymap_data,
252 static struct platform_device kp_device = {
253 .name = "omap-keypad",
256 .platform_data = &kp_data,
258 .num_resources = ARRAY_SIZE(kp_resources),
259 .resource = kp_resources,
262 static struct platform_device *devices[] __initdata = {
269 static struct omap_lcd_config fsample_lcd_config = {
270 .ctrl_name = "internal",
273 static void __init omap_fsample_init(void)
275 /* Early, board-dependent init */
278 * Hold GSM Reset until needed
280 omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
283 * UARTs -> done automagically by 8250 driver
287 * CSx timings, GPIO Mux ... setup
290 /* Flash: CS0 timings setup */
291 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
292 omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
295 * Ethernet support through the debug board
298 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
299 omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
302 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
303 * It is used as the Ethernet controller interrupt
305 omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
308 fsample_init_smc91x();
310 if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
312 gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
314 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
315 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
317 /* Mux pins for keypad */
318 omap_cfg_reg(E2_7XX_KBR0);
319 omap_cfg_reg(J7_7XX_KBR1);
320 omap_cfg_reg(E1_7XX_KBR2);
321 omap_cfg_reg(F3_7XX_KBR3);
322 omap_cfg_reg(D2_7XX_KBR4);
323 omap_cfg_reg(C2_7XX_KBC0);
324 omap_cfg_reg(D3_7XX_KBC1);
325 omap_cfg_reg(E4_7XX_KBC2);
326 omap_cfg_reg(F4_7XX_KBC3);
327 omap_cfg_reg(E3_7XX_KBC4);
329 platform_add_devices(devices, ARRAY_SIZE(devices));
332 omap_register_i2c_bus(1, 100, NULL, 0);
334 omapfb_set_lcd_config(&fsample_lcd_config);
337 /* Only FPGA needs to be mapped here. All others are done with ioremap */
338 static struct map_desc omap_fsample_io_desc[] __initdata = {
340 .virtual = H2P2_DBG_FPGA_BASE,
341 .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
342 .length = H2P2_DBG_FPGA_SIZE,
346 .virtual = FSAMPLE_CPLD_BASE,
347 .pfn = __phys_to_pfn(FSAMPLE_CPLD_START),
348 .length = FSAMPLE_CPLD_SIZE,
353 static void __init omap_fsample_map_io(void)
356 iotable_init(omap_fsample_io_desc,
357 ARRAY_SIZE(omap_fsample_io_desc));
360 MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
361 /* Maintainer: Brian Swetland <swetland@google.com> */
362 .atag_offset = 0x100,
363 .map_io = omap_fsample_map_io,
364 .init_early = omap1_init_early,
365 .reserve = omap_reserve,
366 .init_irq = omap1_init_irq,
367 .init_machine = omap_fsample_init,
368 .init_late = omap1_init_late,
369 .timer = &omap1_timer,
370 .restart = omap1_restart,