arch/arm/mach-omap1/board-h3.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-h3.c
   3  *
   4  * This file contains OMAP1710 H3 specific code.
   5  *
   6  * Copyright (C) 2004 Texas Instruments, Inc.
   7  * Copyright (C) 2002 MontaVista Software, Inc.
   8  * Copyright (C) 2001 RidgeRun, Inc.
   9  * Author: RidgeRun, Inc.
  10  *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/init.h>
  19 #include <linux/major.h>
  20 #include <linux/kernel.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/errno.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/i2c.h>
  25 #include <linux/mtd/mtd.h>
  26 #include <linux/mtd/nand.h>
  27 #include <linux/mtd/partitions.h>
  28 #include <linux/input.h>
  29 #include <linux/spi/spi.h>
  30 #include <linux/i2c/tps65010.h>
  31
  32 #include <asm/setup.h>
  33 #include <asm/page.h>
  34 #include <mach/hardware.h>
  35 #include <asm/gpio.h>
  36
  37 #include <asm/mach-types.h>
  38 #include <asm/mach/arch.h>
  39 #include <asm/mach/flash.h>
  40 #include <asm/mach/map.h>
  41
  42 #include <mach/gpioexpander.h>
  43 #include <mach/irqs.h>
  44 #include <mach/mux.h>
  45 #include <mach/tc.h>
  46 #include <mach/nand.h>
  47 #include <mach/irda.h>
  48 #include <mach/usb.h>
  49 #include <mach/keypad.h>
  50 #include <mach/dma.h>
  51 #include <mach/common.h>
  52
  53 #include "board-h3.h"
  54
  55 /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
  56 #define OMAP1710_ETHR_START             0x04000300
  57
  58 #define H3_TS_GPIO      48
  59
  60 static int h3_keymap[] = {
  61         KEY(0, 0, KEY_LEFT),
  62         KEY(0, 1, KEY_RIGHT),
  63         KEY(0, 2, KEY_3),
  64         KEY(0, 3, KEY_F10),
  65         KEY(0, 4, KEY_F5),
  66         KEY(0, 5, KEY_9),
  67         KEY(1, 0, KEY_DOWN),
  68         KEY(1, 1, KEY_UP),
  69         KEY(1, 2, KEY_2),
  70         KEY(1, 3, KEY_F9),
  71         KEY(1, 4, KEY_F7),
  72         KEY(1, 5, KEY_0),
  73         KEY(2, 0, KEY_ENTER),
  74         KEY(2, 1, KEY_6),
  75         KEY(2, 2, KEY_1),
  76         KEY(2, 3, KEY_F2),
  77         KEY(2, 4, KEY_F6),
  78         KEY(2, 5, KEY_HOME),
  79         KEY(3, 0, KEY_8),
  80         KEY(3, 1, KEY_5),
  81         KEY(3, 2, KEY_F12),
  82         KEY(3, 3, KEY_F3),
  83         KEY(3, 4, KEY_F8),
  84         KEY(3, 5, KEY_END),
  85         KEY(4, 0, KEY_7),
  86         KEY(4, 1, KEY_4),
  87         KEY(4, 2, KEY_F11),
  88         KEY(4, 3, KEY_F1),
  89         KEY(4, 4, KEY_F4),
  90         KEY(4, 5, KEY_ESC),
  91         KEY(5, 0, KEY_F13),
  92         KEY(5, 1, KEY_F14),
  93         KEY(5, 2, KEY_F15),
  94         KEY(5, 3, KEY_F16),
  95         KEY(5, 4, KEY_SLEEP),
  96         0
  97 };
  98
  99
 100 static struct mtd_partition nor_partitions[] = {
 101         /* bootloader (U-Boot, etc) in first sector */
 102         {
 103               .name             = "bootloader",
 104               .offset           = 0,
 105               .size             = SZ_128K,
 106               .mask_flags       = MTD_WRITEABLE, /* force read-only */
 107         },
 108         /* bootloader params in the next sector */
 109         {
 110               .name             = "params",
 111               .offset           = MTDPART_OFS_APPEND,
 112               .size             = SZ_128K,
 113               .mask_flags       = 0,
 114         },
 115         /* kernel */
 116         {
 117               .name             = "kernel",
 118               .offset           = MTDPART_OFS_APPEND,
 119               .size             = SZ_2M,
 120               .mask_flags       = 0
 121         },
 122         /* file system */
 123         {
 124               .name             = "filesystem",
 125               .offset           = MTDPART_OFS_APPEND,
 126               .size             = MTDPART_SIZ_FULL,
 127               .mask_flags       = 0
 128         }
 129 };
 130
 131 static struct flash_platform_data nor_data = {
 132         .map_name       = "cfi_probe",
 133         .width          = 2,
 134         .parts          = nor_partitions,
 135         .nr_parts       = ARRAY_SIZE(nor_partitions),
 136 };
 137
 138 static struct resource nor_resource = {
 139         /* This is on CS3, wherever it's mapped */
 140         .flags          = IORESOURCE_MEM,
 141 };
 142
 143 static struct platform_device nor_device = {
 144         .name           = "omapflash",
 145         .id             = 0,
 146         .dev            = {
 147                 .platform_data  = &nor_data,
 148         },
 149         .num_resources  = 1,
 150         .resource       = &nor_resource,
 151 };
 152
 153 static struct mtd_partition nand_partitions[] = {
 154 #if 0
 155         /* REVISIT: enable these partitions if you make NAND BOOT work */
 156         {
 157                 .name           = "xloader",
 158                 .offset         = 0,
 159                 .size           = 64 * 1024,
 160                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 161         },
 162         {
 163                 .name           = "bootloader",
 164                 .offset         = MTDPART_OFS_APPEND,
 165                 .size           = 256 * 1024,
 166                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 167         },
 168         {
 169                 .name           = "params",
 170                 .offset         = MTDPART_OFS_APPEND,
 171                 .size           = 192 * 1024,
 172         },
 173         {
 174                 .name           = "kernel",
 175                 .offset         = MTDPART_OFS_APPEND,
 176                 .size           = 2 * SZ_1M,
 177         },
 178 #endif
 179         {
 180                 .name           = "filesystem",
 181                 .size           = MTDPART_SIZ_FULL,
 182                 .offset         = MTDPART_OFS_APPEND,
 183         },
 184 };
 185
 186 /* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
 187 static struct omap_nand_platform_data nand_data = {
 188         .options        = NAND_SAMSUNG_LP_OPTIONS,
 189         .parts          = nand_partitions,
 190         .nr_parts       = ARRAY_SIZE(nand_partitions),
 191 };
 192
 193 static struct resource nand_resource = {
 194         .flags          = IORESOURCE_MEM,
 195 };
 196
 197 static struct platform_device nand_device = {
 198         .name           = "omapnand",
 199         .id             = 0,
 200         .dev            = {
 201                 .platform_data  = &nand_data,
 202         },
 203         .num_resources  = 1,
 204         .resource       = &nand_resource,
 205 };
 206
 207 static struct resource smc91x_resources[] = {
 208         [0] = {
 209                 .start  = OMAP1710_ETHR_START,          /* Physical */
 210                 .end    = OMAP1710_ETHR_START + 0xf,
 211                 .flags  = IORESOURCE_MEM,
 212         },
 213         [1] = {
 214                 .start  = OMAP_GPIO_IRQ(40),
 215                 .end    = OMAP_GPIO_IRQ(40),
 216                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 217         },
 218 };
 219
 220 static struct platform_device smc91x_device = {
 221         .name           = "smc91x",
 222         .id             = 0,
 223         .num_resources  = ARRAY_SIZE(smc91x_resources),
 224         .resource       = smc91x_resources,
 225 };
 226
 227 #define GPTIMER_BASE            0xFFFB1400
 228 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
 229 #define GPTIMER_REGS_SIZE       0x46
 230
 231 static struct resource intlat_resources[] = {
 232         [0] = {
 233                 .start  = GPTIMER_REGS(0),            /* Physical */
 234                 .end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
 235                 .flags  = IORESOURCE_MEM,
 236         },
 237         [1] = {
 238                 .start  = INT_1610_GPTIMER1,
 239                 .end    = INT_1610_GPTIMER1,
 240                 .flags  = IORESOURCE_IRQ,
 241         },
 242 };
 243
 244 static struct platform_device intlat_device = {
 245         .name      = "omap_intlat",
 246         .id          = 0,
 247         .num_resources  = ARRAY_SIZE(intlat_resources),
 248         .resource       = intlat_resources,
 249 };
 250
 251 static struct resource h3_kp_resources[] = {
 252         [0] = {
 253                 .start  = INT_KEYBOARD,
 254                 .end    = INT_KEYBOARD,
 255                 .flags  = IORESOURCE_IRQ,
 256         },
 257 };
 258
 259 static struct omap_kp_platform_data h3_kp_data = {
 260         .rows           = 8,
 261         .cols           = 8,
 262         .keymap         = h3_keymap,
 263         .keymapsize     = ARRAY_SIZE(h3_keymap),
 264         .rep            = 1,
 265         .delay          = 9,
 266         .dbounce        = 1,
 267 };
 268
 269 static struct platform_device h3_kp_device = {
 270         .name           = "omap-keypad",
 271         .id             = -1,
 272         .dev            = {
 273                 .platform_data = &h3_kp_data,
 274         },
 275         .num_resources  = ARRAY_SIZE(h3_kp_resources),
 276         .resource       = h3_kp_resources,
 277 };
 278
 279
 280 /* Select between the IrDA and aGPS module
 281  */
 282 static int h3_select_irda(struct device *dev, int state)
 283 {
 284         unsigned char expa;
 285         int err = 0;
 286
 287         if ((err = read_gpio_expa(&expa, 0x26))) {
 288                 printk(KERN_ERR "Error reading from I/O EXPANDER \n");
 289                 return err;
 290         }
 291
 292         /* 'P6' enable/disable IRDA_TX and IRDA_RX */
 293         if (state & IR_SEL) { /* IrDA */
 294                 if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
 295                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 296                         return err;
 297                 }
 298         } else {
 299                 if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
 300                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 301                         return err;
 302                 }
 303         }
 304         return err;
 305 }
 306
 307 static void set_trans_mode(struct work_struct *work)
 308 {
 309         struct omap_irda_config *irda_config =
 310                 container_of(work, struct omap_irda_config, gpio_expa.work);
 311         int mode = irda_config->mode;
 312         unsigned char expa;
 313         int err = 0;
 314
 315         if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
 316                 printk(KERN_ERR "Error reading from I/O expander\n");
 317         }
 318
 319         expa &= ~0x03;
 320
 321         if (mode & IR_SIRMODE) {
 322                 expa |= 0x01;
 323         } else { /* MIR/FIR */
 324                 expa |= 0x03;
 325         }
 326
 327         if ((err = write_gpio_expa(expa, 0x27)) != 0) {
 328                 printk(KERN_ERR "Error writing to I/O expander\n");
 329         }
 330 }
 331
 332 static int h3_transceiver_mode(struct device *dev, int mode)
 333 {
 334         struct omap_irda_config *irda_config = dev->platform_data;
 335
 336         irda_config->mode = mode;
 337         cancel_delayed_work(&irda_config->gpio_expa);
 338         PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
 339         schedule_delayed_work(&irda_config->gpio_expa, 0);
 340
 341         return 0;
 342 }
 343
 344 static struct omap_irda_config h3_irda_data = {
 345         .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
 346         .transceiver_mode       = h3_transceiver_mode,
 347         .select_irda            = h3_select_irda,
 348         .rx_channel             = OMAP_DMA_UART3_RX,
 349         .tx_channel             = OMAP_DMA_UART3_TX,
 350         .dest_start             = UART3_THR,
 351         .src_start              = UART3_RHR,
 352         .tx_trigger             = 0,
 353         .rx_trigger             = 0,
 354 };
 355
 356 static struct resource h3_irda_resources[] = {
 357         [0] = {
 358                 .start  = INT_UART3,
 359                 .end    = INT_UART3,
 360                 .flags  = IORESOURCE_IRQ,
 361         },
 362 };
 363
 364 static u64 irda_dmamask = 0xffffffff;
 365
 366 static struct platform_device h3_irda_device = {
 367         .name           = "omapirda",
 368         .id             = 0,
 369         .dev            = {
 370                 .platform_data  = &h3_irda_data,
 371                 .dma_mask       = &irda_dmamask,
 372         },
 373         .num_resources  = ARRAY_SIZE(h3_irda_resources),
 374         .resource       = h3_irda_resources,
 375 };
 376
 377 static struct platform_device h3_lcd_device = {
 378         .name           = "lcd_h3",
 379         .id             = -1,
 380 };
 381
 382 static struct spi_board_info h3_spi_board_info[] __initdata = {
 383         [0] = {
 384                 .modalias       = "tsc2101",
 385                 .bus_num        = 2,
 386                 .chip_select    = 0,
 387                 .irq            = OMAP_GPIO_IRQ(H3_TS_GPIO),
 388                 .max_speed_hz   = 16000000,
 389                 /* .platform_data       = &tsc_platform_data, */
 390         },
 391 };
 392
 393 static struct platform_device *devices[] __initdata = {
 394         &nor_device,
 395         &nand_device,
 396         &smc91x_device,
 397         &intlat_device,
 398         &h3_irda_device,
 399         &h3_kp_device,
 400         &h3_lcd_device,
 401 };
 402
 403 static struct omap_usb_config h3_usb_config __initdata = {
 404         /* usb1 has a Mini-AB port and external isp1301 transceiver */
 405         .otg        = 2,
 406
 407 #ifdef CONFIG_USB_GADGET_OMAP
 408         .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
 409 #elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 410         /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
 411         .hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
 412 #endif
 413
 414         .pins[1]        = 3,
 415 };
 416
 417 static struct omap_uart_config h3_uart_config __initdata = {
 418         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 419 };
 420
 421 static struct omap_lcd_config h3_lcd_config __initdata = {
 422         .ctrl_name      = "internal",
 423 };
 424
 425 static struct omap_board_config_kernel h3_config[] __initdata = {
 426         { OMAP_TAG_UART,        &h3_uart_config },
 427         { OMAP_TAG_LCD,         &h3_lcd_config },
 428 };
 429
 430 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
 431        {
 432                 I2C_BOARD_INFO("tps65013", 0x48),
 433                /* .irq         = OMAP_GPIO_IRQ(??), */
 434        },
 435         {
 436                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
 437                 .irq            = OMAP_GPIO_IRQ(14),
 438         },
 439 };
 440
 441 #define H3_NAND_RB_GPIO_PIN     10
 442
 443 static int nand_dev_ready(struct omap_nand_platform_data *data)
 444 {
 445         return gpio_get_value(H3_NAND_RB_GPIO_PIN);
 446 }
 447
 448 static void __init h3_init(void)
 449 {
 450         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
 451          * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
 452          * notice whether a NAND chip is enabled at probe time.
 453          *
 454          * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
 455          * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
 456          * to avoid probing every possible flash configuration...
 457          */
 458         nor_resource.end = nor_resource.start = omap_cs3_phys();
 459         nor_resource.end += SZ_32M - 1;
 460
 461         nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
 462         nand_resource.end += SZ_4K - 1;
 463         if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
 464                 BUG();
 465         nand_data.dev_ready = nand_dev_ready;
 466
 467         /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
 468         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
 469         omap_cfg_reg(V2_1710_GPIO10);
 470
 471         platform_add_devices(devices, ARRAY_SIZE(devices));
 472         spi_register_board_info(h3_spi_board_info,
 473                                 ARRAY_SIZE(h3_spi_board_info));
 474         omap_board_config = h3_config;
 475         omap_board_config_size = ARRAY_SIZE(h3_config);
 476         omap_serial_init();
 477         omap_register_i2c_bus(1, 100, h3_i2c_board_info,
 478                               ARRAY_SIZE(h3_i2c_board_info));
 479         omap_usb_init(&h3_usb_config);
 480         h3_mmc_init();
 481 }
 482
 483 static void __init h3_init_smc91x(void)
 484 {
 485         omap_cfg_reg(W15_1710_GPIO40);
 486         if (gpio_request(40, "SMC91x irq") < 0) {
 487                 printk("Error requesting gpio 40 for smc91x irq\n");
 488                 return;
 489         }
 490 }
 491
 492 static void __init h3_init_irq(void)
 493 {
 494         omap1_init_common_hw();
 495         omap_init_irq();
 496         omap_gpio_init();
 497         h3_init_smc91x();
 498 }
 499
 500 static void __init h3_map_io(void)
 501 {
 502         omap1_map_common_io();
 503 }
 504
 505 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
 506         /* Maintainer: Texas Instruments, Inc. */
 507         .phys_io        = 0xfff00000,
 508         .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
 509         .boot_params    = 0x10000100,
 510         .map_io         = h3_map_io,
 511         .init_irq       = h3_init_irq,
 512         .init_machine   = h3_init,
 513         .timer          = &omap_timer,
 514 MACHINE_END